CN110880556A - Organic transistor element, organic light-emitting transistor element and manufacturing method thereof - Google Patents
Organic transistor element, organic light-emitting transistor element and manufacturing method thereof Download PDFInfo
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- CN110880556A CN110880556A CN201910811573.5A CN201910811573A CN110880556A CN 110880556 A CN110880556 A CN 110880556A CN 201910811573 A CN201910811573 A CN 201910811573A CN 110880556 A CN110880556 A CN 110880556A
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- light emitting
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- emitting transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/125—Active-matrix OLED [AMOLED] displays including organic TFTs [OTFT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
- H01L29/1606—Graphene
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/30—Organic light-emitting transistors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/805—Electrodes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Abstract
The present invention relates to an organic light emitting transistor based on a low dimensional electronic structure material electrode, and more particularly, to an organic light emitting transistor using graphene having a substantially flat and easily processable low dimensional electronic structure as a source (or drain) electrode. In addition, the graphene-based organic light emitting transistor (Gr-VOLET) has an extremely low power loss characteristic, and a characteristic of a significantly improved effective aperture ratio (AReff) of 150% or more even at high luminance. In addition, the tunneling process of injecting holes from the graphene source electrode to the channel layer has a mechanism of efficient modulation with the gate voltage, and the present invention having such an excellent element operation principle can be applied to next-generation display devices, general lighting applications, and practical light-emitting transistor devices in other fields.
Description
Technical Field
The present invention relates to an organic transistor and an organic light-emitting transistor each including an electrode made of a substance having a low dimensional electronic structure, and more particularly, to a vertical organic transistor and an organic light-emitting transistor each including a substance electrode having a low dimensional electronic structure, which is flat and can be easily processed, as a source electrode or a drain electrode, and a method for manufacturing the same.
Background
In recent years, various advanced devices such as Organic Light Emitting Diodes (OLEDs), solar cells (solar cells), transistors (transistors), and sensors (sensors) using an organic semiconductor material have been successfully developed in the field of advanced electronics engineering. Among them, in order to realize high luminance, high efficiency, and full color Electroluminescence (EL) emission of high quality displays, illumination, and light sensing devices, intensive development has been made in OLEDs (organic light-emitting diodes) and fields related thereto. Such an OLED is known to have excellent characteristics in view angle, response time, thickness, and contrast (contrast ratio) compared to conventional photoelectric elements such as Liquid Crystal Displays (LCDs). As an example of a display product, a small OLED display excellent in quality is constructed on a Thin Film Transistor (TFT) switch array capable of controlling the state of pixels and produced. In such an Active Matrix (AM) OLED (AM-OLED), since the OLED is driven in a current mode, at least two TFTs are generally required for one pixel, including a switching TFT for selecting an OLED pixel and a driving TFT for operating the OLED. Thus, integration of the driving TFT and the OLED remains a point of controversy as a major issue related to AM-OLEDs. Since amorphous silicon (a-Si) TFTs cannot satisfy the amount of current required for OLEDs due to low charge mobility, high mobility polysilicon (poly-Si) TFTs can be used as an alternative. However, poly-Si has low reproducibility between pixels due to inherent limitations associated with large characteristic variations based on the size, crystal orientation, and number of grains of polycrystalline grains. Thus, despite many advances in AM-OLEDs, complex TFT designs fabricated in elaborate process steps have rather limited light emitting area, i.e. low aperture ratio (aperture ratio), which not only limits the display size, but also leads to profound problems associated with reduced device performance.
In order to overcome such problems of AM-OLEDs, research and development of elements of various structures are currently under way. Among them, various organic light-emitting transistors (OLETs), that is, a static induction organic light-emitting transistor (SIT-OLET), a metal-insulator-semiconductor type organic light-emitting transistor (MIS-OLET), a lateral organic light-emitting transistor (lateral OLET), and a vertical organic light-emitting transistor (VOLET), have been developed in order to integrate a light-emitting function of an OLED and a switching (switching) function of a transistor into one element structure.
On the other hand, recently, a CNT-based organic light emitting transistor (CNT-VOLET) element in which an organic light emitting transistor is constituted using a Carbon Nanotube (CNT) -based transistor has been developed and reported (McCarthy, m.a. et al Science 332,570-573, 2011). The CNT-VOLET device using the CNT network as the source electrode achieves several improvements such as high on/off rate. The characteristics of such elements arise from gate-voltage-induced modulation of the lateral (or horizontal) schottky barrier height on the surface of the source electrode. In korean laid-open patent No. 10-2013-0130011 of the related patent, there is described "active matrix diluted source enabled vertical organic light emitting transistor", but in actuality, such prior art is caused by agglomeration of carbon nanotubes (reference: lee, b, et al j.appl.phys.116, 144503, 2014), difficulty in fabricating CNT mesh source electrodes with flat and uniform surfaces, difficulty in reproducing effective Aperture Ratio (AR) of production elements, CNT-VOLET elementseff) Around 98%, it is still insufficient, and the parasitic power consumption of the element must be further reduced to 6.2% (McCarthy, M.A. et al Science 332,570-573, 2011). Therefore, the development of an organic light emitting transistor having low power consumption, a high effective aperture ratio, and high manufacturing reliability is still an extremely important issue in this field.
Documents of the prior art
Patent document
Patent document 1: korean laid-open patent No. 10-2013-0130011 (application date: 2011.12.07)
Disclosure of Invention
Problems to be solved by the invention
In the present invention, in order to integrate a driving TFT and an OLED, an organic transistor based on an electrode composed of a substance having a low dimensional electronic structure with a simple manufacturing process, an organic light emitting transistor, and a manufacturing method thereof are provided.
AM-OLEDs as prior art, despite many advances, are fabricated with sophisticated processes with complex TFT designs, leading to significant problems associated not only with a rather limited aperture ratio (25-34%), but also with increased size of the display and improved device performance levels.
In order to solve the problem, an organic transistor and an organic light emitting transistor provided with an electrode made of a substance having a low dimensional electronic structure proposed by the present invention provide an organic (light emitting) transistor using a substance having a low dimensional electronic structure which is completely flat and easy to process as a source electrode or a drain electrode, and an element having characteristics of extremely low power loss and a greatly improved effective aperture ratio even at high luminance, and efficiently modulating a tunneling process of injecting charges from the low dimensional electronic structure electrode to a channel layer by a gate voltage.
However, the problems to be solved by the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.
Means for solving the problems
The present application relates to an organic transistor and an organic light-emitting transistor having an electrode made of a low-dimensional electronic structure substance.
The present application relates to an organic light emitting transistor, wherein the electrode of the low dimensional electronic structure substance is made of a material selected from the group consisting of graphene, carbon nanotubes, metal Nanowires (NWs), silver nanowires (Ag-NW), metal halides, and molybdenum disulfide (MoS)2) Titanium disulfide (TiS)2) Tungsten diselenide (WSe)2) And a complex thereof.
The present application relates to an organic transistor and an organic light emitting transistor, wherein an electrode of the low dimensional electronic structure substance is a graphene-based source electrode or drain electrode of a single layer or multilayer structure.
The present application relates to an organic transistor and an organic light emitting transistor, wherein the electrode of the low dimensional electronic structure substance is a single layer of a graphene-based source electrode or drain electrode. Hereinafter, as a representative of the source electrode and the drain electrode of the low dimensional electron structural substance, the characteristics of the source electrode of the low dimensional electron structural substance will be explained.
In addition, the organic light emitting transistor of the present application may include: a substrate; a conductive layer laminated on the substrate; a dielectric layer laminated on the conductive layer; a source electrode for hole injection, which is composed of a low-dimensional electron structure substance laminated on the dielectric layer; a light emitting layer laminated on the source electrode; and an electron injection drain electrode laminated on the light-emitting layer.
The present application relates to organic transistors and organic light emitting transistors, characterized in that the tunneling process of holes injected from a graphene-based source electrode is modulated with the gate voltage.
In addition, an organic light emitting transistor which may have an inverted structure includes: a substrate; a conductive layer laminated on the substrate; a dielectric layer laminated on the conductive layer; a source electrode for electron injection, which is composed of a low-dimensional electron structure substance laminated on the dielectric layer; a light emitting layer laminated on the source electrode; and a hole injection drain electrode laminated on the light-emitting layer.
The present application relates to organic transistors and organic light emitting transistors of inverted structure, characterized in that the tunneling process of holes injected from a graphene-based source electrode is modulated with the gate voltage.
Hereinafter, the characteristics of the organic light emitting transistor of the inverted structure will be described as representative of the organic transistor and the organic light emitting transistor of the inverted structure.
The present application relates to an organic transistor and an organic light emitting transistor, wherein the graphene electrode is a physicochemical p-type or n-type doping such as a nitrogen doping, a gold (Au) doping, a chlorine (Cl) doping, a fluorine (F) doping, a 1,1 '-dibenzyl-4, 4' -bipyridine dichloride (1,1-dibenzyl-4, 4-bipyridine dichloride) doping, an alkali metal carbonate doping, a tetrafluorotetracyanoquinodimethane (F4-TCNQ, tetrafluorotetracyanoquinonedimethane) doping, and a fluoropolymer (CYTOP) doping.
The present application relates to an organic transistor and an organic light emitting transistor, wherein the graphene electrode is doped with iron chloride (FeCl)3)。
The application relates to an organic light emitting transistor, characterized in that said transistor is doped with iron chloride (FeCl)3) By using ferric chloride (FeCl)3) Is treated with the aqueous solution of (a).
The present invention relates to an organic transistor and an organic light-emitting transistor, wherein an electrode formed of the low dimensional electron structural substance is capable of electrical modulation of a potential barrier in a longitudinal direction (vertical direction).
Hereinafter, an organic light emitting transistor, which is representative of the organic transistor and the organic light emitting transistor, will be described in detail.
The present application relates to an organic light emitting transistor, wherein the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyethersulfone (PES), Polyimide (PI), Polycarbonate (PC), Polyurethane (PU), and Polytetrafluoroethylene (PTFE).
The application relates to an organic light emitting transistor, characterized in that the conductive layer is made of a material selected from Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), and tin oxide (SnO)2) Arsenic Trioxide (ATO), tin fluoride oxide (FTO), zinc oxide (GZO), Indium Gallium Zinc Oxide (IGZO), carbon nanotube (carbon nanotube), graphene (graphene), silver nanowire (Ag nanowire), metal nanowire (metal nanowire), conductive polymer (conductive polymer), and solid electrolyte (solid electrolyte).
This applicationThe organic light emitting transistor is characterized in that the dielectric layer is made of silicon oxide (SiOx, x is more than or equal to 1) and aluminum oxide (Al)2O3) Zinc oxide (ZnO), tantalum pentoxide (Ta)2O5) Niobium pentoxide (Nb)2O5) Hafnium oxide (HfO)2) Titanium dioxide (TiO)2) Indium oxide (In)2O3) Silicon nitride (SiNx, x is not less than 1) and magnesium fluoride (MgF)2) Calcium fluoride (CaF)2) PET, PEN, PES, PI, PC, and PTFE.
The application relates to an organic light emitting transistor, characterized in that the dielectric layer is gold chloride (AuCl)3)。
The application relates to an organic light emitting transistor, wherein at 100cd m-2The effective aperture ratio of (2) is 100% or more.
The present application relates to an organic transistor and a method of manufacturing an organic light emitting transistor, which includes: a step of laminating a conductive layer for a gate electrode on a substrate; a step of laminating a dielectric layer on the conductive layer; a step of stacking a low-dimensional electronic structure source on the dielectric layer; a step of laminating a light emitting layer on the source electrode; and a step of laminating a drain electrode on the light emitting layer.
In addition, the present application also relates to a method of manufacturing an organic light emitting transistor, which includes: a step of laminating a conductive layer for a gate electrode on a substrate; a step of laminating a dielectric layer on the conductive layer; a step of stacking a source electrode for hole injection made of a low-dimensional electron structure material on the dielectric layer; a step of laminating a light emitting layer on the source electrode; and a step of laminating an electron injection drain on the light-emitting layer.
In addition, the present application also relates to a method of manufacturing an organic light emitting transistor of an inverted structure, which includes: a step of laminating a conductive layer for a gate electrode on a substrate; a step of laminating a dielectric layer on the conductive layer; a step of stacking a source electrode for electron injection made of a low dimensional electron structure material on the dielectric layer; a step of laminating a light emitting layer on the source electrode; and a step of stacking a drain for hole injection on the light-emitting layer.
The present application relates to a method of manufacturing an organic light emitting transistor, characterized in that the low dimensional electronic structure is a graphene based source electrode.
The present application relates to an organic transistor and a method for manufacturing an organic light-emitting transistor, wherein the low dimensional electron structural substance electrode is capable of electrically modulating a potential barrier in a longitudinal direction.
The present application relates to an organic transistor and a method of manufacturing an organic light emitting transistor, wherein the graphene is doped with iron chloride (FeCl)3)。
The present application relates to an organic transistor and a method of manufacturing an organic light emitting transistor, characterized in that the step of stacking the graphene-based source electrode is performed by doping iron chloride (FeCl)3) And an aqueous solution.
The present application relates to a method of manufacturing an organic light emitting transistor, wherein the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or PET, PEN, PES, PI, PC, PU, and PTFE.
The application relates to a method for manufacturing an organic light-emitting transistor, which is characterized in that the conductive layer is made of Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO) and tin oxide (SnO)2) The material may be any one of Arsenic Trioxide (ATO), tin fluoride oxide (FTO), zinc oxide (GZO), Indium Gallium Zinc Oxide (IGZO), Carbon Nanotube (CNT), graphene (graphene), silver nanowire (Ag-nanowire), metal nanowire (metal nanowire), conductive polymer (conductive polymer), and solid electrolyte (solid electrolyte).
The application relates to an organic transistor and a method for manufacturing the organic light-emitting transistor, characterized in that the dielectric layer is made of silicon oxide (SiOx, x is more than or equal to 1) and aluminum oxide (Al)2O3) Zinc oxide (ZnO), tantalum pentoxide (Ta)2O5) Niobium pentoxide (Nb)2O5) Hafnium oxide (HfO)2) Titanium dioxide (TiO)2) Indium oxide (In)2O3) Silicon nitride (SiNx, x is not less than 1) and magnesium fluoride (MgF)2) Calcium fluoride (CaF)2) PET, PEN, PES, PI, PC, and PTFE.
ADVANTAGEOUS EFFECTS OF INVENTION
In the present invention, an organic light emitting transistor is provided which is manufactured by using a material having a low dimensional electronic structure which is completely flat and can be easily processed as a source electrode. Graphene usable as one of low-dimensional electronic structure materials as sp having a hexagonal lattice structure with carbon atoms2The morphologically bonded two-dimensional substance has excellent light transmittance and conductivity due to a planar structure of single-layer graphene (SLG).
In addition, in the present invention, the device performance can be efficiently modulated by applying a gate voltage to the graphene electrode-based vertical organic light emitting transistor (Gr-VOLET).
The Gr-VOLET of the present invention has an extremely low power loss characteristic, has a characteristic of having a greatly improved effective aperture ratio of 150% or more even at high luminance, and has an operation mechanism for efficiently modulating a tunneling process of injecting holes from the graphene source electrode to the channel layer by a gate voltage. The present invention having such an excellent principle of operation of the element can be applied to next-generation display devices, general lighting applications, and practical light-emitting transistor devices in other fields.
Drawings
Fig. 1 is a schematic diagram illustrating a structure and fabrication steps of a graphene-based vertical organic light emitting transistor (Gr-VOLETs). A schematic diagram of a Gr-VOLET structure having a Single Layer Graphene (SLG) source and organic light emitting channel layer, an Al metal drain, a functional layer, and a fabrication step and SEM images cutting the Gr-VOLET section are shown. Arranged at the source electrode separated into transparent SLG and Al2O3The upper portion of the ITO gate of the gate dielectric, and the ITO is indium tin oxide.
Fig. 2 shows operation characteristics of graphene-based vertical organic light emitting transistors (Gr-VOLETs). Is at a fixed source/drain voltage (V) of 3.8VSD) Lower for 3 gate voltages (V)G) Hair of Gr-VOLETPhoto (light-emitting pixel area: 4 mm. times.2 mm, white quadrangle). Gr-VOLET at V in the top and bottom imagesGWhen the voltage is-40V and +40V, the lighting is completely turned on and off. For comparison, the middle figure shows at VGGr-VOLET emits gray light at 0V.
Fig. 3 shows an Electroluminescence (EL) spectrum based on wavelength and luminance based on a reaction time and an applied voltage, which are operation characteristics of the graphene-based vertical organic light emitting transistors (Gr-VOLETs). Showing for a plurality of VGAnd the electroluminescence spectrum of the Gr-VOLET (solid line) of a control standard (control) ITO-OLED (dotted line). The maximum emission peak occurs at 550 nm. A molecular structure of Super Yellow (SY) used for the light emitting channel layer is shown in the drawing of the graph.
FIG. 4 shows a fixed V for 3.8VSDStep voltage (V) applied to gateG± 40V) response time characteristics of Gr-VOLET.
FIG. 5 shows the output characteristics of Gr-VOLETs in which the gate voltages (V) of Gr-VOLETs having different types of SLG sourcesG) Dependent current density-voltage (J)SD-VSD) (left side) and luminance-voltage (L-V)SD) (right) properties. SLG1Corresponding to (a), SLG2Corresponding to (b), SLG3Corresponding to (c). For comparison, the characteristics of the gate-separated Gr-VOLET (i.e., Gr-OLED) are also illustrated. (the curve shown by the dotted line means that the OLED is in action.)
FIG. 6 is a graph relating to the injection process of charges under Gr-VOLETs, (a) is at VGFor SLG at 0V1To SLG3Gr-VOLET of (b) is at various VGFor SLG2Gr-VOLET of2Fowler-Nordheim plot of (l), ln (J/V)SD 2) To 1/VSDA graph of (a). VTRepresenting the transition voltage at which the hole injection mechanism changes from schottky thermionic emission to tunneling. (a) A schematic band diagram showing thermionic emission and tunneling in the SLG/SY interface along the perpendicular direction of the interface between the SLG and SY channel layers. Φ is the Fermi level of SLG (E)F) HOMO (high host occu) with SYMolecular orbital, highest occupied molecular orbital) level, (b) solid line represents a theoretical fit based on a tunneling current model. (c) Shows the gate bias-modulation tunnel barrier height phi extracted by analysis of the experimental curve in the hole-dominant region, and Δ phi is shown at VGModulation of Φ induced by gate voltage at ± 40V.
FIG. 7 shows the gate bias induced modulation of the SLG work function and the mechanism of operation of Gr-VOLETs, where (a) the left diagram relates to the gate bias induced modulation of the SLG work function, and (a) the right diagram shows the assigned V SD3 of VGSGr-VOLET of2The energy level of (c). (b) Is shown at V providedSDGr-VOLET under 3.2V2J of (A)SD-VG(upper panel) and L-VG(lower graph) transfer characteristic curve. The upper and lower insets are Gr-VOLET2J of (A)G-VGThe characteristics (upper diagram) of (1), using the V given toSDAt VGThe picture of the Gr-VOLET pixel at 0V shows a bi-stable switching action (lower graph).
FIG. 8 shows a comparison of control ITO-OLED cells and Gr-VOLETs cells. Showing the OLED in "on state" (V) against a standard for an ITO substrateG＝at-40V) with SLG1(upper) SLG2(middle) and SLG3Current density-luminance-voltage (J-L-V) (a) and current efficiency-luminance (η) of Gr-VOLETs of the (lower) sourceC-L) (b). Here, the ITO-OLED1＝ITO-OLED2(ITO/SY/CsF/Al) and ITO-OLED3＝(ITO/PEDOT：PSS/SY/CsF/Al)。
FIG. 9 shows SLG on VOLET substrate of the present invention1To SLG3The raman spectrum of (a).
FIG. 10 shows the characteristics of SLG used for Gr-VOLETs. (a) Correlated to the work function profile of 3 SLGs on the VOLET substrate measured by KPFM. The photograph shows an AFM image (5. mu. m.times.5 μm) of the SLG. (b) Involving in VDS(ii) the SLG transport characteristics of the liquid gate Gr-FET at-100 mV (c) are shown at VGPattern of Dirac taper Fermi (Fermi-Dirac cone) of SLG on VOLET substrate at 0VCan be used in the energy band diagram. W is related to work function, EDRelated to the Dirac point energy of SLG, X is Al2O3Electron affinity (. about.1.0 eV), Δ EFDExpressed in dirac point energy (E)D) Reference fermi level (E)F)。
Fig. 11 is a diagram showing the structures of a horizontal FET substrate and a liquid gate Gr-FET substrate.
Fig. 12 is a graph of temperature dependence in electrical characteristics with respect to Gr-VOLET.
Detailed Description
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement them. However, the present application is not limited to the embodiments described herein, and can be implemented in various forms. Moreover, portions that are not relevant to the description are omitted in the drawings in order to clearly explain the present invention.
When a certain part is referred to as "including" a certain component throughout the specification, unless otherwise specified, it means that other components may be included without excluding other components.
Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings. However, the present application is not limited to these embodiments and drawings.
Conventional active-matrix (AM) Organic Light Emitting Diode (OLED) displays have a significantly limited device performance in addition to the size of the display due to their inherently complex structure and thus low aperture ratio. In this regard, an organic light-emitting transistor (OLET) may be an alternative to the AM type display.
In the present invention, a graphene-based vertical OLET (Gr-OLET) which is one of low-dimensional electronic structure substances is provided, and the improved characteristics will be described. Gr-OLET devices comprising a luminescent channel layer and a doped graphene source electrode, which can be shown to have a gate voltage of-104Full face hair of high brightness on/off ratioOptical characteristics at 500cd m-2The effective aperture ratio is greatly increased to more than 150% and the parasitic power consumption is greatly reduced to-5% under the light-emitting brightness of the LED. In addition, the present invention having such an excellent operation principle of the element has a mechanism of efficiently modulating the gate voltage through a tunneling process of injecting holes from the graphene source electrode to the channel layer, and can be applied to next-generation display devices, general lighting applications, and practical light emitting transistor devices in other fields.
The organic light emitting transistor of the present invention may be composed of a low dimensional electron structure substance electrode. Here, the low dimensional electron structure substance electrode may be a graphene-based source electrode. The tunneling process of hole injection from the graphene-based source can be modulated by the gate voltage.
Here, a low-dimensional transistor capable of electrical modulation in the longitudinal direction has a more excellent effect than the case of the lateral direction. In the case of the existing CNT-VOLET, CNTs are tangled in a mesh form to form an electrode, but the gate electro-effect is shielded (screen) between longitudinally placed CNTs due to the mesh structure, i.e., the overlapping of the upper and lower portions, so that longitudinal modulation of the potential barrier is not caused (refer to Liu, b. et al, adv. mater.20, 3605-36092008). However, in the lateral direction, modulation of the potential barrier can be performed only in the lateral direction between the CNT and the semiconductor material adjacent to the CNT. For this reason, the CNT electrode structure must be heterogeneous in porosity like a mesh structure. Therefore, it is very difficult to form a porous structure in a plurality of pixels, and productivity is very low. Further, there is a disadvantage that a process for optimizing it is also very difficult. In contrast, the low dimensional material (graphene) electrode of the present invention, which is homogeneous and flat in morphology, has no shielding effect. Therefore, the potential barrier can be easily modulated in the longitudinal direction with a simple structure. However, the large amount of charge injection can be performed only by utilizing the tunneling phenomenon.
Further, an effect obtained by tunneling of holes injected from the graphene-based source will be described. There is hot ion injection or tunneling injection among hole or charge injection. In both cases, the tunneling effect is an injection regime that can induce a current density flow large enough to be applicable for electroluminescence. Therefore, it is only possible to inject or adjust a large amount of charges by the tunneling effect to easily adjust the light emitting state even at high luminance, and thus modulation of the tunneling effect is very important.
The graphene electrode may be obtained by any one physicochemical doping selected from nitrogen doping, gold (Au) doping, chlorine (Cl) doping, fluorine (F) doping, 1 '-dibenzyl-4, 4' -bipyridine dichloride (1,1-dibenzyl-4, 4-dipyridine dichloride) doping, alkali metal carbonate doping, tetrafluorotetracyanoquinodimethane (F4-TCNQ, tetrafluorotropane quinodimethane) doping, and fluoropolymer (CYTOP, fluoropolymer) doping.
In particular, graphene is being used in the presence of iron chloride (FeCl)3) When doping is performed, the light emitting characteristics can be improved, and as a method of doping, iron chloride (FeCl) can be used3) Is treated to obtain the aqueous solution of (4), but is not limited thereto. For example, the graphene electrode may be gold chloride (AuCl)3) And (4) doping.
The organic light emitting transistor of the present invention may include: a substrate; a transparent conductive layer for a gate electrode laminated on the substrate; a dielectric layer laminated on the conductive layer; a source electrode composed of a low-dimensional electronic structure laminated on the dielectric layer; a light-emitting layer laminated on the source electrode; and a drain electrode laminated on the light-emitting layer.
The substrate may be made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyethersulfone (PES), Polyimide (PI), Polycarbonate (PC), Polyurethane (PU), and Polytetrafluoroethylene (PTFE), but is not limited thereto.
The conductive layer of the present invention may be made of a material selected from Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), and tin oxide (SnO)2) Arsenic Trioxide (ATO), tin-fluorine oxide (FTO), zinc oxide (GZO), indium-gallium-zinc oxide (IG)ZO), carbon nanotubes, graphene, silver nanowires, metal nanowires, conductive polymers, and solid electrolytes. A transparent and conductive material may be used. The conductive layer may be formed to a thickness of 10 to 100nm to satisfy such characteristics, and the conductive layer may be formed at a temperature of 100 to 300 ℃ depending on the substrate.
The dielectric layer of the present invention can be made of silicon oxide (SiOx, x.gtoreq.1), aluminum oxide (Al)2O3) Zinc oxide (ZnO), tantalum pentoxide (Ta)2O5) Niobium pentoxide (Nb)2O5) Hafnium oxide (HfO)2) Titanium dioxide (TiO)2) Indium oxide (In)2O3) Silicon nitride (SiNx, x is not less than 1) and magnesium fluoride (MgF)2) Calcium fluoride (CaF)2) One of PET, PEN, PES, PI, PC and PTFE, and more preferably alumina (Al)2O3)。
The organic light emitting transistor of the invention is 500cd m-2The effective aperture ratio of (2) is 150% or more, more preferably 160% or more, and most preferably 170% or more.
The method of manufacturing an organic light emitting transistor of the present invention may include: a step of laminating a conductive layer for a gate electrode on a substrate; a step of laminating a dielectric layer on the conductive layer; a step of laminating a graphene-based source electrode on the dielectric layer; a step of laminating a light emitting layer on the source electrode; and a step of laminating a drain electrode on the light-emitting layer.
The present invention provides a method for manufacturing an organic light emitting transistor, wherein the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate (PET), polyethylene naphthalate (PEN), Polyethersulfone (PES), Polyimide (PI), Polycarbonate (PC), Polyurethane (PU), and Polytetrafluoroethylene (PTFE).
Hereinafter, the present application will be more specifically explained using experimental examples and examples, but the present application is not limited thereto.
Experimental example 1 operational characteristics of Gr-VOLET
FIG. 1 is a diagram relating to the structure of Gr-VOLETs, showing a Bottom-gate comprising Indium Tin Oxide (ITO), Al2O3The schematic structure of Gr-VOLET of gate dielectric layer, SLG source electrode, organic light emitting channel layer and Al metal drain electrode. By the action of Gr-VOLET, holes are injected from the SLG source into the light-emitting channel layer, and electrons are injected from the Al drain into the light-emitting channel layer. By the operation of Gr-VOLET, the holes can be injected from the SLG source by applying the gate voltage VGS(or V)G) Carrying out modulation of VGThe application essentially has an influence on the electroluminescence process generated in the channel layer.
FIG. 2 shows a fixed source-drain voltage (V) at-3.8VDS) (or V)SD3.8V) at various VGEmission of EL light for the Gr-VOLET sample in the bottom run. As shown in fig. 2, the EL emission shows a uniformly bright state (on state), gray, and dark state (off) for the (-) gate voltage, the 0 gate voltage, and the (+) gate voltage over the entire area of the pixel.
FIG. 3 shows the measured EL emission spectrum, which is almost the same as that of the conventional ITO-OLED.
Fig. 4 shows the applied voltage and luminance over time. Fixed V at 3.8VSDLower pair of step voltages (V) applied to the gate of the Gr-VOLETG± 40V) has a very fast rise and fall time of the response time of Gr-VOLET, 4.7ms and 2.8ms, respectively, which is faster than the conventional LCD. In order to clearly understand the characteristics of the Gr-VOLET element having such excellent effects, three types of SLG materials (examples 1 to 3 described later) were used as the source electrode and analyzed.
[ example 1]
SLG (hereinafter referred to as "SLG") having inherent characteristics by electrochemical cleaning1”)
[ example 2]
With ferric chloride (FeCl)3) p-type doped SLG (hereinafter, referred to as "SLG2”)
[ example 3]
SLG (hereinafter, referred to as "SLG") coated with poly (3, 4-ethylenedioxythiophene): poly (styrene sulfonate) (PEDOT: PSS) Hole Injection Layer (HIL)3”)
The basic physical properties of SLG1 to SLG3 can be confirmed by fig. 9 to 11 and table 2.
FIG. 5 shows the SLG of examples 1 to 31To SLG3The results of the analysis were performed using the output characteristics of the Gr-VOLET prototype element as the source electrode. The characteristics of the Gr-VOLETs, i.e., the characteristics of the diode (Gr-OLED), were observed in order to compare the gate electrodes of the elements in a state separated from an external circuit. As can be seen from FIG. 5, three types of J of Gr-VOLETSD-VSDAnd L-VSDThe characteristics have the following three main inherent features.
(1) Initial voltage (V) of elementonset) Can be much lower than the starting voltage (V) of the comparison element Gr-OLEDonset)。
(2) Even at low VSDLower, JSDAnd L may both be increased.
(3) By pairs of VGSwitching can modulate the EL emission from a bright state to a dark state.
Here, among the three Gr-VOLETs, there is SLG2Gr-VOLET (Gr-VOLET) of source electrode2FIG. 5 (b)) shows the Gr-OLED ratio2More excellent element performance. For example, at VGWhen the value is-40V, JSDHigher value than Gr-OLED2A low value of (2.3V) of luminanceonsetAnd, VSDAt 6.0V, the luminance L reached 2,000cd m-2This is a Gr-OLED 22 times (L-740 cd m)-2And Vonset2.5V). This result is shown by VGFrom SLG2The charge (hole) injection of the source electrode is improved and balanced. In contrast, since the switch for hole injection at the source of the SLG is turned off, it is at VGGr-VOLET at +40V2J of (A)SDAnd L is greatly reduced. At VG. + -.40V, J is shownSDAnd the maximum on/off ratio of L is about 102And 104. Therefore, it is known that the doped SLG is used2Gr-VOLET of source electrode2Use of SLG with gate voltage induced hole injection modulation ratio2Source (Gr-VOLET)1) Or SLG3Source electrode (Gr-VOLET)3) The other Gr-VOLETs of (a) are more effective.
Experimental example 2 Charge injection Process in SLG Source
The hole injection mechanism from the SLG source to the SY channel layer was confirmed. To inject holes through the SLG/SY interface, the potential barrier at the interface must be overcome by either (1) a thermionic emission process or (2) a tunneling injection process. FIG. 6 (a) shows a signal at VGFowler-Nordheim (FN) at 0V for three Gr-VOLETs, i.e. for In (J/V)SD 2) 1/V ofSD. As can be seen from the graph, for the transition voltage (V)T) Two distinct charge injections were performed. That is, when 1/VSD>1/VTThe injection process of the main charge carriers (holes) follows schottky thermionic emission. However, when 1/VSD<1/VTThe hole injection process is then transformed into a tunneling process, which shows the graphical characteristic of negative slope in all Gr-VOLETs.
FIG. 6 (b) shows the results for various VsGGr-VOLET of2Schematic representation of F-N. As shown in the figure, VGAffecting the schottky thermionic emission and tunneling processes. Thus, VTStrongly dependent on VG. Since when VSD(>Vonset) Greater than VTEL emission from Gr-VOLET occurs, and therefore, the main hole injection process responsible for EL emission is analyzed by tunneling injection process. According to the improved tunneling current model, the tunneling current density (J) of a single charge carrier passing through the triangular wall at the metal/polymer junction is related to the height Φ and temperature T of the barrier.
I.e., ln (J/V)SD 2)＝–P1/VSD+ln(P2/VSD)–ln[sin(P3/VSD)]，Φ＝(3/2)πkBT(P1/P3). Wherein J is the current density (J)SD)，kBIs the Boltzmann constant, PiIs a parameter related to phi. (reference: Koehler, M.&H ü mmelgen, I.A.appl.Phys.Lett.70,3254-3256,1997 years)
The barrier height Φ s ((c) in fig. 6) obtained by analyzing the F — N curve using the above-described relational expression almost agrees with the value in the literature. In which SLG2At the/SY interface, the maximum modulation of Φ induced by the gate voltage can be observed along the perpendicular (longitudinal) direction of the interface.
That is, at VGAt ± 40V, Δ Φ is about 110meV, which is much larger than SLG1SY (-60 meV) and SLG3Δ φ values for the/SY (20 meV) element.
For reference, when VSD>VonsetAt this time, since a small amount of carriers (electrons) are injected from the Al drain into the SY channel layer, the theoretical prediction starts to deviate from the experimental data. However, it is clear that V at the SLG/SY interface is associated with EL emissionSD>VonsetThe main hole injection process in the case is a tunneling process. Since Schottky hot ion implantation, which is an injection process of other holes, is largely dependent on T, Gr-VOLET can be used2J of (A)SD-VSDThe weak T dependency check confirms that the tunneling process is the primary effect (see fig. 12).
Therefore, the tunneling analysis of the present invention clearly operates on a different principle than the conventional graphene-based transistor element or the lateral (horizontal) barrier height modulation-based CNT-VOLET due to the schottky thermal ion implantation modulation.
Next, the effect of gate bias-induced modulation on the fermi level (work function) of SLG was investigated. V is shown in FIG. 7 (a)GThe variation induces modulation of the work function of the SLG. At SLG1Observed in the case of the source, as a function of VGChange of work function from 4.44eV to 5.00eV at SLG2In the case of the source, the modulation observed for the downward shift in the work function is from 4.72eV to 5.29eV, a value close to SYThe HOMO level of the channel layer (-5.3 eV). In addition, a large hysteresis was observed, which is attributed to the Al used2O3Charge trapping of the layer (Li, y, et al, j. nanosci. nanotechnol.9, 4116-41202009). In contrast, SLG3Exhibiting a small modulation of the work function. This is due to SLG3PEDOT of the source: the negatively charged PSS in the PSS HIL is shown in FIG. 6 (c) (ref: Greczynski, G., et al Thin Solid Films 354,129-135, 1999). Thus, PSS induces a strong electrostatic field and can attenuate the gate-potential effect.
Thus, the Gr-VOLET can be represented by a graph of energy levels2The principle of action of (1). At a given VSDPositive gate bias down (V)G>0V) induce SLG along the direction of increasing phi2The upward shift in the fermi level of the source reduces the tunneling and hence hole injection to the HOMO level of the SY channel layer.
In contrast, a negative gate voltage (V)G<0V) causing SLG2The downward shift in the fermi level of the source significantly reduces Φ (improves tunneling) and results in increased hole injection and improved EL performance. Thus, the main mechanisms of action of the Gr-VOLET are gate bias induced modulation of hole tunneling injection and band bending effects.
For Gr-VOLET2The transmission characteristics of (a) will be explained. As shown in fig. 7 (b), at low gate leakage current density (J)G) Lower, Gr-VOLET2Usually at negative VGLower is "on state" at positive VGThe lower is the "off state". (upper end of (b) in fig. 7) in addition, a hysteresis curve worth paying attention to the transmission curve was observed, and it was confirmed that for two V' sG0V Gr-VOLET2The Bistable (Bistable) switching action (or memory effect) (lower end of (b) in fig. 7).
Experimental example 3 effective aperture ratio and Power loss of Gr-VOLET
The effective aperture ratio of Gr-VOLET, AR, was estimated as compared to a control OLED (ITO-OLED) fabricated using the same process on top of an ITO cathodeeffAnd power loss.
FIG. 8 (a) comparesEL performance of Gr-VOLET in the ON (ON) state and various control standard ITO-OLEDs. In these Gr-VOLETs, at VSD<4.0V region of source-drain voltage, only Gr-VOLET2Shows higher luminance characteristics than the control standard ITO-OLED (ITO/SY/CsF/Al). For example, at VSDWhen 3.8V, Gr-VOLET2Emission 490cd m-2While emitting 455cd m in contrast to a standard ITO-OLED-2The luminance of (1).
FIG. 8 (b) compares the "current efficiencies" of Gr-VOLET and its control standard ITO-OLED (η)Cs)". Here, Gr-VOLET, in contrast to the results of other Gr-VOLETs2More efficient than ITO-OLEDs. For example, at 500cd m-2Gr-VOLET at luminance2At a ratio η achieved by a control standard ITO-OLEDCEmits EL light with an efficiency of about 154%.
This is because the Gr-VOLET emits light from the entire surface. Thus, Gr-VOLET2AR ofeffThe value can be assumed to be 154%. In addition, in 2000cd m-2At a luminance of Gr-VOLET2Still maintaining 162% of the increased AReff. Therefore, Gr-VOLET is comparable to other elements (see Table 1 below), even at high luminance2Also show a significant increase in AReffAnd (4) horizontal. This improved Gr-VOLET2AR ofeffProviding other important advantages.
That is, increased AReffThe level can be interpreted as an increase in the effective emitting area. Thus, even at lower JSDThe brightness of the element can also be maintained. Therefore, the lifetime of the element is 1/J2Proportional (Tsujioka, T. et al Jpn.J.appl.Phys.40,2523-2526 (2001)), so this low JSDThe lifetime of the element may also be increased.
Next, infer Gr-VOLET2"parasitic power consumption" of (1). From the above description, it can be seen that in VSDWhen 3.82, Gr-VOLET2Luminance level of 500cd m-2，AReffThe ratio was 154%. In order to compare a standard ITO-OLED with such a Gr-VOLET2Is consistent with the required emission of a standard ITO-OLED through 154% opening324cd m-2The required applied voltage at this time was 3.62V.
Thus, in Gr-VOLET2In VSDAt 3.82V, the parasitic power consumption was very small, only about 5.2%, as the integrated transistor element was reduced by 0.2V. Such a Gr-VOLET2Much lower than the existing CNT-VOLET levels (6.2%) or TFT-OLED and MIS-OLET levels ((2))>50％)。
Furthermore, even in the off state (V)GNot +40V), Gr-VOLET2The power consumption of (2) is also very low. Relative to at VSD3.82V and VG500cd m at-40V-2Is bright ON (ON) -state of the light source, and exhibits luminance at VGWhen the current density is +40V, the current density in the OFF state is-0.58 mA cm-2Considering the assumption of a 50-inch display panel size, the power consumption is estimated to be 15W, which is much lower than that of the conventional CNT-VOLET (67W) and LCD (100-200W) of the same panel size (refer to McCarthy, M.A. et al, Science 332,570-573, 2011).
Therefore, exceeds Gr-VOLET2The increased effective aperture ratio of 150% and the parasitic power consumption characteristics greatly reduced to 5% are the highest and lowest values observed so far in OLETs (see table 1 below). Table 1 below is at 500cd m-2The effective aperture ratio between various elements and the parasitic power consumption under the luminance of (1).
[ Table 1]
The upper element uses a green phosphorescent emitter Ir (ppy)3。
Relating to effective Aperture Ratio (AR)eff) It is defined as the ratio of the current efficiency of the element with an aperture ratio of 100% to that of the control standard element ITO-OLED. Here, the aperture ratio is defined as, and in addition to switching the TFTs and addressingThe ratio of the total area of the elements outside the line compared to the light emitting area of the elements.
The percentage of power consumed in the driving transistor element which is an element not contributing to the generation of light, luminance (L)D) Can be defined as LD＝LO×AReffWherein (L)O) The luminance is.
The Gr-VOLET element described above may also have the following features.
(1) The performance of the element can be improved. By further optimizing the material used, the light-emitting performance of the element can be further improved. Specifically, instead of SY used as a light emitting material, a low molecular material including a luminescent fluorescent or phosphorescent dopant of red, green, and blue colors may be used. In addition to the organic polymer semiconductor material, a mixed material of an inorganic semiconductor material such as quantum dots and perovskite may be used. This is expected to produce a very bright and efficient Gr-VOLET having a high aperture ratio.
(2) Instead of using thick Al2O3A dielectric layer, a thin layer grown by other deposition methods such as Atomic Layer Deposition (ALD) may be used. This enables the manufacture of low V below 5VGEfficient Gr-VOLET operating horizontally, enabling the use of a-Si TFT backplanes (backplanes).
(3) With respect to the above Gr-VOLET using a graphene source electrode of a low dimensional electron structure for injecting holes, if a drain electrode for injecting electrons is used by adjusting the work function of the graphene electrode of a low dimensional electron structure, it is expected that a Gr-VOLET element of an inverted structure can be realized.
Therefore, the improved aperture ratio, low power consumption, and the improvement of switching performance with reliability of the Gr-VOLET element having a doped SLG source of the present invention are achieved even at a higher luminance level, thereby having an excellent light emitting transistor function. The element of the present invention is suitable for use as a novel voltage-driven light-emitting element and a light-emitting display element.
The present invention relates to a Gr-VOLET composed of a uniform SLG source, a light emitting channel layer, and an Al drain, and is capable of obtaining effective switching element performance by applying a gate voltage with a simple Gr-VOLET structure.
I.e. by using doping with FeCl3The SLG source of (1) can realize a low voltage operation and a high contrast. In addition, the effective aperture opening ratio of the Gr-VOLET is greatly improved to 150-160%, and the consumed power is also greatly reduced. This characteristic of Gr-VOLET is the fermi level shift caused by the SLG source gate voltage, effectively modulating the hole tunneling injection process from the SLG source to the light emitting channel layer.
Therefore, the whole-area light emitting Gr-VOLET of the present invention, which has a simple structure and is easy to process, can be used as a new platform capable of developing a top-emitting element and a next-generation display element.
Experimental example 4 raman spectrum of SLG electrode on VOLET substrate
The raman spectrum of SLG has two strong characteristic peaks. Is caused by sp2E bonded to carbon atoms21596-1600 cm in g vibration mode-12650-2664 cm of secondary vibration type caused by phonon (phonones) scattering exists at the nearby G waveband and waveband boundary-1Nearby 2D bands. It can be observed that, at 1330cm-1Nearby disorder induced sp3The D-band of the bond is very small, indicating that the embodiment has fewer drawbacks. From the Raman peak intensity, SLG1And SLG2(FeCl3Doped SLGs) the ratio of the raman intensity of the G-band to the 2D-band is about 1.8 to 1.7, indicating that the SLG studied is a high quality monolayer graphene. Further, from the peak position observation value, SLG1Respectively located at 1579cm-1And-2669 cm-1And SLG2Respectively, the G and 2D peak positions of (A) are shifted upwards to 1585cm-1And-2677 cm-1. Furthermore, similar to SLG2SLG of PEDOT PSS HIL coating was confirmed3At 1585cm-1Has a G peak at position of-2674 cm-1With a 2D peak. Compared with graphene in the prior art (Q.H.Wang et al, nat. chem.4, 724-7322012)Comparison of the relationship between G and 2D Peak positions confirms the SLG of the present invention1Is a type of pure graphene, and SLG2And SLG3Is p-type doped graphene (see fig. 9).
[ Experimental example 4] characteristics of SLG used for Gr-VOLET
Fig. 10 shows the physical and electrical characteristics of the SLG measured at the pixel area of the VOLET substrate. Fig. 10 (a) shows the work function distribution of SLG measured with KPFM. Work function (W) of SLGSLG) Is a surface contact potential difference (V) measured by KPFM in SLG and a reference HOPG (high grounded pyrolitic graphite, HOPG, ZYB, Optigraph GmbH)CPDs) are compared. I.e., WSLG＝WHOPG+[VCPD(HOPG)–VCPD(SLG)]Wherein W isHOPGIs the work function of HOPG (-4.6 eV). SLG on VOLET substrate1The expected average work function of (2) is about 4.70 +/-0.10 eV, which is reasonably consistent with the original work function of 4.5-4.8 eV of single-layer graphene. And SLG1In contrast, SLG2Increases the work function to 5.21 + -0.07 eV, which is mainly attributed to FeCl3And (4) doping. And SLG2Similarly, SLG3Has a work function of about 5.21 + -0.06 eV.
Meanwhile, the AFM shape of SLG was observed. (inset of (a) in fig. 10) SLG shows a fairly flat surface on the VOLET substrate according to AFM shape. All SLGs showed almost identical AFM shapes with small RMS roughness of 1.4 to 2.0 nm.
In fig. 10 (b), a liquid gate Gr-FET having an SLG channel (channel length 50 μm, see fig. 11) was evaluated, and the transmission characteristics of SLG were observed. At SLG1In the case of a channel, the Gr-FET exhibits a well-defined symmetrical V-shape IDS-VGCurve, wherein the charge neutral point gate voltage (or dirac point, V)Dirac) Is 0.09V/VAg/AgClClearly confirming undoped SLG1. (upper end graph of (b) in FIG. 10) according to SLG1V ofDiracDirac point (E) for vacuum energy levelD) The energy level of (A) can be based on the oxidation-reduction potential of a ferrocene reference substance by the following relationshipAnd (5) obtaining the result. ED＝[-(eVG,Dirac-E1/2(Fc/Fc+))-4.8]eV, where 4.8eV is the absolute energy level for ferrocene/ferrocenium salt (Fc/Fc +) redox of vacuum order and E1/2(Fc/Fc+)0.45 eV. According to the above relationship, for SLG10.09V/VAg/AgClV ofDiracThe value provides a Dirac point energy (E) of 4.44eVD). E of 4.44eVDThe value was well matched to the value of 4.49eV of epitaxial (epitaxial) epitaxial single-layer graphene, and it was confirmed again that SLG used in the present invention1Is indeed undoped SLG. And SLG1Channel difference, SLG2The channel exhibits a well-defined asymmetric V-shaped characteristic due to the Dirac point potential (V)Dirac～0.54V/VAg/AgCl) Large movement (middle graph of (b) in fig. 10). VDiracPositive shift change of (A) indicates SLG2Is through FeCl3To form p-type (hole) graphene. SLG2Middle putative EDAbout 4.89 eV. E of 4.89eVDE with a value much higher than that of graphene manufactured by single-layer epitaxyDThe SLG was found to have a value of about 4.49eV2Is p-type doped. And SLG2Similarly, SLG3The channel also exhibits VDiracA value of-0.63V/VAg/AgClThe clear asymmetric V-shaped curve of (a). (lower end graph of (b) in FIG. 10) using VDiracConfirmed SLG3E of (A)DThe expected value is about 4.98 eV. Thus, it can be seen that SLG3Work function and dirac point energy of and SLG2The results are similar, whereas PEDOT: PSS HIL can dope SLG p-type.
The carrier mobility μ of SLG is determined by using μ ═ L/WC (L/WC) according to the transmission characteristicsgVDS)(ΔIDS/ΔVG) The relationship (c) is estimated. Wherein L, W and Cg are the channel length (50 μm), width (1600 μm), and the top gate capacitance of graphene is (-1.9 μ F cm)-2) (reference: Y.Ohno et al Nano Lett.9,3318-3322, 2009). SLG1Respectively, hole and electron mobilities of about 580cm2V-1s-1And-530 cm2V-1s-1. This is higher than SLG2Of (2) to 410cm2V-1s-1And SLG3Of 530cm2V-1s-1Hole mobility of (2). (see Table 2 below)
Table 2 below relates to SLG1To SLG3The basic properties of (a).
[ Table 2]
The average value is V obtained by at least four devicesG＝0V
From the above observation, we can estimate the band diagram of SLG studied on the VOLET substrate when VG is 0V (see (c) in fig. 10). Delta E in the graphFDRepresenting the energy E for the Dirac pointDThe fermi level of. At SLG1In the case of (1), Δ EFDAbout 0.26eV, lower than 0.32eV for example 2, but similar to SLG30.23eV in the case of (2). Furthermore, it was also concluded that for Indium Tin Oxide (ITO)/aluminum oxide (Al)2O3) Potential difference (Delta) at/SLG interface. Example 1 has a delta value of 0.50eV, example 2 and SLG3The values of Δ (E) of (A) and (B) of (D) were all-0.01 eV, it was found that the potential difference at the interface was remarkably decreased after doping with SLG.
Experimental example 6 lateral FET substrate and liquid gate Gr-FET
In the left side of FIG. 11, L (channel length) is 50 μm and W (channel width) is 1600 μm as the structure of the horizontal FET substrate. The right panel of FIG. 11 is composed of TBAPF containing ACN (acetonitrile) and 100mM6(tetrabutylammonium hexafluorophosphate) and a non-aqueous electrolyte, and a liquid-gate Gr-FET. In an ACN electrolyte solution, at VDSAt 100mV using an Ag/AgCl reference electrode at 30mV s-1The SLG channel was measured by changing the gate voltage to the reference electrode continuously from-0.8 to + 0.8V. Generally, the liquid gate electrode has a higher capacitance than the back gate electrode, and thus exhibits more excellent transfer characteristics than the conventional Gr-FET back gate electrode (refer to Y. Ohno et al Nano Lett.9,3318-3322,2009).
[ Experimental example 7] temperature dependence of Gr-VOLET Electrical characteristics
FIG. 12 relates to V at various temperaturesG0V (left) and VGSLG at-40V (right) voltage2J of Gr-VOLETSD-VSDAnd (4) characteristics. J. the design is a squareSD-VSDThe characteristic curve shows that SLG is present in the observed temperature range2Charge injection at the/SY interface at VSD>VTThe temperature dependence is small in the range of (-0.5-1.0V).
The method for manufacturing the graphene-based organic light emitting transistor of the present invention is as follows.
Production example method for producing graphene-based organic light-emitting transistor
The present invention provides an organic light emitting transistor manufactured by using graphene having a flat and easily processed low-dimensional electronic structure as a source electrode. This is because graphene, which is one of low-dimensional electronic structure materials, is sp having a hexagonal lattice structure as a carbon atom2Morphologically bound two-dimensional substances, single-layer graphene (SLG) has excellent light transmittance and electrical conductivity by virtue of a planar structure.
In addition, the graphene-based organic light emitting transistor (Gr-VOLET) of the present invention can effectively modulate device performance using a gate voltage. The manufactured Gr-VOLET has an extremely low power loss characteristic and an effective aperture ratio characteristic that is greatly improved to 150% or more even at high luminance, and a mechanism for effectively modulating a gate voltage by a tunneling process of injecting holes from a source electrode to a channel layer.
The method for manufacturing a graphene-based organic light emitting transistor according to the present invention includes steps of (1) preparing a substrate- > (2) transferring graphene- > [ if necessary, (3) cleaning, dedoping, or additionally doping SLG- > ] (4) manufacturing a VOLET element.
Production example 1 preparation of substrate
The used vertical-type organic light-emitting transistor (VOLET) substrate is composed ofPre-patterned back gate electrode on a glass substrate of indium tin oxide (ITO,30 Ω/sq sheet resistance) at a thickness of 80nm and aluminum oxide (Al) sputter deposited as a gate dielectric layer on the gate electrode2O3400nm) upper layer composition: (glass/ITO/Al)2O3). The fabricated VOLET substrate was previously cleaned with ethanol before the graphene-based device was fabricated, and then subjected to ultraviolet treatment for 5 minutes. Meanwhile, metal source and drain electrodes patterned in a lateral direction with a chromium (Cr) layer of 5.5nm thickness and a gold (Au) layer of 50nm thickness were formed on the VOLET substrate, thereby preparing a field-effect transistor (FET) substrate. The electrodes are formed in a vacuum deposition process using a shadow mask. The channel length (L) and width (W) of the FET were 50 μm and 1600 μm, respectively. (refer to FIG. 11)
Production example 2 graphene transfer
The transfer of graphene (Gr) grown by a Chemical Vapor Deposition (CVD) method onto a target substrate of an FET substrate, a VOLET substrate, or a glass substrate is performed by the following process.
(1) Single layer graphene is grown on copper foil using CVD methods. The previously cleaned copper foil was placed in a quartz tube chamber and the temperature was raised to 1000 ℃ under Ar conditions (10 sccm). For graphene growth, at 2.7x 10-2Using CH under Pa4(30sccm) and H2(10 sccm).
(2) A Polymethylmethacrylate (PMMA) solution (950 pmac 4, MicroChem) was spin coated on CVD graphene on copper foil at 3000rpm for 60 seconds. The graphene film grown on the copper back side was removed by atmospheric oxygen plasma. Next, FeCl as an etching solution was used at 50 deg.C3A Cu/Gr (Cu/Gr/PMMA) sheet after PMMA coating with a width of 4mm and a length of 20mm was suspended on an aqueous solution (UN2582, Transene Co. Inc.). For complete etching of the copper foil for 10 minutes, the Gr (Gr/PMMA) platelets of PMMA coating were then suspended in FeCl 3 solution for 10 minutes, using FeCl3The Gr film is doped. The Gr/PMMA block was then rinsed 2 to 5 times (10 min) with deionized water (DI). After transfer to a target substrate, the Single Layer Graphene (SLG) will be transferredThe substrate was dried under reduced pressure (. about.1 Pa) for one hour and left to dry in the atmosphere for one day. Next, the PMMA support layer was removed by dissolving PMMA in chloroform (60 minutes), monochlorobenzene (30 minutes), and chloroform (30 minutes) in this order.
Production example 3 cleaning and dedoping of SLG
For cleaning and dedoping SLG on the substrate, a solution of tetrabutylammonium hexafluorophosphate (TBAPF) with a concentration of 100mM was used6,>99.0%, Aldrich) acetonitrile (ACN, 99.8%, Aldrich) in a non-aqueous electrolyte using a bubble-free Electrochemical (EC) treatment method. SLG (4 mm. times.20 mm) transferred onto the substrate was used as a working electrode, a platinum wire was used as a reference electrode, and an Ag/AgCl electrode (3.5M KCl) was used as a reference electrode.
Use of newly manufactured SLG in negative voltage range (0.0 to-0.7V/V)Ag/AgCl) Below by 0.5Vs-1The EC cleaning process was performed for 10 minutes at the voltage change speed of (1). After the cleaning process, the treated SLG was rinsed several times with pure ACN and deionized water, followed by N2The gas is dried, thereby removing the electrolyte from the SLG surface. To correct the electrode potential, ferrocene (ferrocene) (98%, Sigma Aldrich) was used as a redox reference substance.
Production example 4 production of VOLET device
The structure and manufacturing process of the VOLET (Gr-VOLET) having the SLG source will be described (see fig. 1). The Gr-VOLET is composed of an organic semiconductor functional channel layer including a transparent SLG source contact portion, a light Emitting Material Layer (EML) and a metal drain electrode on a VOLET substrate on which an ITO gate electrode and alumina (Al) thereon are formed in advance2O3) A gate dielectric layer. To construct a Gr-VOLET, an SLG of about 0.36nm thickness with an area of 4mm by 20mm was transferred onto a VOLET substrate as described above. The SLG contact used was an SLG cleaned with EC1Or doped with ferric chloride (FeCl)3) SLG of (2)2. Next, an organic semiconductor substance is formed on the source electrode region. Luminescent super yellow (SY, poly (p-phenylene vinylene) copolymer, Merck OLED Materials GmbH, 70nm thick) layer is formed as a light emitting channel by spin coatingAnd (3) a layer. As the Hole Injection Layer (HIL), poly (3, 4-ethylenedioxythiophene): poly (styrene sulfonate) (PEDOT: PSS, CLEVOSTM 4083, HC Starck Inc.) SLG rinsed with EC can be formed by spin coating prior to formation of SY layer3On the source electrode. Then, 2nm thick CsF Electron Injection Layer (EIL) and Al drain electrode (65nm thick) were set at less than 0.05nm s-1Deposition rate vacuum deposition fabrication (2.7 × 10)-4Pa) on top of SY film. The fabricated device was finally encapsulated in epoxy and coverslips in a nitrogen filled glove box.
Production example 5 characteristics of SLG and SLG-based device
The surface roughness and the change in surface potential of the SLG on the substrate were measured using a non-contact AFM and also KPFM (FlexAFM, Nanosurf AG), in which case a Pt/Ir coated silicon tip with an AC voltage of 1V applied at a frequency of 18kHz was used.
At this time, highly oriented pyrolytic graphite (HOPG, ZYB, Optigraph GmbH) was used as a reference surface to correct the work function measurement of SLG. In the case of the prepared SLG, Raman spectroscopy was measured using a confocal Raman system (LabRamAlramis, Horida Jobin-Yvon) with a laser (1 mW output from the sample surface) source operating at 514.5 nm.
In association with the transport characteristics of SLG, a liquid-gate lateral graphene FET (Gr-FET) was produced using the same ACN electrolyte as used in the EC cleaning process. For Gr-FET having an SLG channel on top of the FET substrate, the SLG channel passes through at 30mV s-1Varying the gate voltage from-0.8 to 0 to +0.8V changes the potential of the Ag/AgCl reference electrode, thereby gating through the ACN electrolyte. V applied at this timeDSThe value was set at 100 mV. The electrical properties of the Gr-FET were measured using a source meter (Keithley 2400).
The device performance of Gr-VOLET was measured using two source tables (Keithley2400) and a colorimeter (CS-2000, Konica Minolta). During the operation of Gr-VOLET, -source-drain voltage VDS(＝-VSD) And a gate voltage VGS(or V)G) To the SLG source contact held at ground potential.
The optical properties of the functional layers and the elements were investigated using a UV-visible spectroscopy system (8453, Agilent). In the visible region (400 to 800nm), the average light transmittance (-92%) of the SLG source on the VOLET substrate was confirmed to be similar to-92% of the ITO coated glass substrate. The emission characteristics of the device were investigated using an LED measurement system with an integrating sphere (LCS-100, sphereooptics inc.).
The present invention relates to a vertical-type organic light emitting transistor (Gr-VOLET) to which a graphene-based source electrode that is flat and can be easily processed is applied, as an alternative to current driving of a related art Organic Light Emitting Diode (OLED). Graphene is a representative two-dimensional substance having a form of a single layer of a carbon-based hexagonal lattice structure, and a single-layer graphene source electrode and a single-layer graphene light-emitting channel layer are used for Gr-VOLET, and the operation of the Gr-VOLET element is effectively modulated by applying a gate voltage, and the surface emission type performance is effectively modulated. In the presence of doped iron chloride (FeCl)3) The gate voltage of Gr-VOLET of the SLG source of (1) can be controlled to 104The whole surface electroluminescence is well controlled by a high-luminance on/off ratio (contrast ratio).
Furthermore, by introducing a doped SLG source, low voltage operation, high light-dark contrast, and improved luminance can be achieved.
In the Gr-VOLET element of the present invention, hole tunneling injection can be efficiently modulated to the light emitting channel layer by moving the fermi level of the SLG source induced with the gate voltage. In addition, the Gr-VOLETs have a very high effective aperture ratio exceeding 150% even at high luminance, and can be applied to an Active Matrix (AM) type display because parasitic power consumption is extremely low. Accordingly, the voltage-driven type Gr-VOLETs can complement the disadvantages of the AM-OLED by eliminating the intrinsically complicated structure of the existing active matrix OLED (AM-OLED) and eliminating the low aperture ratio.
In the present invention, as a new platform of a light emitting element, a new and highly efficient surface emitting type light emitting transistor based on a p-type doped SLG source is provided. In addition, modulation of the charge injection characteristics provides a detailed understanding of tunneling of the potential barrier of the SLG surface, so that development of a new small-sized, high-performance, low-cost graphene-based optoelectronic element can be induced, and it can be applied to next-generation displays, tip illumination systems, and the like.
The above description of the present application is for illustration, and those skilled in the art will appreciate that the present invention can be easily modified in other specific forms without changing the technical idea and essential features of the present application. It is therefore to be understood that the above described embodiments are illustrative and not restrictive in all respects.
The scope of the present application is defined by the claims, not by the above detailed description, and it should be understood that all modifications or variations derived from the meaning and scope of the claims and their equivalents are included in the scope of the present application.
Claims (26)
1. An organic light emitting transistor has an electrode made of a low dimensional electron structure substance, and performs charge injection by using an electric field induced tunneling phenomenon.
2. The organic light emitting transistor according to claim 1,
the electrode composed of the low-dimensional electronic structure substance is a source electrode or a drain electrode made of one or two or more substances selected from graphene, a carbon nanotube, a nanowire, a silver nanowire, metal halogen, molybdenum disulfide, titanium disulfide and tungsten diselenide.
3. The organic light emitting transistor according to claim 1,
the electrode composed of the low dimensional electronic structure substance is a graphene-based source electrode or drain electrode of a single-layer or multi-layer structure,
the tunneling process of the charge injected from the graphene electrode is modulated with the gate voltage.
4. The organic light emitting transistor according to claim 3,
the graphene electrode is obtained by physicochemical doping of any one selected from nitrogen doping, gold doping, chlorine doping, fluorine doping, 1 '-dibenzyl-4, 4' -bipyridine dichloride doping, alkali metal carbonate doping, tetrafluorotetracyanoquinodimethane doping, and fluoropolymer doping.
5. The organic light emitting transistor according to claim 4,
the graphene electrode is doped with ferric chloride or gold chloride.
6. The organic light emitting transistor according to claim 1,
the electrodes made of the low dimensional electronic structure substance are capable of electrically modulating the potential barrier in the longitudinal direction.
7. An organic light emitting transistor comprising:
a substrate;
a conductive layer laminated on the substrate;
a dielectric layer laminated on the conductive layer;
a source electrode for hole injection, which is composed of a low-dimensional electron structure substance laminated on the dielectric layer;
a light emitting layer laminated on the source electrode; and
and an electron injection drain electrode laminated on the light-emitting layer.
8. The organic light emitting transistor according to claim 7,
the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate, polyethylene naphthalate, polyethersulfone, polyimide, polycarbonate, polyurethane, and polytetrafluoroethylene.
9. The organic light emitting transistor according to claim 7,
the conductive layer is made of any one selected from indium tin oxide, indium zinc oxide, tin oxide, arsenic trioxide, tin fluoride oxide, zinc oxide, indium gallium zinc oxide, a carbon nanotube, graphene, a silver nanowire, a metal nanowire, a conductive polymer, and a solid electrolyte.
10. The organic light emitting transistor according to claim 7,
the dielectric layer is made of one substance selected from silicon oxide (SiOx, x is more than or equal to 1), aluminum oxide, zinc oxide, tantalum pentoxide, niobium pentoxide, hafnium oxide, titanium dioxide, indium oxide, silicon nitride (SiNx, x is more than or equal to 1), magnesium fluoride, calcium fluoride, PET, PEN, PES, PI, PC and PTFE.
11. The organic light emitting transistor according to claim 7,
the luminescent layer is made of low molecular materials, organic polymer semiconductor materials, inorganic semiconductor materials of quantum dots, perovskite or mixed materials thereof.
12. The organic light emitting transistor according to any one of claims 7 to 10,
at 100cd m-2The effective aperture ratio of (2) is 100% or more.
13. A method of manufacturing an organic light emitting transistor, comprising:
a step of laminating a conductive layer for a gate electrode on a substrate;
a step of laminating a dielectric layer on the conductive layer;
a step of stacking a source electrode for hole injection made of a low-dimensional electron structure material on the dielectric layer;
a step of laminating a light emitting layer on the source electrode; and
and a step of laminating an electron injection drain on the light-emitting layer.
14. The method of manufacturing an organic light emitting transistor according to claim 13,
the electrode composed of the low dimensional electronic structure substance is a source electrode or a drain electrode made of one or two or more substances selected from graphene, carbon nanotubes, nanowires, silver nanowires, metal halides, molybdenum disulfide, titanium disulfide, and tungsten diselenide.
15. The method of manufacturing an organic light emitting transistor according to claim 13,
the electrode composed of the low dimensional electronic structure substance is a graphene-based source electrode or drain electrode of a single-layer or multi-layer structure,
the tunneling process of the charge injected from the graphene electrode is modulated with the gate voltage.
16. The method of manufacturing an organic light emitting transistor according to claim 15,
the graphene electrode is obtained by any one of physicochemical doping selected from nitrogen doping, gold doping, chlorine doping, fluorine doping, 1 '-dibenzyl-4, 4' -bipyridine dichloride doping, alkali metal carbonate doping, tetrafluorotetracyanoquinodimethane doping, and fluoropolymer doping.
17. The method according to claim 16, wherein the graphene electrode is doped with ferric chloride or gold chloride.
18. The method of manufacturing an organic light emitting transistor according to claim 13,
the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate, polyethylene naphthalate, polyethersulfone, polyimide, polycarbonate, polyurethane, and polytetrafluoroethylene.
19. The method of manufacturing an organic light emitting transistor according to claim 13,
the conductive layer is made of any one selected from indium tin oxide, indium zinc oxide, tin oxide, arsenic trioxide, tin fluoride oxide, zinc oxide, indium gallium zinc oxide, a carbon nanotube, graphene, a silver nanowire, a metal nanowire, a conductive polymer, and a solid electrolyte.
20. The method of manufacturing an organic light emitting transistor according to claim 13,
the dielectric layer is made of one substance selected from silicon oxide (SiOx, x is more than or equal to 1), aluminum oxide, zinc oxide, tantalum pentoxide, niobium pentoxide, hafnium oxide, titanium dioxide, indium oxide, silicon nitride (SiNx, x is more than or equal to 1), magnesium fluoride, calcium fluoride, PET, PEN, PES, PI, PC and PTFE.
21. An organic light emitting transistor of an inverted structure, comprising:
a substrate;
a conductive layer laminated on the substrate;
a dielectric layer laminated on the conductive layer;
a source electrode for electron injection, which is composed of a low-dimensional electron structure substance laminated on the dielectric layer;
a light emitting layer laminated on the source electrode; and
and a hole injection drain electrode laminated on the light-emitting layer.
22. The organic light emitting transistor of an inverted structure according to claim 21,
the substrate is made of any one of glass, tempered glass, quartz, pyrex, silicon, or polyethylene terephthalate, polyethylene naphthalate, polyethersulfone, polyimide, polycarbonate, and polytetrafluoroethylene.
23. The organic light emitting transistor of an inverted structure according to claim 21,
the conductive layer is made of any one selected from indium tin oxide, indium zinc oxide, tin oxide, arsenic trioxide, tin fluoride oxide, zinc oxide, indium gallium zinc oxide, a carbon nanotube, graphene, a silver nanowire, a metal nanowire, a conductive polymer, and a solid electrolyte.
24. The organic light emitting transistor of an inverted structure according to claim 21,
the dielectric layer is made of one selected from SiOx, x is larger than or equal to 1, aluminum oxide, zinc oxide, tantalum pentoxide, niobium pentoxide, hafnium oxide, titanium dioxide, indium oxide, silicon nitride SiNx, x is larger than or equal to 1, magnesium fluoride, calcium fluoride, PET, PEN, PES, PI, PC and PTFE.
25. The organic light emitting transistor of an inverted structure according to claim 21,
the luminescent layer is made of low molecular materials, organic polymer semiconductor materials, inorganic semiconductor materials of quantum dots, perovskite or mixed materials thereof.
26. A method of fabricating an organic light emitting transistor of an inverted structure, comprising:
a step of laminating a conductive layer for a gate electrode on a substrate;
a step of laminating a dielectric layer on the conductive layer;
a step of stacking a source electrode for electron injection made of a low dimensional electron structure material on the dielectric layer;
a step of laminating a light emitting layer on the source electrode; and
and a step of stacking a drain for hole injection on the light-emitting layer.
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