CN1108709C - Radio pager - Google Patents
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- CN1108709C CN1108709C CN98103104A CN98103104A CN1108709C CN 1108709 C CN1108709 C CN 1108709C CN 98103104 A CN98103104 A CN 98103104A CN 98103104 A CN98103104 A CN 98103104A CN 1108709 C CN1108709 C CN 1108709C
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- Superheterodyne Receivers (AREA)
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Abstract
A radio pager having a frequency correcting function of the present invention includes an arithmetic section for determining, during an interval between the start and the end of a particular signal, a center amplitude based on the maximum and minimum values of the signal, producing a difference between the center amplitude and a reference voltage, and feeding back the resulting center voltage data to a quartz oscillation section or reference oscillation section. As a result, the oscillation frequency of the oscillation section is automatically corrected. This insures an accurate voltage amplitude and therefore accurate decision on a multilevel digital signal.
Description
Technical field
The present invention relates to a kind of Pocket Bell with frequency calibration function.
Background technology
The characteristic of the discriminator that the conventional scheme utilization of many level of a kind of demodulation FM (frequency modulation(FM)) number signal is in parallel with damping resistance.This scheme conversion FM signal is a voltage and then according to this signal of characteristic demodulation of discriminator, uses the level (voltage) of preliminary election in step subsequently, represents that the multi-level signal of above-mentioned voltage must be through judging.But the problem that this discriminator scheme is brought is that the phase characteristic of this discriminator changes according to temperature and supply voltage easily.Therefore, IF (the intermediate frequency)-dc voltage characteristic (f-v characteristic or S curve characteristic) that obtains from the phase characteristic of this discriminator is not constant.Another problem be when signal when transmitter-side is offset or when the benchmark oscillating part of receiver side is subjected to influence such as environment or inaccurate adjusting, judge in the output IF frequency change of frequency mixer and the many accurately level that hinder subsequently.
Disclosed Japanese patent application publication No. is that 58-14618 proposes a kind of method, and the control voltage controlled oscillator is so that the average frequency of the IF signal that is produced by frequency translation is consistent with the IF centre frequency.For this reason, the poor negative feedback between the average frequency of this IF signal and the IF centre frequency is to the frequency control signal input of voltage controlled oscillator.
For the phase characteristic of the discriminator of proofreading and correct easy temperature influence, the damping resistance in parallel with discriminator can replace the thermistor with B constant that also proposes in the past.Yet unless the phase characteristic of B constant holding property of thermistor and discriminator coupling, correction can not be finished.
When frequency to phase place (f-θ) characteristic owing to result from the scattering of discriminator of temperature or supply voltage when changing, the f-v characteristic of modulation circuit also changes.About receiver output and high-frequency received signal mixing, be usual so that produce an IF signal with a local oscillator.At this moment, local oscillator is often for example regulated by the artificial variable capacitance of crystal oscillation circuit or voltage controlled oscillator configuration.
But, suppose the f-θ characteristic variations of discriminator and cause that output voltage changes in the centre frequency by the f-v characteristic of discriminator conversion, then transmission frequency is because the deviation of transmitter-side sends changes, and/or the local oscillator of receiver side since environment or inaccurate adjusting change.So, the IF frequency signal from frequency mixer output floats frequently from the centre frequency of expectation or f-v characteristic self variation of discriminator.This has hindered the assurance that voltage amplitude and many accurately level are accurately judged.
Fig. 1 represents the phase characteristic of the discriminator D that a conventional discriminator is promptly in parallel with damping resistance R.Fig. 2 represents the parallel discriminator D that connects parallel connection with damping resistance R and thermistor T.When frequency when phase place (f-θ) characteristic changes owing to the scattering of discriminator D that is subject to the influence of temperature or supply voltage, the f-v characteristic of demodulator circuit also changes as previously mentioned.This problem is the central frequency deviation of IF frequency signal from expecting from frequency mixer output, or the f-v characteristic of discriminator oneself is owing to aforesaid variation changes.Therefore, voltage amplitude and many accurately level judge it is irrealizable accurately.
Summary of the invention
Therefore an object of the present invention is to provide the centre frequency that can be subject to above-mentioned variable effect, and therefore got rid of a kind of Pocket Bell of judging about the mistake of multilevel digital signal from dynamic(al) correction.
Pocket Bell of the present invention comprises and is used for detecting the signal specific that is included in from IF (intermediate frequency) signal of low pass filter output, so that the therefore beginning of identification signal and an input part of end.An arithmetic section, the minimum value and the maximum of the signal specific of storage till the end of signal specific occurs, and the center amplitude of relatively calculating from maximum and minimum value and reference voltage are so that so output center voltage data.The quartz oscillation part is input to a frequency mixer according to center voltage Data Control frequency of oscillation, frequency mixer output IF signal, thus the output center voltage of low pass filter is consistent with an optimal value.
Be the voltage that smoothly obtains from the center voltage data of arithmetic section output, a smoothing circuit can be connected between arithmetic section and the quartz oscillation part.
Above of the present invention with other purpose, characteristics and advantage are utilizing accompanying drawing can become clear in the detailed description below obtaining.
Description of drawings
Each represents the figure of the particular phases characteristic of conventional discriminator Fig. 1 and Fig. 2;
Fig. 3 A and 3B schematically illustrate the block diagram that embodies Pocket Bell of the present invention;
Fig. 4 is the schematic block diagram of expression by the process of the execution of the arithmetic section among the embodiment that is included in explanation;
Fig. 5 is the circuit diagram that expression is also included within the concrete structure of the quartz oscillation part among the embodiment of explanation;
Fig. 6 is a sequential chart of expressing the signal among the present illustrative embodiment;
Fig. 7 A and 7B are the block diagrams of schematically representing an optional embodiment of the present invention;
Fig. 8 is a sequential chart of expressing the signal among the embodiment of present Fig. 7;
Fig. 9 A and 9B are the block diagrams that schematically illustrates another optional embodiment of the present invention;
Figure 10 A and 10B are the sequential charts of expressing existing signal in the embodiments of figure 3;
Figure 11 A and 11B are the sequential charts of expressing the signal among the embodiment of present Fig. 9;
Figure 12 is the curve chart that expression utilizes the available f-v characteristic of FM demodulation circuit according to the present invention;
Figure 13 is the curve chart that expression utilizes the available voltage capacitor characteristic of varicap according to the present invention;
Figure 14 is the sequential chart of the signal that obtains from characteristic curve A shown in Figure 12 of expression;
Figure 15 is that expression utilizes the curve chart of the available electric capacity of varicap according to the present invention to frequency of oscillation;
The sequential chart of Figure 16 and Figure 17 signal that to be respectively expression obtain from characteristic curve B shown in Figure 12 and characteristic curve C.
Embodiment
With reference to Fig. 3, expression embodies Pocket Bell of the present invention.As shown in the figure, this Pocket Bell comprises a RF (radio frequency) amplifier 12.The high-frequency signal that enters by antenna 11 is amplified by the RF amplifier.When using crystal oscillation circuit 20 as benchmark, voltage controlled oscillator (hereinafter being called VCO) 18 vibrations, this voltage controlled oscillator 18 has connected a phase-locked loop (PLL) 19.Frequency mixer 14 mixes the output of VCO18 and the output of the RF amplifier 12 that enters by filter 13, therefore realizes frequency translation.Filter 15 filters the noise in the output that is included in frequency mixer 14.Frequency mixer 16 mixes the output of the output of crystal oscillation circuits 20 and filter 15 and exports an IF signal.This IF signal is sent to FM demodulation circuit 30 by filter 17.This FM demodulation circuit 30 is by limiting amplifier 31, phase detectors 32, and low pass filter 33, analog digital converter (ADC) 34 and discriminator 35 are formed.Top IF signal is input to phase detectors 32 by limiting amplifier 31.Phase detectors 32 and low pass filter 33 are by using (f-θ) characteristic of discriminator 35, and the frequency f of conversion IF signal is a dc voltage V so that realize the S curve characteristic of expection thus.
After low pass filter 33 was removed unwanted high frequency noise, the ADC34 conversion was output as numerical data from the data of filter 33.Controller 60 is judged carrying out as the numerical data from ADC34 output of multilevel digital signal according to given reference level.ADC41 receives identical signal with the ADC34 parallel connection and with ADC34.Computing circuit 42 comprises a register and stores in this register from the maximum and the minimum value of the data of ADC41 output.Computing circuit 42 computer center value between maximum and minimum value is determined poor between the central value calculated and the previously selected reference center value, and the data that send this difference of expression are to digital to analog converter (DAC) 43.
The DAC43 conversion is analogue data and transmits this analogue data to a unshowned varicap that is included in the quartz (controlled) oscillator 20 from the numerical data that computing circuit 42 receives.Input 50 is according to detecting a distinctive signal, and a signal that sends expression signal identification beginning is to computing circuit 42, and when above-mentioned signal ended, a signal that sends the expression signal ended is to computing circuit 42.Usually, the signal that receives from the base station comprises address code and the information of distributing to this beep-pager.Usually with alternately occur 1 and 0 form a distinctive signal (advance signal) before asynchronous address code and information in case synchronously they.In the embodiment of signal, input 50 detects alternately 1 and 0 sequence as above-mentioned distinctive signal.
Fig. 4 illustrates a process of being carried out by computing circuit 42 specially.As shown in the figure, computing circuit 42 samplings are that amplitude V is to its register from the numerical data of ADC41 output and the maximum and the minimum value of store sample data.Computing circuit 42 produces poor between the maximum that is stored in the register and the minimum value, should differ from divided by 2, minimum data is added to consequent merchant, with produce and (S1) make comparisons with the reference voltage V A of expression preliminary election central value, and present poor as a result (reference voltage V A-and S1) to DAC43.The DAC43 conversion is analogue data and transmits this analogue data to crystal oscillation circuit 20 from the data of computing circuit 42 outputs.
Fig. 5 represents the concrete structure of crystal oscillation circuit 20.As shown in the figure, vibration 20 according to the electric capacity of capacitor C 1 and C2 by utilizing quartz (controlled) oscillator XTL
1Accurately adjust frequency of oscillation.Varicap X1 is in parallel with capacitor C 1, thereby the combination capacitor of two capacitor C 1 and X1 changes along with the capacitance variations of diode X1.As shown in figure 13, the electric capacity of diode X1 is according to the change in voltage that offers that.The change in voltage that it is calculated by computing circuit 42 along with the frequency of oscillation basis of crystal oscillation circuit 20.Figure 12 represents f-v characteristic curve A, B and C.Suppose that curve A represents best f-v characteristic.So, the voltage that overlaps with the voltage Va of signal specific is optimum.The data of representing this voltage are transformed to aanalogvoltage by DAC43 and are added to then on the crystal oscillation circuit 20, are used for the control vibration.
Operating in hereinafter of illustrated embodiment described.Fig. 6 represents the relation between the output of signal specific and ADC41.When input 50 detected the identical signal of distinctive signal with Fig. 6, it was sent the signal of an identification beginning as previously mentioned and gives computing circuit 42, and in computing circuit 42, this simulation distinctive signal of ADC41 conversion is a digital signal.When this signal specific finishes, detect 50 signals that transmit an expression signal ended as previously mentioned and give computing circuit 42.In the data that when signal specific finishes, occur, represent peaked data and the data of representing minimum value to write the register of computing circuit 42.
As an example, make ADC41 supposition output 8 Bit datas.Suppose that maximum value data " 11110000 " and minimum value data " 11000000 " write the register of computing.Be the signal that this signal specific of response expression finishes, computing circuit 42 with the difference between above-mentioned maximum and the minimum value divided by 2 and minimum value is added to result's merchant so that produce a central value (output S1) thus.Then, computing circuit 42 deducts output S1 from reference voltage data VA (VA=11011000).Therefore, voltage data VAA " 00000000 " sends into DAC43 from operating 42.
Said process can be expressed as:
(11110000-11000000) * (1/2)+11000000=11011000 (output S1; VA)
11011000-11011000=00000000 (output S2; VAA)
The DAC43 conversion is the aanalogvoltage data and presents the varicap X1 of these aanalogvoltage data to crystal oscillation circuit 20 from the voltage data of computing circuit 42 outputs.In order to increase or reduce the electric capacity of diode, as previously mentioned, a specific voltage is essential, therefore must be added to DAC43 corresponding to the residual deviation of deviation setting voltage VSTB (V).Identical deviation also is added to ADC41.With this understanding, capacitor C1 and C2 have realized making the frequency of oscillation of the crystal oscillation circuit 20 that the output voltage of filter 33 conforms to aforesaid voltage Va under optical condition.
An optional embodiment of the present invention describes with reference to Fig. 7.As shown in the figure, this embodiment is identical with the embodiment of front except smoothing circuit 45 is connected between DAC43 and the crystal oscillation circuit 20.Be input to crystal oscillation circuit 20 from the analogue data of DAC43 output by smoothing circuit 45.Fig. 8 represents from the distinctive signal of low pass filter 33 outputs, from the data of ADC41 output, from the data of computing circuit 42 outputs, from the voltage of DAC43 output and the voltage of exporting from smoothing circuit 45 (being input to varicap X1).In this structure, the voltage amplitude of following this signal specific is that the voltage of scrambling is added to crystal oscillation circuit 20, causes the frequency of oscillation respective change.This makes the center voltage of the output of low pass filter 33 conform to optimum voltage Va and has therefore reduced the wrong many level that are subject to the FM noise effect and judged.
With reference to Fig. 9, represent another optional embodiment of the present invention and comprise a BS (economize on electricity) counting 70.Pocket Bell with BS function is conventional and is constructed to close its power supply of radio part so that extending battery life in previously selected timing.Normally, approximately per second BA function enters (OFF) state of closing (power turn-on (ON)) and remains on about 50 milliseconds of OFF state.As shown in Figure 9, BS counting 70 is connected to controller 60 and counts the economize on electricity that last signal specific (comprising information) occurs afterwards and close (BSOFF) state.When the counting of BSOFF state arrived a previously selected counting X under the situation detected without any signal specific, controller 60 transmitted the initial center voltage data that is stored in advance wherein and gives DAC43.Therefore, the frequency of oscillation of crystal oscillation circuit 20 is by the voltage control from DAC43 output.
Figure 10 represents received signal, the relation between the frequency of oscillation of the detection of signal specific and the distinctive crystal oscillation circuit 20 of the beep-pager of Fig. 3.Figure 11 represents received signal, the detection of signal specific, the relation between the frequency of oscillation of the distinctive crystal oscillation circuit 20 of the beep-pager of BS counting operation and Fig. 9.
As shown in figure 10, suppose to be labeled as N the controller 60 that is input to beep-pager shown in Figure 3 from the signal specific or the advance signal of ADC34 output.So when alternately occurring continuously several times for one 1 or 0, input 50 identification this signal specific N and this signal of presenting expression identification beginning are to computing circuit 42.When signal specific N finished, input 50 was presented the signal of expression signal N end to computing circuit 42.Computing circuit 42 is carried out commencing signal and the end signal above the aforesaid process response.Therefore, for the message that receives after the above-mentioned signal specific N, the voltage that calculates and be added to varicap X1 according to signal N is held.
As shown in figure 11, when the input in the beep-pager that is included in Fig. 9 50 detects signal specific N, utilize voltage to receive the message of following signal N with same way as Figure 10 based on the signal N that is added to crystal oscillation circuit 20.But, difference is when the counting of BS OFF state arrives a previously selected counting, and when after the above-mentioned end of message, not having new signal specific N to be detected, controller 60 present previously selected amplitude data VAA " 00000000 " (optimum data) to DAC43 so that control voltage is added to varicap X1.
Curve A shown in Figure 12, the specific demodulation output (f-v characteristic or S curve characteristic) that each expression of B and C is generally realized by discriminator or demodulator 35.The f-θ characteristic of discriminator 35 is owing to the scattering and the environmental condition of discriminator 35 self change.Here it is f-v characteristic such as curve A-C represents the reason that changes.The operation of ADC30 will be described below, and at first presents optimal curve A.
Figure 14 represents the input (output of low pass filter 33) of ADC41, the output of ADC41, data from computing circuit 42 outputs, relation between the drift of the frequency of oscillation of the output of DAC43 and crystal oscillation circuit 20, as shown in the figure, because signal specific or advance signal vibrate in modulating frequency, the waveform that is input to ADC41 has a center voltage Va (V) and amplitude, ao Va (V).The ADC41 digitlization is imported waveform so that therefore export, for example, and maximum " 11110000 " and minimum value " 11000000 ".Computing circuit 42 is added to minimum value by 2 maximums of removing and the difference between the minimum value and output center voltage VA " 11011000 " as previously mentioned.And computing circuit 42 deducts center voltage VA and presents this difference from reference voltage V A be that center voltage data VAA " 00000000 " is to DAC43.
Therefore DAC43 is the varicap X1 that dc voltage deviation D C voltage is added to crystal oscillation circuit 20 by deviation setting (VSTB) 44 according to deviation setting voltage VSTB (V) conversion input data VAA.The electric capacity of diode X1 is according to the voltage that is input to that, as preceding with reference to changing as described in Fig. 3.In addition, if relation shown in Figure 15 is set between the electric capacity of the vibration frequency of crystal oscillation circuit 20 and diode X1, so, voltage Va is zero at the shifted by delta fa that optimum condition is input to diode X1 and reduces the frequency of oscillation of vibration 20.
DAC43 is dc voltage (VBA+VSTB) deviation and transmits the varicap X1 of this dc voltage to crystal oscillation circuit 20 by deviation setting voltage VSTB (V) conversion input data VBA.The result is, from about curve A, present Δ fa is to forward shifted by delta fb on one side as the frequency of oscillation of the vibration 20 seen from Figure 13 and Figure 15.20 frequency of oscillation transforms to negative one side if vibrate, and the then consequent f-V characteristic that is displaced to negative one side can be corrected; Thereby realized demodulation accurately.Therefore, from the IF frequency translation of filter 17 output to a negative side.
On the other hand, the demodulator circuit 30 following work that have the f-V conversion characteristics of representing by curve C.In the case, as shown in figure 17, the waveform that is input to ADC41 has a center voltage VC (V) and an amplitude, ao Vc (V) who is lower than Va.When this waveform during by the ADC41 digitlization, maximum and minimum value for example are respectively " 11100100 " and " 10110100 ".Therefore, computing circuit 42 is by calculating the data of output expression center voltage Vc " 11001100 " as the aforementioned.Center voltage VB that calculates and the poor VCA " 00001100 " between the reference voltage V A are fed into DAC43 from computing circuit 42.
DAC43 is the dc voltage of (VCA+VSTB) deviation by deviation setting voltage VSTB (V) conversion input data VCA.Computing circuit 42 produces differing from and present it to DAC43 between the center voltage VC that calculates and the reference voltage V A.DAC43 conversion input data are dc voltage (Va-Vc) and it are added to varicap X1.The result is, as seeing from Figure 13 and Figure 15, the frequency of oscillation of crystal oscillation circuit 20 from about the present Δ fa of curve A to negative sense one side's shifted by delta fc.20 frequency of oscillation transforms to forward one side if vibrate, and deflection forward one side's who then obtains thus f-V characteristic can be corrected, thereby realizes demodulation accurately.Therefore, from the IF frequency translation of filter 17 output to forward one side.
As mentioned above, allow low pass filter 33 outputs make ADC41 output optimum voltage VA about the curve A of the voltage Va (V) of IF frequency f c.As for curve B, output voltage is increased to about the Vb above the Va of IF frequency f c and makes demodulation in the demodulator circuit 30 in forward one side (fc+y) difficulty.About curve C, output voltage is reduced to about the Vc below the Va of IF frequency f c, and makes demodulation in the demodulator circuit 30 in negative sense one side (fc-y) difficulty.According to the present invention, though when the f-V characteristic variations to represent by curve B or curve C one of them the time, the skew of the centre frequency of the f-V characteristic of demodulation part also is corrected.This has guaranteed the accurate judgement of multilevel digital signal.
In a word, according to the present invention, arithmetic section is in the beginning of a signal specific and the interim between the end, judgement is based on the maximum of this signal and a center amplitude of minimum value, poor between generation center amplitude and the reference voltage, and feed back consequent center voltage data to quartz oscillation part or benchmark oscillating part.Therefore, the frequency of oscillation of oscillating part quilt is from dynamic(al) correction.Thereby, can proofread and correct the change that is subject to by the f-V characteristic of the environmental condition of discriminator scattering that is included in demodulator circuit self and variation such as the FM demodulation circuit that temperature causes, launch the change of the tranmitting frequency of the transmitter-side that causes by deviation, and by being subject to environment, the drift of the centre frequency of the f-V characteristic of the change influence of the IF frequency of the caused receiver side of characteristic changing of the reference oscillator of inaccurate adjustment or the like influence.As a result, voltage magnitude and many accurately level judgements have thus accurately been guaranteed.
To those skilled in the art, after receiving instruction of the present disclosure, all changes under the situation of the scope that does not break away from it are possible.
Claims (3)
1, Pocket Bell comprises:
An input part is used for detecting and is included in since signal specific of an IF signal of low pass filter output so that therefore discern described signal specific and end;
An arithmetic section is used to store the minimum value and the maximum of this signal specific that occurs till the end of described signal specific, and the center amplitude that will calculate from maximum and minimum value and reference voltage are made comparisons so that therefore output center voltage data;
A smoothing circuit part, the voltage that the described center voltage data that are used for smoothly exporting from described arithmetic section obtain; With
A quartz oscillation part is used for according to the voltage from described smooth output, and the control frequency of oscillation is input to a frequency mixer of this IF signal of output, thereby the output center voltage of the logical device of described low pass filtered is consistent with optimum value.
2, according to the Pocket Bell of claim 1, wherein said quartz oscillation partly comprises a varicap that is used for according to described center voltage Data Control frequency of oscillation.
3, according to the Pocket Bell of claim 1, also comprise a segment count, be used in previously selected timer counter economize on electricity closed condition, wherein arrive a previously selected counting and when not detecting specific signal, output is stored in the initial center voltage data in the described arithmetic section in advance when the counting of economize on electricity closed condition.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP157095/97 | 1997-06-13 | ||
| JP157095/1997 | 1997-06-13 | ||
| JP9157095A JP2974296B2 (en) | 1997-06-13 | 1997-06-13 | Radio selective call receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1216429A CN1216429A (en) | 1999-05-12 |
| CN1108709C true CN1108709C (en) | 2003-05-14 |
Family
ID=15642146
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN98103104A Expired - Fee Related CN1108709C (en) | 1997-06-13 | 1998-06-13 | Radio pager |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2974296B2 (en) |
| CN (1) | CN1108709C (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4591421B2 (en) * | 2006-07-31 | 2010-12-01 | パナソニック株式会社 | Receiver and program thereof |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5109544A (en) * | 1990-11-05 | 1992-04-28 | Motorola, Inc. | Paging receiver with automatic frequency control |
| US5263195A (en) * | 1990-03-28 | 1993-11-16 | Silcom Research Limited | Superheterodyne radio receiver with digital automatic frequency control for a local oscillator |
| CN1083996A (en) * | 1992-08-28 | 1994-03-16 | 汤姆森消费电子有限公司 | Negative feedback control circuit with input and output signal common wire |
| CN1114478A (en) * | 1993-12-22 | 1996-01-03 | 松下电器产业株式会社 | Automatic frequency Control Apparatus for FSK receiver and FSK receiver including the same |
| US5564091A (en) * | 1995-03-29 | 1996-10-08 | Motorola, Inc. | Method and apparatus for operating an automatic frequency control in a radio |
| US5612977A (en) * | 1993-12-28 | 1997-03-18 | Nec Corporation | Automatic frequency control circuit for a receiver of phase shift keying modulated signals |
-
1997
- 1997-06-13 JP JP9157095A patent/JP2974296B2/en not_active Expired - Fee Related
-
1998
- 1998-06-13 CN CN98103104A patent/CN1108709C/en not_active Expired - Fee Related
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5263195A (en) * | 1990-03-28 | 1993-11-16 | Silcom Research Limited | Superheterodyne radio receiver with digital automatic frequency control for a local oscillator |
| US5109544A (en) * | 1990-11-05 | 1992-04-28 | Motorola, Inc. | Paging receiver with automatic frequency control |
| CN1083996A (en) * | 1992-08-28 | 1994-03-16 | 汤姆森消费电子有限公司 | Negative feedback control circuit with input and output signal common wire |
| CN1114478A (en) * | 1993-12-22 | 1996-01-03 | 松下电器产业株式会社 | Automatic frequency Control Apparatus for FSK receiver and FSK receiver including the same |
| US5633898A (en) * | 1993-12-22 | 1997-05-27 | Matsushita Electric Industrial Co., Ltd. | Automatic frequency control apparatus for FSK receiver and FSK receiver including the same |
| US5612977A (en) * | 1993-12-28 | 1997-03-18 | Nec Corporation | Automatic frequency control circuit for a receiver of phase shift keying modulated signals |
| US5564091A (en) * | 1995-03-29 | 1996-10-08 | Motorola, Inc. | Method and apparatus for operating an automatic frequency control in a radio |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1216429A (en) | 1999-05-12 |
| JPH114142A (en) | 1999-01-06 |
| JP2974296B2 (en) | 1999-11-10 |
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