CN110868279B - Signal sending and receiving method and device - Google Patents

Signal sending and receiving method and device Download PDF

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CN110868279B
CN110868279B CN201810983798.4A CN201810983798A CN110868279B CN 110868279 B CN110868279 B CN 110868279B CN 201810983798 A CN201810983798 A CN 201810983798A CN 110868279 B CN110868279 B CN 110868279B
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sequence
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shift register
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CN110868279A (en
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曲秉玉
龚名新
周永行
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0048—Allocation of pilot signals, i.e. of signals known to the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0058—Allocation criteria

Abstract

Provided are an information sending and receiving method and device. The terminal device generates a first signal according to a sequence { x (N) }, which comprises N elements, N being an integer greater than 1, which satisfies x (N) ═ a · b (N) · jn，
Figure DDA0001779233720000011
N is [0, N-1 ]]The element b (n) satisfies b (n) · (1-2s (n)), a and u are each a nonzero complex number, and the sequence { s (n) } composed of the element s (n) is one of the sequences in the first sequence set. The terminal device transmits a first signal. By using the new sequence provided by the embodiment of the application, better frequency domain flatness can be kept when the PUSCH or PUCCH is used for transmitting signals, and meanwhile, lower PAPR value and lower cross correlation between signals are kept, so that the communication application environment of using the PUSCH or PUCCH for transmitting signals is met.

Description

Signal sending and receiving method and device
Technical Field
The present application relates to the field of communications technologies, and in particular, to a signal sending method and a signal receiving method and apparatus.
Background
In a Long Term Evolution (LTE) system, demodulation of a Physical Uplink Shared Channel (PUSCH) uses an uplink demodulation reference signal (DMRS) for channel estimation. And directly mapping the sequence of the uplink DMRS to the frequency domain subcarrier. The uplink DMRS sequence is a sequence generated by a base sequence through time domain cyclic shift, and the base sequence is obtained by cyclic extension of a Zadoff-Chu sequence (ZC sequence). The ZC sequence is a sequence that satisfies the constant amplitude auto-correlation (CAZAC) sequence property. The DMRS signal has a low peak-to-average power ratio (PAPR), and different DMRS sequences allocated to different cells have small cross-correlation.
In new radio access technology (NR), an uplink supports a Binary Phase Shift Keying (BPSK) modulation method under discrete fourier transform spread OFDM (DFT-s-OFDM), and filtering is used when DFT-s-OFDM pi/2 BPSK modulation is supported, so that a very low PAPR can be obtained, while a DMRS signal of a PUSCH in an LTE system has a comparatively large PAPR and does not satisfy a requirement of low PAPR. The uplink DMRS can be generated through pi/2 BPSK modulation of DFT-s-OFDM, and the sequence of the uplink DMRS can use a sequence generated based on a Gold sequence. The DMRS sequence is firstly subjected to pi/2 BPSK modulation, then DFT conversion is carried out, and the DFT conversion is mapped to a frequency domain subcarrier to generate a DMRS signal. The DMRS signal generated by DFT-s-OFDM pi/2 BPSK has a low PAPR. Different cells can use different Gold sequences to generate reference signals, but when sequences generated based on the Gold sequences are used, especially when the length of the Gold sequences is large, the number of the different Gold sequences is far beyond the requirement (for example, 30 in an NR system), but the cross-correlation and auto-correlation characteristics of the Gold sequences can cause large interference between different reference signals, and the frequency flatness of DMRS signals is poor, thereby being unfavorable for channel estimation.
That is, the use of a sequence used in a conventional DMRS for a PUSCH does not satisfy a communication application environment in which a signal is currently transmitted using a PUSCH, a Physical Uplink Control Channel (PUCCH), or a Sounding Reference Signal (SRS).
Disclosure of Invention
The embodiment of the application provides a signal transmitting and receiving method and device, which are used for providing a new sequence so as to meet the communication application environment of transmitting signals by using a PUSCH (physical uplink shared channel), a PUCCH (physical uplink control channel) or an SRS (sounding reference signal).
In a first aspect, a signal transmission method is provided, and the method includes: generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) }satisfyingx (N) ═ a · b (N) · jn，
Figure BDA0001779233700000011
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero complex numbers, the sequence { s (n) } consisting of element s (n) being one of the sequences in the first set of sequences, transmitting said first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (n) }, the element k (n) satisfies k (n) ═ c ((n + t) mod 63), n ═ c0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c)1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000021
Figure BDA0001779233700000022
Element c2(n) satisfies
Figure BDA0001779233700000023
Figure BDA0001779233700000024
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Elements of (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000025
Element c2(n) satisfies
Figure BDA0001779233700000026
Figure BDA0001779233700000027
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1],
And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c (N mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000041
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000042
Figure BDA0001779233700000043
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer, c is an integer2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000044
Figure BDA0001779233700000045
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000046
Figure BDA0001779233700000047
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
The method may be performed by a first communication device, which may be a terminal equipment or a communication device capable of supporting the terminal equipment to implement the functions required by the method, but may also be other communication devices, such as a system-on-chip.
In a second aspect, a signal receiving method is provided, which includes: receiving a first signal carried on N subcarriers, and acquiring N elements in a sequence { x (N)) }carriedby the first signal, wherein N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ A.b (N) · j.n，
Figure BDA0001779233700000048
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences; processing said first signal according to N elements of said sequence { x (N); wherein the content of the first and second substances,
the first sequenceThe set comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ N) (N ═ c (N) }1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000049
Figure BDA00017792337000000410
Element c2(n) satisfies
Figure BDA00017792337000000411
Figure BDA00017792337000000412
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA00017792337000000413
Element c2(n) satisfies
Figure BDA00017792337000000414
Figure BDA00017792337000000415
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1], and/or,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c (N mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000061
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000062
Figure BDA0001779233700000063
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer, c is an integer2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000064
Figure BDA0001779233700000065
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000066
Figure BDA0001779233700000067
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
The method may be performed by a second communication device, which may be a network device or a communication device capable of supporting the network device to implement the functions required by the method, but may also be other communication devices, such as a system-on-chip.
By using the new sequence provided by the embodiment of the application, better frequency domain flatness can be kept when the PUSCH or PUCCH is used for transmitting signals, and meanwhile, lower PAPR value and lower cross correlation among signals are kept, so that the communication application environment of using the PUSCH or PUCCH or SRS for transmitting signals is met.
In one possible design, when N satisfies that N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
Some possible values of N are provided, and in the embodiment of the present application, the value of N is not limited thereto. For example, when N satisfies 48. ltoreq. N.ltoreq.96, all integers falling within the range [48,96] may be represented by N, or integers in the proper subset of the range [48,96] may be represented by N, and for example, all integers falling within the range [48,60] may be represented by N, or all integers falling within the range [54,72] may be represented by N, or all integers falling within the range [60,96] may be represented by N, and so on. The same is true for the case where N satisfies 768 ≦ N ≦ 1620 or N satisfies 192 ≦ N ≦ 432.
In one possible design, the first sequence set includes at least two sequence groups, each of the at least two sequence groups including at least one sequence, where two sequences belonging to different ones of the at least two sequence groups satisfy that initial states of the first shift register sequences are the same and initial states of the second shift register sequences are different, or two sequences belonging to different ones of the at least two sequence groups satisfy that initial states of the first shift register sequences are the same, initial states of the second shift register sequences are the same, and v is different.
The sequences included in the first set of sequences may be allocated for use by different cells. Whereas if the cross-correlation of sequences assigned to different cells is high, it may result in large inter-cell interference. Therefore, in the embodiment of the present application, a part of sequences or all sequences included in the first sequence set are grouped to obtain at least two sequence groups, two sequences belonging to different sequence groups, the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are different, or the initial state of the first shift register sequence is the same, the initial state of the second shift register sequence is the same, but v is different, it is understood that two sequences satisfying either of these two properties, corresponding to different root sequences, or, sequences belonging to a sequence group are generated from one root sequence, sequences belonging to different sequence groups are generated by different root sequences, and the cross correlation among the sequences generated by the different root sequences is small. In the embodiment of the present invention, one sequence group may be allocated to only one cell, that is, one sequence group may not be allocated to two or more cells, so that cross-correlation between sequences used by different cells is relatively small, and interference between cells is reduced. Alternatively, a sequence group may be assigned to at least two cells, but the at least two cells need not be adjacent cells, so that although the cross-correlation between the sequences used by the at least two cells is high, the interference is not so large because the cells are not adjacent cells. Alternatively, if the sequences { s (n) } are sequences of the third shift register, the first sequence set may be grouped to obtain at least two sequence groups, or sequences belonging to different sequence groups may be generated from different root sequences, so that the cross-correlation is small. If the sequence s (n) is the sequence from the third shift register, the embodiment of the present application is not limited to the grouping method.
In one possible design, the method further includes: the first communication means selects a sequence { s (n) } from the first set of sequences according to an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined according to a sequence group ID or a cell ID; or, the first communication device selects a sequence { s (n) } from the first sequence set according to the initial state of the first shift register sequence, the initial state of the second shift register sequence, and v, where v is determined according to a sequence group ID or a cell ID.
The first set of sequences is, for example, pre-configured by the network device to the terminal device or predefined by the protocol, the first set of sequences comprising a plurality of sequences, the terminal device being involved in selecting the sequence { s (n) } from the first set of sequences to obtain the sequence { x (n) }, thereby generating the first signal. In this embodiment, the terminal device may select the sequence { s (n) } according to an initial state of a first shift register sequence and an initial state of a second shift register sequence, where the initial state of the first shift register sequence is known to the terminal device, for example, a fixed sequence, and the initial state of the second shift register sequence is determined according to an ID of a sequence group assigned to a cell in which the terminal device is located or according to an ID of a cell in which the terminal device is located. Alternatively, the terminal device may select the sequence { s (n) } according to the state of the first shift register sequence, the state of the second shift register sequence, and v, where the initial state of the first shift register sequence and the initial state of the second shift register sequence are, for example, known to the terminal device and are, for example, fixed sequences, and v, and the terminal device may determine according to the ID of the sequence group assigned to the cell in which the terminal device is located or according to the ID of the cell in which the terminal device is located.
In one possible design, the first signal is a DMRS or SRS or control information.
Here, by way of example only, the first signal may also be data or other information, and the specific is not limited.
In one possible design, the first communications device generates the first signal according to the sequence { x (n) }, including: performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) }; mapping N elements in the sequence { f (N)) } to consecutive N subcarriers, respectively, to obtain the first signal, or mapping N elements in the sequence { f (N)) } to equally spaced N subcarriers, respectively, to obtain the first signal.
A specific way of generating the first signal is given.
In one possible design, the method further includes: the first communication device filters the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence; alternatively, the first communications device filters the sequence { x (N) } after discrete fourier transform processing has been performed on N elements in the sequence { x (N) }.
In the embodiment of the present application, the sequence may be selected not to be filtered, so as to reduce the process of generating the first signal and improve the efficiency of generating the first signal, or the sequence may also be selected to be filtered, so as to reduce the PAPR. During filtering, filtering may be performed before discrete fourier transform processing, or filtering may be performed after discrete fourier transform processing, which is not limited specifically.
Accordingly, in one possible design, the second communications apparatus receives a first signal carried on N subcarriers, and acquires N elements in a sequence { x (N) } carried by the first signal, including: acquiring the first signals on the N subcarriers on continuous N subcarriers, or acquiring the first signals on the N subcarriers on N subcarriers with equal intervals; acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers; and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
A process is presented for a second communications device to receive a first signal and acquire N elements.
In a third aspect, a first communication device is provided, for example, the first communication device described in the foregoing, for example, a terminal device. The communication device has the function of realizing the terminal equipment in the method design. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.
In one possible design, the specific structure of the communication device may include a processing unit and a transceiver unit. The processing unit and the transceiver unit may perform the corresponding functions in the method provided in the first aspect or any one of the possible implementations of the first aspect.
In a fourth aspect, a second communication device is provided, for example, the second communication device described in the foregoing, for example, a network device. The communication device has the function of realizing the network equipment in the method design. These functions may be implemented by hardware, or by executing corresponding software by hardware. The hardware or software includes one or more units corresponding to the above functions.
In one possible design, the specific structure of the communication device may include a processing unit and a transceiver unit. The processing unit and the transceiver unit may perform the corresponding functions in the method provided by the second aspect or any one of the possible implementations of the second aspect.
In a fifth aspect, a third communication device is provided, for example, the first communication device described in the foregoing, for example, a terminal equipment. The communication device has the function of realizing the terminal equipment in the method design. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.
In one possible design, the specific structure of the communication device may include a processor and a transceiver. The processor and the transceiver may perform the respective functions in the method provided by the first aspect or any one of the possible implementations of the first aspect. The transceiver is implemented as a communication interface, for example, which may be understood as a radio frequency transceiver component in the terminal device.
In a sixth aspect, a fourth communication device is provided, for example, the second communication device described in the foregoing, for example, a network device. The communication device has the function of realizing the network equipment in the method design. These functions may be implemented by hardware, or by hardware executing corresponding software. The hardware or software includes one or more units corresponding to the above functions.
In one possible design, the specific structure of the communication device may include a processor and a transceiver. The processor and the transceiver may perform the respective functions in the method provided by the second aspect or any one of the possible implementations of the second aspect. The transceiver is implemented as a communication interface, for example, and the communication interface is understood as a radio frequency transceiver component in the network device.
In a seventh aspect, a fifth communication device is provided. The communication device may be the first communication device in the above method design, such as a terminal device, or a chip disposed in the terminal device. The communication device includes: a memory for storing computer executable program code; and a processor coupled with the memory. Wherein the program code stored by the memory comprises instructions that, when executed by the processor, cause the fifth communication device to perform the method of the first aspect or any one of the possible implementations of the first aspect.
The fifth communication device may further include a communication interface, and if the fifth communication device is a terminal device, the communication interface may be a transceiver in the terminal device, for example, a radio frequency transceiver component in the terminal device, or if the fifth communication device is a chip disposed in the terminal device, the communication interface may be an input/output interface of the chip, for example, an input/output pin, and the like.
In an eighth aspect, a sixth communications apparatus is provided. The communication device may be the second communication device in the above method design, such as a network device, or a chip disposed in the network device. The communication device includes: a memory for storing computer executable program code; and a processor coupled with the memory. Wherein the program code stored by the memory comprises instructions which, when executed by the processor, cause the sixth communication device to perform the method of the second aspect or any one of the possible embodiments of the second aspect.
The sixth communication device may further include a communication interface, and if the sixth communication device is a network device, the communication interface may be a transceiver in the network device, such as a radio frequency transceiver component in the network device, or if the sixth communication device is a chip disposed in the network device, the communication interface may be an input/output interface of the chip, such as an input/output pin.
A ninth aspect provides a first communication system, which may include the first communication apparatus of the third aspect and the second communication apparatus of the fourth aspect.
A tenth aspect provides the second communication system, which may include the third communication apparatus according to the fifth aspect and the fourth communication apparatus according to the sixth aspect.
An eleventh aspect provides a third communication system, which may include the fifth communication device of the seventh aspect and the sixth communication device of the eighth aspect.
In a twelfth aspect, there is provided a computer storage medium having instructions stored thereon that, when executed on a computer, cause the computer to perform the method of the first aspect or any one of the possible designs of the first aspect.
In a thirteenth aspect, there is provided a computer storage medium having instructions stored thereon, which when run on a computer, cause the computer to perform the method as set forth in the second aspect or any one of the possible designs of the second aspect.
In a fourteenth aspect, there is provided a computer program product comprising instructions stored thereon, which when run on a computer, cause the computer to perform the method of the first aspect or any one of the possible designs of the first aspect.
In a fifteenth aspect, there is provided a computer program product comprising instructions stored thereon which, when run on a computer, cause the computer to perform the method of the second aspect described above or any one of the possible designs of the second aspect.
By using the new sequence provided by the embodiment of the application, better frequency domain flatness can be kept when the PUSCH or PUCCH is used for transmitting signals, and meanwhile, lower PAPR value and lower cross correlation among signals are kept, so that the communication application environment of using the PUSCH or PUCCH or SRS for transmitting signals is met.
Drawings
Fig. 1 is a schematic view of an application scenario according to an embodiment of the present application;
fig. 2a is a flowchart of a signal transmitting and receiving method according to an embodiment of the present disclosure;
fig. 2b is a schematic flowchart of a terminal device determining sequence { x (n) }, according to an embodiment of the present application;
fig. 3 is a schematic flowchart of a process of generating and transmitting a first signal by a terminal device according to an embodiment of the present application;
fig. 4a, fig. 4b, fig. 4c, and fig. 4d are schematic diagrams of a sequence { x (N) } containing N elements obtained by DFT to obtain a frequency domain sequence { f (N) } containing N elements according to an embodiment of the present application;
fig. 5a and fig. 5b are schematic diagrams of mapping a frequency domain sequence { f (N)) } containing N elements onto N subcarriers, where the frequency domain sequence { x (N)) } containing N elements is obtained through DFT according to an embodiment of the present application;
fig. 6a is a schematic diagram of a network device processing a first signal according to an embodiment of the present application;
fig. 6b is a schematic diagram of a network device processing a first signal according to an embodiment of the present application;
fig. 7 is a schematic diagram of a communication apparatus capable of implementing functions of a terminal device according to an embodiment of the present application;
fig. 8 is a schematic diagram of a communication apparatus capable of implementing functions of a network device according to an embodiment of the present application;
fig. 9a to 9b are two schematic diagrams of a communication device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the embodiments of the present application will be described in further detail with reference to the accompanying drawings.
Hereinafter, some terms in the embodiments of the present application are explained to facilitate understanding by those skilled in the art.
1) Terminal equipment, including devices that provide voice and/or data connectivity to a user, may include, for example, handheld devices having wireless connection capabilities or processing devices connected to wireless modems. The terminal device may communicate with a core network via a Radio Access Network (RAN), exchanging voice and/or data with the RAN. The terminal device may include a User Equipment (UE), a wireless terminal device, a mobile terminal device, a subscriber unit (subscriber unit), a subscriber station (subscriber station), a mobile station (mobile), a remote station (remote station), an Access Point (AP), a remote terminal device (remote terminal), an access terminal device (access terminal), a user terminal device (user terminal), a user agent (user agent), or a user equipment (user device), etc. For example, mobile phones (or so-called "cellular" phones), computers with mobile terminal equipment, portable, pocket, hand-held, computer-included or vehicle-mounted mobile devices, smart wearable devices, and the like may be included. For example, Personal Communication Service (PCS) phones, cordless phones, Session Initiation Protocol (SIP) phones, Wireless Local Loop (WLL) stations, Personal Digital Assistants (PDAs), and the like. Also included are constrained devices, such as devices that consume less power, or devices that have limited storage capabilities, or devices that have limited computing capabilities, etc. Examples of information sensing devices include bar codes, Radio Frequency Identification (RFID), sensors, Global Positioning Systems (GPS), laser scanners, and the like.
By way of example and not limitation, in the embodiments of the present application, the terminal device may also be a wearable device. Wearable equipment can also be called wearable intelligent equipment, is the general term of applying wearable technique to carry out intelligent design, develop the equipment that can wear to daily wearing, like glasses, gloves, wrist-watch, dress and shoes etc.. A wearable device is a portable device that is worn directly on the body or integrated into the clothing or accessories of the user. The wearable device is not only a hardware device, but also realizes powerful functions through software support, data interaction and cloud interaction. The generalized wearable smart device includes full functionality, large size, and can implement full or partial functionality independent of a smart phone, such as: smart watches or smart glasses and the like, and only focus on a certain type of application function, and need to be used in cooperation with other devices such as smart phones, such as various smart bracelets, smart helmets, smart jewelry and the like for physical sign monitoring.
2) A network device, e.g., including a base station (e.g., access point), may refer to a device in an access network that communicates over the air-interface, through one or more cells, with wireless terminal devices. The network device may be configured to interconvert the received air frame with an Internet Protocol (IP) packet as a router between the terminal device and the rest of the access network, where the rest of the access network may include an IP network. The network device may also coordinate attribute management for the air interface. For example, the network device may include an evolved Node B (NodeB or eNB or e-NodeB) in a Long Term Evolution (LTE) system or an evolved LTE system (LTE-Advanced, LTE-a), or may also include a next generation Node B (gNB) in a fifth generation mobile communication technology (5G) New Radio (NR) system, or may also include a Centralized Unit (CU) and a distributed unit (distributed unit, DU) in a cloud access network (cloud radio) system, which is not limited in the embodiments of the present application.
The network device described herein is not limited to the serving cell or the serving base station of the terminal device, but may be any network device that can store the capability information of the terminal device, such as a Mobility Management Entity (MME).
3) The terms "system" and "network" in the embodiments of the present application may be used interchangeably. The "plurality" means two or more, and in view of this, the "plurality" may also be understood as "at least two" in the embodiments of the present application. "at least one" is to be understood as meaning one or more, for example one, two or more. For example, including at least one means including one, two, or more, and does not limit which ones are included, for example, including at least one of A, B and C, then included may be A, B, C, A and B, A and C, B and C, or A and B and C. By "at least two", two or more are to be understood. Similarly, the understanding of the description of "at least one" and the like is similar. "and/or" describes the association relationship of the associated objects, indicating that there may be three relationships, e.g., a and/or B, which may indicate: a exists alone, A and B exist simultaneously, or B exists alone. In addition, the character "/" generally indicates a relationship in which a preceding and following related objects are one kind of "or" unless otherwise specified.
In addition, in order to facilitate clear description of technical solutions of the embodiments of the present application, in the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same items or similar items having substantially the same functions and actions. Those skilled in the art will appreciate that the terms "first," "second," and the like do not denote any order or quantity, nor do the terms "first," "second," and the like denote any order or importance. Furthermore, the terms "comprising" and "having" in the description of the embodiments and claims of the present application and the drawings are not intended to be exclusive. For example, a process, method, system, article, or apparatus that comprises a list of steps or modules is not limited to only those steps or modules listed, but may include other steps or modules not listed.
Having described some of the concepts related to the embodiments of the present application, the following describes features related to the embodiments of the present application.
In communication systems, reference signals are typically used to derive channel estimation matrices to demodulate data information. Currently, in an LTE system, a 4G system, a 4.5G system, a 5G system, and an NR system or similar scenarios, pi/2 BPSK modulation under uplink DFT-s-OFDM is supported. The uplink can adopt a DMRS modulated by pi/2 BPSK under DFT-s-OFDM, and the DMRS can use a sequence based on a Gold sequence. However, if the uplink DMRS uses a sequence based on a Gold sequence, interference between different DMRS signals is large, and frequency flatness of the DMRS signals is poor, which is not favorable for channel estimation.
In order to ensure that in an LTE system, a 4G system, a 4.5G system, a 5G system, and an NR system or an NR similar system, or even in other communication systems or communication application environments with higher requirements, when a PUSCH or PUCCH is used to transmit a signal, the signal can maintain a low cross-correlation characteristic, a good frequency domain flatness, and at the same time, a low PAPR value, the embodiments of the present application provide a method for transmitting and receiving a signal, in which a new sequence is provided. By using the new sequence provided by the embodiment of the application in the DMRS, PUCCH or SRS of the PUSCH, the cross correlation between signals can be kept low when the PUSCH or PUCCH is used for transmitting signals, the frequency domain flatness is good, and the PAPR value is low, so that the communication application environment of transmitting signals by using the PUSCH or PUCCH or SRS is met.
The technical scheme provided by the embodiment of the application can be applied to an LTE system, a 4G system, a 4.5G system, a 5G system, an NR system or an NR similar system, can also be applied to a future communication system, or can also be applied to other similar communication systems.
Please refer to fig. 1, which illustrates an application scenario of the present application. Fig. 1 includes a network device and a terminal device, where the terminal device can perform air interface communication with the network device. Of course, the number of the terminal devices in fig. 1 is only an example, in practical application, the network device may provide services for a plurality of terminal devices, and all or part of the terminal devices in the plurality of terminal devices may transmit signals to the network device by using the sequence provided in the embodiment of the present application. The transmission between the network device and the terminal device may be transmitted by radio waves, or may be transmitted by visible light, laser, infrared, optical quantum, power lines, optical fibers, coaxial cables, copper strands, or the like.
The network device in fig. 1 is, for example, AN Access Network (AN) device, such as a base station. The access network device corresponds to different devices in different systems, for example, may correspond to an eNB in a fourth generation mobile communication technology (4G) system, and corresponds to an access network device in 5G, for example, a gNB in a 5G system, and similarly, may correspond to other devices in other communication systems.
The technical scheme provided by the embodiment of the application is described below with reference to the accompanying drawings.
The embodiment of the present application provides a first signal sending and receiving method, and please refer to fig. 2a for a flowchart of the method. The method can be applied to the scenario shown in fig. 1, and in the following description, the application of the method provided by the embodiment of the present application to the scenario shown in fig. 1 is taken as an example. In addition, the method may be performed by two communication apparatuses, for example, a first communication apparatus and a second communication apparatus, wherein the first communication apparatus may be a network device or a communication apparatus (e.g., a system-on-chip) capable of supporting a network device to implement the functions required by the method, or the first communication apparatus may be a terminal device or a communication apparatus (e.g., a system-on-chip) capable of supporting a terminal device to implement the functions required by the method. The same is true for the second communication apparatus, which may be a network device or a communication apparatus (e.g. a system-on-chip) capable of supporting the network device to implement the functions required by the method, or the second communication apparatus may be a terminal device or a communication apparatus (e.g. a system-on-chip) capable of supporting the terminal device to implement the functions required by the method. For example, the first communication apparatus may be a terminal device, the second communication apparatus may be a network device, or both the first communication apparatus and the second communication apparatus may be network devices, or both the first communication apparatus and the second communication apparatus may be terminal devices, or the first communication apparatus may be a terminal device, and the second communication apparatus may be a communication apparatus capable of supporting a function required by the network device to implement the method, and so on. The network device is, for example, a base station.
For convenience of introduction, in the following, the method is executed by a network device and a terminal device as an example, specifically, the first communication device is a terminal device, and the second communication device is a network device as an example.
S21, the terminal equipment generates a first signal according to the sequence { x (n) }.
Wherein the sequence { x (N) } comprises N elements, N being an integer greater than 1, x (N) being an element of the sequence { x (N) }, the sequence { x (N) } satisfying x (N) ═ a · b (N) · jn，
Figure BDA0001779233700000131
N is [0, N-1 ]]Wherein the element b (n) satisfies b (n) u (1-2s (n)), and a and u are each a non-zero complex number,
Figure BDA0001779233700000132
the sequence consisting of the element s (n) (s (n)) is one of the sequences in the first set of sequences.
S21 is executed, optionally, after the terminal device accesses the network, to determine the sequence { x (N)) } including N elements, for example, the terminal device selects a sequence from the first sequence set, and obtains the sequence { S (N)) } according to the selected sequence, so as to obtain the sequence { x (N)) } including N elements according to the selected sequence { S (N)) }. When the terminal device accesses the network, the network device may determine the sequence { b (N) } and configure the sequence to the terminal device, and the terminal device may determine the sequence { x (N)) } including N elements based on the sequence { b (N)) }. Or, when the terminal device accesses the network, the network device determines the sequence { s (N) } and configures the sequence to the terminal device, and the terminal device determines the sequence { x (N)) } containing N elements based on the sequence { s (N)) }.
It should be noted that, in the calculation process, the value of u may be fixed or may not be fixed, that is, the value of u may also be variable for different sequences { s (n) }. In a specific implementation, the value of u is the same for all elements in the same sequence currently selected. The value of u may be different for elements in different sequences.
Wherein the sequence { s (n) } consisting of the element s (n) is one of the sequences in the first set of sequences.
In one possible example, after the terminal device enters the network, the process of determining the sequence { x (N) } containing N elements may be as shown in fig. 2 b. The specific process is as follows:
the terminal device determines the sequences { b (n) } and A. The value of N is 0 to N-1. A is a non-zero complex number. The sequence { b (n) } may be stored by the terminal device, configured by the network device to the terminal device, or calculated by the terminal device according to a predefined formula.
As a first embodiment of the first sequence set, the first sequence set includes sequences { k (N) }, elements k (N) satisfy k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and t can be regarded as a cyclic shift. It will be understood that the sequence { k (n)) } is truncated or extended from the sequence { c (n)) }, t denotes the element of the sequence { k (n)) }, starting from the t-th element of the sequence { c (n)) }, e.g. t 0, the element of the sequence { k (n)) }, starting from the first element of the sequence { c (n)) }, t 1, the element of the sequence { k (n)) }, starting from the second element of the sequence { c (n)) }, and so on. Mod denotes a modulo operation, since c (n) is a sequence of length 63, so if the length of the sequence k (n) is greater than 63, the sequence c (n) needs to be extended, for example, after taking the 63-th element of the sequence c (n), the first element of the sequence c (n) is spliced to the following as the 64-th element, so as to obtain the sequence k (n) by cyclically extending the sequence c (n).
Wherein the element c (n) satisfies c (n) ═ c1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is the second shift register sequence. The iterative formula of the first shift register sequence is
Figure BDA0001779233700000141
Figure BDA0001779233700000142
I.e. the element c1(n) satisfies the formula, where n is 0,1,2, … 56, and the second shift register sequence has an iterative formula of
Figure BDA0001779233700000143
I.e. the element c2(n) satisfies the formula, n being 0,1,2, …, 57.
{c1(n), n is 0,1,2,3,4, 5) is the first shift register sequenceInitial state of column, { c2(n), where n is 0,1,2,3,4} is an initial state of the second shift register sequence.
The shift register sequence described herein may be generated by a shift register, or may be generated by other means.
In the first embodiment of the first sequence set, N satisfies 48 ≦ N ≦ 96, for example, N may take a value of 48, 54, 60, 72, 90, or 96, where N may take any one of 48, 54, 60, 72, 90, or 96, or N may take a portion of values of 48, 54, 60, 72, 90, or 96, for example, N may take 48, 54, or 60, that is, for 48<N<96, each value included therein may be a value of N, or some values included therein may be a value of N, and the specific description is not limited. [ h ] of0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0,1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]]. Or, [ h ]0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Other values are possible, and specific limitations are not intended.
For example, [ h ]0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]For the first shift register sequence,
Figure BDA0001779233700000144
then, for example, c1(1+6)＝ (c1(1)+c1(6) Mod2, for example, c1(2+6)＝(c1(2)+c1(7) Mod2, and so on. For the second shift register sequence,
Figure BDA0001779233700000145
then, for example, c2(1+5) ═ ((c (1) + c (2)) mod2, for example, c2(2+5) ═ ((c (2) + c (6)) mod2, and so on.
The sequences { c (n) } obtained in the above manner are cyclic codes with the minimum code distance of 26, that is, the cross correlation and auto correlation of { c (n) } are relatively good, so that it can be ensured that the cross correlation between different sequences in the first sequence set is relatively low, and the frequency domain flatness of the first signal obtained according to the sequences in the first sequence set is relatively good. Meanwhile, the number of sequences obtained in the above manner can meet the system requirements, and at least 30 sequences with relatively low cross-correlation and a small number are obtained.
In a first embodiment of the first sequence set, the sequences { k (n) } included in the first sequence set are obtained by two shift register sequences. In the embodiment of the present application, the number of stages of the first shift register sequence may be greater than that of the second shift register sequence, for example, the number of stages of the first shift register sequence is 6, and the number of stages of the second shift register sequence is 5. When the initial states of the first shift register sequences are the same, if the initial states of the second shift register sequences corresponding to the two sequences are different, the cross correlation between the two sequences is relatively small, or the two sequences can be considered to be generated based on different root sequences.
Therefore, the embodiments of the present application propose that, if the sequences obtained according to the first implementation manner of the first sequence set are included in the first sequence set, the sequences included in the first sequence set may be grouped. For example, the first sequence set may include at least two sequence groups, each of which may include at least one sequence, and of course, the different sequence groups may include the same or different number of sequences. When grouping, the division can be performed according to the initial state of the second shift register sequence, or in other words, according to the initial state of the first shift register sequence and the initial state of the second shift register sequence. For example, two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same and the initial state of the second shift register sequence is different. The at least two sequence groups obtained by dividing in this way have small cross-correlation of sequences between any two sequence groups, for example, the cross-correlation of sequences between any two sequence groups is smaller than a threshold value. Then each sequence group may be assigned to one cell, or one sequence group may be assigned to only one cell, that is, one sequence group may not be assigned to a plurality of cells, and then cross-correlation between sequence groups used by different cells is relatively small, thereby reducing interference between cells. Alternatively, one sequence group may be allocated to at least two cells, for example, to 2 cells or 3 cells, and the at least two cells need to be non-adjacent cells, so that even if the sequence groups used by the at least two cells are the same sequence group, interference is small because the at least two cells are not adjacent. The network device may allocate the sequence groups to the cells in a dynamic manner, and at different times, different sequence groups may be allocated to one cell, and the network device may notify the terminal device of information of the sequence groups allocated to the corresponding cells. A sequence group may include at least one sequence, and lengths of different sequences in the at least one sequence may be different, and after a sequence group is allocated to a cell, the cell may select, according to actual needs, a sequence of a corresponding length from the sequence group for use, for example, a cell may select, at different times, a sequence of a different length from the allocated sequence group for use. In addition, as described herein, the inclusion of the sequences obtained according to this embodiment in the first sequence set may mean that all or part of the sequences obtained according to this embodiment are included in the first sequence set.
The first sequence set is configured to the terminal device in advance, for example, by the base station, or by a network element of a higher layer, or the first sequence set may also be specified by a protocol, which is not limited specifically.
To generate the first signal according to the sequence { x (n) }, the sequence { x (n) } obtained according to the sequence { s (n) }, and the sequence { x (n) }, is determined first, so that the terminal device determines the sequence { s (n) }. Wherein the terminal device may select one sequence from the first set of sequences as the sequence { s (n) }. For example, the terminal device may select one sequence from the first sequence set as the sequence { s (n) }, based on the initial state of the first shift register sequence and the initial state of the second shift register sequence. The initial state of the first shift register sequence may be a fixed sequence and is known to the terminal device, and the initial state of the second shift register sequence may be determined by the terminal device according to an identification number (ID) of the sequence group or according to an ID of a cell in which the terminal device is located. The sequence group is a sequence group allocated by the network device to the cell where the terminal device is located.
By using the first signal generated by using the sequences in the first sequence set provided by the embodiment of the present application, it is possible to maintain good frequency domain flatness when the first signal is transmitted by using the PUSCH, PUCCH, or SRS, and at the same time, maintain a low PAPR value and a low cross-correlation between signals, thereby satisfying a communication application environment where the signal is transmitted by using the PUSCH, PUCCH, or SRS.
Optionally, as shown in fig. 3, the process of generating the first signal is, in a specific implementation: first, the terminal device performs Discrete Fourier Transform (DFT) processing on N elements in the sequence { x (N) } to obtain the sequence { f (N) }. Here, the terminal device mainly performs DFT processing using N elements in the configured sequence { x (N) } to obtain a frequency domain sequence, where the frequency domain sequence refers to the sequence { f (N) }. Then, the terminal device maps the sequence { f (N) } to N subcarriers, generates a first signal, and sends the first signal to the network device.
Optionally, the specific process that the terminal device performs DFT processing on the sequence { x (N) } including the N elements to obtain a frequency domain sequence, and then maps the frequency domain sequence to the N subcarriers respectively to obtain the first signal, as shown in fig. 3, includes:
s301, the terminal device performs DFT processing on the sequence { x (N) } containing N elements to obtain a sequence { f (N) }.
In S301, optionally, as shown in fig. 4a, in the process that the terminal device performs DFT processing on the sequence { x (n) } to obtain the sequence { f (n) }, a filter may not be used. In addition, the terminal device performs DFT processing on the sequence { x (N)) } containing N elements, and the sequence processed by the terminal device may include other sequences in addition to the sequence { x (N)) }, which is understood to be that the terminal device concatenates the sequence { x (N)) } with at least one other sequence to obtain a new sequence, the length of the new sequence is, for example, M, and then performs DFT processing on the new sequence with the length of M to obtain the sequence { f (N)) }. For example, referring to fig. 4b, in order to splice the sequence { x (n)) } and the sequence { q (n)) }, a new sequence is obtained, and then the DFT is performed on the new sequence. In fig. 4b, the sequence { q (n) } is split into two parts, and the two parts are spliced to the head and the tail of the sequence { x (n) }, respectively. It can be seen that, since the length of the sequence { Q (N) } in FIG. 4b is 6, the length of the resulting sequence { f (N) } is the sum of the lengths of the sequence { x (N) } and the sequence { Q (N) }, i.e., N + 6. Of course, the length of the sequence { q (n) } is 6 only as an example, and the embodiment of the present application does not limit the length of the sequence { q (n) }. The sequence { q (n) } may carry data, or may carry control information or other information. Optionally, as shown in fig. 4c, in the process that the terminal device performs DFT processing on the sequence { x (n) } to obtain the sequence { f (n)) }, the terminal device may perform DFT processing after using the filter to obtain the sequence { f (n)) }. Optionally, as shown in fig. 4d, in the process that the terminal device performs DFT processing on the sequence { x (n) } to obtain the sequence { f (n)) }, after performing DFT processing, a filter may be used to obtain the sequence { f (n)) }. The embodiment of the application does not limit the processing mode of the terminal device. Among other things, the use of filters helps to reduce PAPR.
S302, the terminal equipment maps the sequence { f (N) } to N sub-carriers respectively to obtain frequency domain signals of N points.
In a specific implementation, the frequency domain signal of N points is a frequency domain signal including N elements.
In fig. 5a and 5b disclosed in the embodiments of the present application below, s represents an index of a first subcarrier of N subcarriers mapped by a sequence { f (N) } in a subcarrier in a communication system.
Optionally, the terminal device maps N elements in the sequence { f (N) } to consecutive N subcarriers, respectively. As shown in fig. 5a, optionally, elements f (0) to f (N-1) in the sequence { f (N) } are mapped to N consecutive subcarriers, denoted s +0, s +1, …, s + N-1, respectively.
In a possible example that the terminal device maps N elements in the sequence { f (N)) } onto consecutive N subcarriers, the terminal device maps N elements in the sequence { f (N)) } onto consecutive N subcarriers in order from the subcarriers higher to lower. Wherein elements in a sequence { f (n) } are mapped to one frequency domain subcarrier. The frequency domain sub-carriers are the smallest units of frequency domain resources that are used to carry data information.
In another possible example that the terminal device maps N elements in the sequence { f (N)) } onto N consecutive subcarriers, respectively, the terminal device maps N elements in the sequence { f (N)) } onto N subcarriers in order from the subcarriers low to high. Mapping an element in the sequence f (n) to a subcarrier carries the element on the subcarrier. After mapping, when the terminal device transmits data via radio frequency, it is equivalent to transmitting this element on this subcarrier. In a communication system, different terminal devices may occupy different subcarriers to transmit data. The location of the N subcarriers in the plurality of subcarriers present in the communication system may be predefined or configured by the network device through signaling.
Alternatively, the terminal device may map N elements in the sequence { f (N) } onto N subcarriers at equal intervals, respectively. As shown in fig. 5b, the N subcarriers are equally spaced in the frequency domain, taking the interval between the N subcarriers as 1 as an example. The element f (0) to f (N-1) in the sequence { f (N) } has an interval of 1 subcarrier. The method specifically comprises the following steps: are mapped to N equally spaced subcarriers, numbered s +0, s +2, …, s +2 (N-1).
S303, the terminal device performs Inverse Fast Fourier Transformation (IFFT) on the frequency domain signal including the N elements to obtain a corresponding time domain signal, and adds a cyclic prefix to the time domain signal to generate a first signal.
It should be noted that, in the embodiment of the present application, a manner of generating the first signal is not limited to the implementation manner in which the terminal device performs DFT processing on a sequence { x (N) } including N elements to obtain a frequency domain sequence, and then maps the frequency domain sequence to N subcarriers respectively to obtain the first signal. For example, the terminal device may further use a shaping filter to obtain the sequence { y (n) } for the sequence { x (n) }, and then modulate the sequence { y (n) } onto a carrier to obtain the first signal.
S22, the terminal device sends the first signal, and the network device receives the first signal from the terminal device, which is carried on N subcarriers.
Optionally, in step S303, the time domain signal obtained by the terminal device after performing IFFT on the generated frequency domain signal of N points is an Orthogonal Frequency Division Multiplexing (OFDM) symbol. In S303, the terminal device transmits the first signal via radio frequency. That is, the terminal device sends a first signal carrying the sequence { f (N) } on the N subcarriers.
A terminal device may transmit a first signal carrying the sequence f (n) on one OFDM symbol. The first signal carrying the sequence f (n) may also be transmitted over a number of OFDM symbols.
As an alternative, the first signal may be Uplink Control Information (UCI), DMRS, Sounding Reference Signal (SRS), or control information. Alternatively, the first signal may be an Acknowledgement (ACK), a Negative Acknowledgement (NACK), a Scheduling Request (SR), or the like. The embodiments of the present application are not limited to the first signal including the above information.
As another alternative, the first signal is a signal for carrying communication information. In a specific implementation, the carrying manner of the communication information may be a carrying manner by sequence selection, or a carrying manner by sequence modulation, but is not limited thereto. The communication information includes, for example, data and/or control information.
Among them, for example, the sequence selection mode is: assignment 2 to a terminalnAn orthogonal sequence. This 2nAn orthogonal sequence, e.g. 2 of 1 root sequencenA cyclic shift of 2nThe orthogonal sequences can carry n bits of information. For example, 4 sequences numbered 0,1,2 and 3. Where 00 corresponds to sequence 0, 01 corresponds to sequence 1, 10 corresponds to sequence 2, and 11 corresponds to sequence 3, so that 4 sequences can carry 2 bits of information.
For example, the sequence modulation method is: 1 sequence is allocated to a terminal device, and the information required to be transmitted by the terminal device is generated into modulation symbols. The modulation symbols include, but are not limited to, BPSK symbols, Quadrature Phase Shift Keying (QPSK) symbols, 8-order Quadrature Amplitude Modulation (QAM) symbols, 16QAM symbols, and the like. The modulation symbol is multiplied by the sequence to generate the actual transmission sequence. For example, a BPSK symbol may be 1 or-1, and for a sequence { x (n) }, after modulation based on BPSK symbols, the transmitted sequence may be { x (n) }, or { -x (n) }.
In a possible example, as described in the corresponding description of fig. 2b, after the terminal device accesses the network, the sequence { x (N)) } containing N elements configured by the network device may be determined by a and the sequence { b (N)) }. It should be noted that, for the sequence modulation method, different information is carried by different values of a in the sequence { x (n) }.
For example, a may be a modulation symbol. At this time, a path of data information bits or control information bits is modulated to obtain a. A is carried over the N elements contained in the sequence { x (N) }, A does not change with N.
Alternatively, a is a constant. For example, a ═ 1. For example, a may be a symbol known to both the terminal device and the network device. A may also represent amplitude.
It should be noted that a is constant over a transmission time unit, and does not mean that a is fixed and constant, and a may be variable when the first signal is transmitted at different time instants. For example, all N elements contained in the sequence { x (N) } are reference signals, a is the amplitude of the reference signal, and the terminal device may transmit as a ═ 1 when transmitting the first signal for the first time. The terminal device may transmit the first signal as a ═ 2 the second time.
The network device receives signals on the N subcarriers according to the positions of the N subcarriers in the subcarriers of the communication system, which are predefined or preconfigured.
For example, the network device may acquire the first signals on N subcarriers on consecutive N subcarriers, or acquire the first signals on N subcarriers on equally spaced N subcarriers.
S23, the network device obtains N elements in the sequence { x (N) } carried by the first signal.
For example, the manner of acquiring N elements in the sequence { x (N)) } is that the network device acquires N elements in the sequence { f (N)) }, and performs Inverse Discrete Fourier Transform (IDFT) on the sequence { f (N)) }toobtain N elements in the sequence { x (N)) }.
As can be seen from the foregoing description, the terminal device performs DFT on N elements in the sequence { x (N) } to obtain the sequence { f (N)) }, and then maps the sequence { f (N)) } to N subcarriers to generate the first signal. For a detailed description of the sequence { x (n) }, reference is made to the foregoing description, and details are not repeated herein.
Then, the network device obtains the first signals on N subcarriers on consecutive N subcarriers, or obtains the first signals on N subcarriers at equal intervals, removes the cyclic prefix of the first signal to obtain a time domain signal, performs M-point DFT on the time domain signal to obtain a frequency domain signal containing N elements, where M is greater than or equal to N, and then determines N elements in the sequence { f (N) } based on the frequency domain signal containing N elements.
In a specific implementation, after accessing the network, the terminal device sends the PUSCH or PUCCH or SRS using the configured sequence { x (n) }, and the network device receives the PUSCH or PUCCH or SRS using the sequence { x (n) } configured to the terminal device.
S24, the network device processes the first signal according to N elements in the sequence { x (N) }.
Optionally, as shown in fig. 6a, the network device performs correlation processing on the acquired sequence { y (n) } and all possible sequences { x' (n) }, and performs maximum likelihood comparison, so as to acquire data transmitted by the terminal device. The sequence { y (n) } is obtained by the network device according to the received first signal, and referring to fig. 6b, the network device removes the cyclic prefix from the received first signal, and then performs Fast Fourier Transform (FFT), demapping, and the like to obtain the sequence { y (n) }. { x' (n) } is a local sequence generated by { x (n) }. In conjunction with the above description, for example, for two bits of information, the value combination is { (0,0), (0,1), (1,0), (1,1) }. Referring to FIG. 2b, when the two-bit information is (0,0), the obtained sequence x '(n) is the sequence x'1(n), when the two-bit information is (0,1), the obtained sequence x '(n) is the sequence x'2(n) when the two-bit information is (1,0), the obtained sequence x '(n) is the sequence x'3(n) when the two-bit information is (1,1), the obtained sequence x '(n) is the sequence x'4(n) of (a). The 4 sequences x'1(n)，x′2(n)，x′3(n)，x′4(n) cyclically shifted sequences which may be the same sequence, the sequences { y (n) } and x'1(n)，x′2(n)，x′3(n)，x′4(n) are correlated respectively to obtain 4 correlation values. And the value of the two-bit information corresponding to the maximum correlation value is the data acquired by the network equipment. For example, the maximum correlation value is the sequence { y (n) } and x'1And (n) is obtained by correlation, the two bits of information are (0, 0).
By using the new sequence provided by the embodiment of the application, better frequency domain flatness can be kept when the PUSCH, PUCCH or SRS is used for transmitting signals, and meanwhile, lower PAPR value and lower cross correlation among signals are kept, so that the communication application environment of the PUSCH, PUCCH or SRS transmitted signals is met.
In order to solve the same technical problem, a second signal transmitting and receiving method is provided below by another embodiment. The flow involved in the method can refer to S21-S24, and S301-S303 in the embodiment shown in fig. 2 a. Unlike the embodiment shown in fig. 2a, in the second signal transmission and reception method, the generation manner of the sequences included in the first sequence set may be different.
As a second embodiment of the first sequence set, the first sequence set includes a sequence { k (N)) }, where k (N) satisfies k (N) ═ c ((N + t) mod 1023, N ═ 0,1,2, …, N-1, t is an integer, t can be regarded as a cyclic shift, and reference may be made to the related description in the first embodiment of the first sequence set. Mod represents a modulo operation, since c (n) is a sequence with length of 1023, if the length of sequence { k (n)) } is greater than 1023, the sequence { c (n)) } needs to be extended, for example, after taking the 1023 th element of sequence { c (n)) }, the first element of sequence { c (n)) }isspliced to the next element as the 1024 th element, so that the sequence { k (n)) }isobtained by circularly extending the sequence { c (n)) }.
The element c (n) satisfies c (n) ═ c1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is the second shift register sequence, the first shift register sequence being iterated by the formula
Figure BDA0001779233700000191
Figure BDA0001779233700000192
I.e. the element c1(n) satisfies the formula, the iterative formula of the second shift register sequence is
Figure BDA0001779233700000193
Figure BDA0001779233700000194
I.e. the element c2(n) satisfies the formula. v is an integer.
{c1(n), where n is 0,1,2,3,4,5,6,7,8,9} is an initial state of the first shift register sequence, { c2(n), where n is 0,1,2,3,4} is an initial state of the second shift register sequence.
The first shift register sequence in this embodiment may be a shift register sequence different from the first shift register sequence in the embodiment shown in fig. 2a, and the second shift register sequence in this embodiment may be a shift register sequence different from the second shift register sequence in the embodiment shown in fig. 2 a.
In a second embodiment of the first sequence set, N satisfies 768 ≦ N ≦ 1620, for example, N may take any one of 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500, or 1536, where N may take any one of 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500, or 1536, or N may take a partial value of 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500, or 1536, for example, N may take 768, 810, 864, 900, 960, 972, 1080, or 1152, that is, for 768 ≦ N ≦ 1620, each value included therein may be a value of N, or a portion included therein may be a value of N, which is not limited. [ q ] of0,q1,q2,q3,q4,q5,q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ].
Alternatively, [ q ] in addition to the values enumerated above0,q1,q2,q3,q4,q5,q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Other values are possible, and specific limitations are not intended.
The sequences { c (n) } obtained in the above manner are cyclic codes with the minimum code distance of 496, that is, the cross correlation and auto correlation of { c (n) } are relatively good, so that it can be ensured that the cross correlation between different sequences in the first sequence set is relatively low, and the frequency domain flatness of the first signal obtained according to the sequences in the first sequence set is relatively good. Meanwhile, the sequences obtained in the above manner are sequences with a number that can meet the system requirements, at least 30 sequences with relatively low cross-correlation, and a small number.
In a second embodiment of the first sequence set, the sequences { k (n) } included in the first sequence set are also obtained by two shift register sequences. In the embodiment of the present application, the number of stages of the first shift register sequence may be greater than the number of stages of the second shift register sequence, for example, the number of stages of the first shift register sequence is 10, and the number of stages of the second shift register sequence is 5. The sequences generated by such a mechanism have a smaller cross correlation if the initial states of the second shift register sequences corresponding to the two sequences are different when the initial states of the first shift register sequences are the same, or it can be considered that the two sequences are generated based on different root sequences.
Therefore, the embodiments of the present application propose that, if the sequences obtained according to the second implementation manner of the first sequence set are included in the first sequence set, the sequences included in the first sequence set may be grouped. In grouping, the division can be performed according to the initial state of the second shift register sequence, for example, if the value of v is fixed, the division can be performed according to the initial state of the first shift register sequence and the initial state of the second shift register sequence,for this grouping, reference is made to the description relating to the embodiment shown in fig. 2 a. Or, in grouping, the grouping may also be performed according to the initial state of the first shift register sequence, the initial state of the second shift register sequence, and the value of v, for example, the initial state of the first shift register sequence and the initial state of the second shift register sequence are both known, and are both fixed sequences, for example, and the value of v may be determined according to a sequence group ID or a cell ID. For example, the initial state of the first shift register sequence and the initial state of the second shift register sequence are both fixed, and v takes on the value { v1,v2Make v1≠v2(mod31) so that two different sequences (groups) can be determined by different values of v, which can be determined according to the sequence group ID or according to the cell ID. At least one sequence group obtained by dividing in this way also satisfies that the correlation between different sequence groups is small. After obtaining at least one sequence group, how to allocate the sequence group for the cell may refer to the related description in the embodiment shown in fig. 2 a.
In addition, regarding other related contents of this embodiment, for example, how the terminal device generates the first signal, how the terminal device sends the first signal, how the network device receives and processes the first signal, and the like, reference may be made to the related description in the embodiment shown in fig. 2a, which is not repeated herein. In the embodiment shown in fig. 2a, the content shown in fig. 3 may be considered to be included.
In order to solve the same technical problem, a third signal transmitting and receiving method is provided below by another embodiment. The flow involved in the method can refer to S21-S24, and S301-S303 in the embodiment shown in fig. 2 a. Unlike both the above two embodiments, in the third signal transmission/reception method, the generation manner of the sequences included in the first sequence set is different.
As a third embodiment of the first sequence set, the sequences included in the first sequence set are sequences from one shift register.
In particular, in the third embodiment of the first sequence set, the first sequence set comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1.
Figure BDA0001779233700000221
Therein, the sequence { c1(n) may be a third shift register sequence, c1(n) is e {0,1,2,3}, it being understood that c is1(n) is a quaternary sequence, i.e. there may be 4 values, c1(n) is e {0,1,2,3 }. The iterative formula of the third shift register sequence is
Figure BDA0001779233700000222
I.e. the element c1(n) satisfies the formula. Alternatively, the iteration formula of the third shift register sequence is c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n being 0,1,2, … 246, v being an integer, i.e. the element c1(n) may also satisfy the formula. c. C2(n)∈ {0,1,2,3}，c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Elements of (n) }, sequence { c2(n) is a first shift register sequence, the iteration formula for the first shift register sequence being
Figure BDA0001779233700000223
Figure BDA0001779233700000224
I.e. the element c2(n) satisfies the formula. Sequence c3(n) is the second shift register sequence, the first shift register sequence being iterated by the formula
Figure BDA0001779233700000225
Figure BDA0001779233700000226
I.e. the element c3(n) satisfies the formula.
The first shift register sequence in this embodiment may be a shift register sequence different from the first shift register sequence in the foregoing embodiment, and the second shift register sequence in this embodiment may be a shift register sequence different from the second shift register sequence in the foregoing embodiment.
In the third embodiment of the first sequence set, N satisfies 192 ≦ N ≦ 432, for example, the value of N may be 192, 216, 240, 270, 288, 300, 324, 360, 384, or 432, where N may take any one of 192, 216, 240, 270, 288, 300, 324, 360, 384, or 432, or N may take a part of values of 192, 216, 240, 270, 288, 300, 324, 360, 384, or 432, for example, N may take 300, 324, 360, 384, or 432, that is, for the range of 192 ≦ N ≦ 432, each value included therein may be the value of N, or a part of values included therein may be the value of N, which is not limited in particular. [ y ]0,y1,y2,y3,y4,y5,y6]May be [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2, 0]、[3,2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2, 2,3,3,1]、[3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、 [3,0,0,2,0,0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]. Or [ y0,y1,y2, y3,y4,y5,y6]Other values are also possible, and specific limitations are not intended.
The sequences { c (n) } obtained in the above manner are cyclic codes with the minimum code distance of 118, that is, { c (n) } have relatively good cross-correlation and auto-correlation, so that it can be ensured that the cross-correlation between different sequences in the first sequence set is relatively low, and the frequency domain flatness of the first signal obtained according to the sequences in the first sequence set is relatively good. Meanwhile, the sequences obtained in the above manner are sequences with a number that can meet the system requirements, at least 30 sequences with relatively low cross-correlation, and a small number.
If the first sequence set includes sequences obtained according to the third embodiment of the first sequence set, the sequences included in the first sequence set may also be grouped, for example, the first sequence set may include at least two sequence groups, each of which may include at least one sequence, and of course, the number of sequences included in different sequence groups may be the same or different. When grouping, the cross-correlation of sequences between any two divided sequence groups may also be made small, for example, the cross-correlation of sequences between any two sequence groups is smaller than a threshold. Then, each sequence group may also be allocated to one cell, or one sequence group may be allocated to only one cell, that is, one sequence group may not be allocated to a plurality of cells, so that cross-correlation between sequence groups used by different cells is relatively small, thereby reducing interference between cells. Alternatively, one sequence group may be allocated to at least two cells, for example, to 2 cells or 3 cells, and the at least two cells need to be non-adjacent cells, so that even if the sequence groups used by the at least two cells are the same sequence group, the interference is small because the at least two cells are not adjacent. The network device may dynamically allocate the sequence groups to the cells, and at different times, different sequence groups may be allocated to one cell, and the network device may notify the terminal device of information of the sequence groups allocated to the corresponding cells. A sequence group may include at least one sequence, and the length of different sequences in the at least one sequence may be different, and after a sequence group is allocated to a cell, the cell may select, according to actual needs, a sequence of a corresponding length from the sequence group for use, for example, a cell may select, at different times, a sequence of a different length from the allocated sequence group for use.
In the embodiment of the present application, for the three embodiments of the first sequence set described in the above three embodiments, all or some of the three embodiments may be concurrent, that is, all of the above three embodiments may be applied in combination, or any two of the embodiments may be applied in combination, for example, the sequences obtained according to the above three embodiments may be included in the first sequence set, or the first set of sequences may comprise sequences obtained according to the first and second embodiments as above, or the sequences obtained according to the first and third embodiments above may be included in the first set of sequences, or the first sequence set may include sequences obtained according to the second and third embodiments as above; alternatively, the above three embodiments of the first sequence set may be applied separately, that is, the three embodiments do not coexist, or the above three embodiments need to be applied separately, for example, the first sequence set may include the sequences obtained according to the first embodiment, or the first sequence set may include the sequences obtained according to the second embodiment, or the first sequence set may include the sequences obtained according to the third embodiment. In this document, the inclusion of the sequences obtained according to the first embodiment in the first sequence set may mean that all or part of the sequences obtained according to the first embodiment are included in the first sequence set, and similarly, the inclusion of the sequences obtained according to the second embodiment in the first sequence set may mean that all or part of the sequences obtained according to the second embodiment are included in the first sequence set, and the inclusion of the sequences obtained according to the third embodiment in the first sequence set may mean that all or part of the sequences obtained according to the third embodiment are included in the first sequence set.
Specifically, which sequences are included in the first sequence set is not limited in the embodiments of the present application.
If the first sequence set includes the sequence obtained according to the third embodiment of the first sequence set, the terminal device may also select the sequence { s (n) } from the first sequence set according to a corresponding method, and the specific selection manner is not limited.
Regarding other related contents of this embodiment, for example, how the terminal device generates the first signal, how the terminal device sends the first signal, how the network device receives and processes the first signal, and the like, reference may be made to the related description in the embodiment shown in fig. 2a, which is not repeated herein.
In summary, by using the new sequences provided by the embodiments of the present application, it is possible to maintain a good frequency domain flatness when using PUSCH, PUCCH, or SRS to transmit signals, and at the same time, maintain a low PAPR value and a low cross-correlation between signals, thereby satisfying a communication application environment where PUSCH, PUCCH, or SRS is used to transmit signals, and reducing interference between cells.
The following describes an apparatus for implementing the above method in the embodiment of the present application with reference to the drawings. Therefore, the above contents can be used in the subsequent embodiments, and the repeated contents are not repeated.
Fig. 7 shows a schematic structural diagram of a communication apparatus 700. The communication apparatus 700 may implement the functionality of the network devices referred to above. The communication apparatus 700 may be the terminal device described above, or may be a chip provided in the terminal device described above. The communication device 700 may include a processor 701 and a transceiver 702. The processor 701 may be configured to execute S21 in the embodiment shown in fig. 2a, S301 to S303 in the embodiment shown in fig. 3, and/or other processes supporting the techniques described herein, such as all or part of processes other than information transceiving. The transceiver 702 may be used to perform S22 in the embodiment shown in fig. 2a, and/or other processes for supporting the techniques described herein, such as all or part of an messaging process.
For example, a processor 701 for generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) } satisfying x (N) ═ a · b (N) · jn，
Figure BDA0001779233700000241
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n))A and u are both non-zero complex numbers, the sequence consisting of the elements s (n) { s (n) } is one of the sequences in the first set of sequences;
a transceiver 702 for transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000242
Figure BDA0001779233700000243
Element c2(n) satisfies
Figure BDA0001779233700000244
Figure BDA0001779233700000245
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000246
Element c2(n) satisfies
Figure BDA0001779233700000247
Figure BDA0001779233700000248
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1], and/or,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000261
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000262
Figure BDA0001779233700000263
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer，c2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000264
Figure BDA0001779233700000265
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000266
Figure BDA0001779233700000267
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
All relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, which is not described herein again.
Fig. 8 shows a schematic structural diagram of a communication device 800. The communication device 800 may implement the functionality of the network apparatus referred to above. The communication apparatus 800 may be the network device described above, or may be a chip provided in the network device described above. The communication device 800 may include a processor 801 and a transceiver 802. The processor 801 may be configured to execute the processes S23 and S24 in the embodiment shown in fig. 2a, and/or other processes supporting the technology described herein, such as all processes or part processes except for information transceiving. The transceiver 802 may be used to perform S22 in the embodiment shown in fig. 2a, and/or other processes for supporting the techniques described herein, such as all or part of the messaging process.
For example, transceiver 802, is configured to receive a first signal carried on N subcarriers;
a processor 801, configured to obtain N elements in a sequence { x (N)) } carried by the first signal, where N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ a · b (N) · jn，
Figure BDA0001779233700000268
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a processor 801 further configured to process the first signal according to N elements of the sequence { x (N) }; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000271
Figure BDA0001779233700000272
Element c2(n) satisfies
Figure BDA0001779233700000273
Figure BDA0001779233700000274
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000275
Element c2(n) satisfies
Figure BDA0001779233700000276
Figure BDA0001779233700000277
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1], and/or,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000291
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000292
Figure BDA0001779233700000293
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer, c is an integer2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000294
Figure BDA0001779233700000295
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000296
Figure BDA0001779233700000297
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
All relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, which is not described herein again.
In a simple embodiment, one skilled in the art may also realize the communication device 700 or the communication device 800 by the structure of the communication device 900 as shown in fig. 9 a. The communication apparatus 900 may implement the functions of the terminal device or the network device mentioned above. The communication device 900 may include a processor 901.
When the communication apparatus 900 is used to implement the functions of the network device mentioned above, the processor 901 may be configured to execute S23 and S24 in the embodiment shown in fig. 2a, and/or other processes for supporting the technology described herein, for example, all or part of processes except for information transceiving may be executed; alternatively, when the communication apparatus 900 is used to implement the functions of the terminal device mentioned above, the processor 901 may be configured to execute S21 in the embodiment shown in fig. 2a, S301 to S303 in the embodiment shown in fig. 3, and/or other processes for supporting the technology described herein, for example, all or part of the information transceiving processes may be executed.
The communication apparatus 900 may be implemented by a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), a system on chip (SoC), a Central Processing Unit (CPU), a Network Processor (NP), a digital signal processing circuit (DSP), a Microcontroller (MCU), or a programmable controller (PLD) or other integrated chips, so that the communication apparatus 700 may be disposed in the first network device or the second network device of the embodiment of the present application, so that the first network device or the second network device implements the method of the embodiment of the present application.
In an alternative implementation, the communication apparatus 900 may include a transceiver component for communicating with other devices. Where the communications apparatus 900 is used to implement the functionality of the network device or the terminal device referred to above, the transceiving component may be used to perform S22 in the embodiment shown in fig. 2a, and/or other processes for supporting the techniques described herein. For example, one of the transceiving components is a communication interface, if the communication apparatus 900 is a network device or a terminal device, the communication interface may be a transceiver in the network device or the terminal device, such as the transceiver 702 or the transceiver 802, the transceiver is a radio frequency transceiving component in the network device or the terminal device, or if the communication apparatus 900 is a chip disposed in the network device or the terminal device, the communication interface may be an input/output interface of the chip, such as an input/output pin or the like.
In an alternative implementation, the communication device 900 may further comprise a memory 902, which may refer to fig. 9b, wherein the memory 902 is used for storing computer programs or instructions, and the processor 901 is used for decoding and executing the computer programs or instructions. It will be appreciated that these computer programs or instructions may comprise the functional programs of the network devices or terminal devices described above. When the functional program of the network device is decoded and executed by the processor 901, the network device can be enabled to implement the functions of the network device in the method provided by the embodiment shown in fig. 2a in this application. When the functional program of the terminal device is decoded and executed by the processor 901, the terminal device can be enabled to implement the functions of the terminal device in the method provided by the embodiment shown in fig. 2a or the embodiment shown in fig. 3 in the present application.
In another alternative implementation, the functional programs of these network devices or terminal devices are stored in a memory external to communications apparatus 900. When the functional program of the network device is decoded and executed by the processor 901, part or all of the content of the functional program of the network device is temporarily stored in the memory 902. When the terminal device function program is decoded and executed by the processor 901, part or all of the contents of the terminal device function program are temporarily stored in the memory 902.
In another alternative implementation, the functional routines of these network devices or the second network device are located in a memory 902 stored within the communications apparatus 900. When the memory 902 inside the communication apparatus 900 stores the function program of the network device, the communication apparatus 900 may be provided in the network device according to the embodiment of the present application. When the memory 902 inside the communication apparatus 900 stores the function program of the terminal device, the communication apparatus 900 may be provided in the terminal device of the embodiment of the present application.
In yet another alternative implementation, part of the contents of the functional programs of these network devices are stored in a memory external to the communication apparatus 900, and the other part of the contents of the functional programs of these network devices are stored in a memory 902 internal to the communication apparatus 900. Alternatively, a part of the contents of the function programs of these terminal devices are stored in a memory external to the communication apparatus 900, and the other part of the contents of the function programs of these terminal devices are stored in a memory 902 internal to the communication apparatus 900.
In the embodiment of the present application, the communication apparatus 700, the communication apparatus 800, and the communication apparatus 900 may be presented in a form in which each function is divided into respective functional modules according to the respective functions, or may be presented in a form in which each functional module is divided in an integrated manner. As used herein, a "module" may refer to an ASIC, a processor and memory that execute one or more software or firmware programs, an integrated logic circuit, and/or other components that provide the described functionality.
In addition, the embodiment shown in fig. 7 provides a communication apparatus 700 which can be implemented in other forms. The communication device comprises, for example, a processing unit and a transceiving unit. For example, the processing unit may be implemented by the processor 701, and the transceiving unit may be implemented by the transceiver 702. Wherein the processing unit may be configured to perform S21 in the embodiment shown in fig. 2a, S301-S303 in the embodiment shown in fig. 3, and/or other processes for supporting the techniques described herein. The transceiver unit may be used to perform S22 in the embodiment shown in fig. 2a, and/or other processes for supporting the techniques described herein.
For example, a processing unit for generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) } satisfying x (N) ═ a · b (N) · jn，
Figure BDA0001779233700000301
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a transceiving unit for transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000302
i) Mod2, n is 0,1,2, … 56, element c2(n) satisfies
Figure BDA0001779233700000303
Figure BDA0001779233700000311
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises sequences { k (n) }, elements k (n) satisfying k (n) ═ c ((n + t) mod 1023), n ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000312
Element c2(n) satisfies
Figure BDA0001779233700000313
Figure BDA0001779233700000314
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1], and/or,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000321
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000322
Figure BDA0001779233700000323
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer, c is an integer2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000324
Figure BDA0001779233700000331
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000332
Figure BDA0001779233700000333
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
All relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, which is not described herein again.
The embodiment shown in fig. 8 provides a communication apparatus 800 that can also be implemented in other forms. The communication device comprises, for example, a processing unit and a transceiving unit. For example, the processing unit may be implemented by the processor 801 and the transceiving unit may be implemented by the transceiver 802. Among other things, the processing unit may be used to perform S23 and S25 in the embodiment shown in FIG. 2a, and/or other processes for supporting the techniques described herein. The transceiver unit may be used to perform S22 and S24 in the embodiment shown in fig. 2a, and/or other processes for supporting the techniques described herein.
For example, the receiving and transmitting unit is configured to receive a first signal carried on N subcarriers;
a processing unit, configured to obtain N elements in a sequence { x (N)) } carried by the first signal, where N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ a · b (N) · jn，
Figure BDA0001779233700000334
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a processing unit further configured to process the first signal according to N elements of the sequence { x (N) }; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0,1,2,…，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000335
Figure BDA0001779233700000336
Element c2(n) satisfies
Figure BDA0001779233700000337
Figure BDA0001779233700000338
Wherein N is 48-96, h0,h1,h2,h3,h4,h5]And [ p ]0,p1,p2,p3,p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1,1,0,0,1,1]And [1,0,0,0, 1]]、[1,1,0,1,1,0]And [1,1,0,0,0]、[1,0,1,1,0, 1]And [1,0,0,0, 1]]、[1,1,1,0,0,1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure BDA0001779233700000339
Element c2(n) satisfies
Figure BDA00017792337000003310
Figure BDA00017792337000003311
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0,q1,q2,q3,q4,q5, q6,q7,q8,q9]And [ w0,w1,w2,w3,w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1], and/or,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure BDA0001779233700000351
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure BDA0001779233700000352
Figure BDA0001779233700000353
Or element c1(n) satisfies c1(n)＝ (c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2, … 246, v is an integer, c is an integer2(n)∈{0,1,2,3}， c3(n)∈{0,1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure BDA0001779233700000354
Figure BDA0001779233700000355
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure BDA0001779233700000356
Figure BDA0001779233700000357
Wherein [ y0,y1,y2,y3,y4,y5,y6]Is [3,1,0,0,2,0,0]、[3,0,2,0,3,0,0]、[3,0,0,1,0,2,0]、[3,3,1,1,2,2,0]、[3,2,1,3,3,2,0]、[3, 2,3,2,2,1,1]、[3,2,1,1,3,1,1]、[3,3,1,1,2,3,1]、[3,3,1,2,3,3,1]、[3,0,2,2,3,3,1]、 [3,3,3,2,2,1,2]、[3,1,2,3,0,3,2]、[3,0,2,1,1,3,2]、[3,3,3,1,3,3,2]、[3,0,0,2,0, 0,3]、[3,2,1,0,1,2,3]、[3,1,2,2,1,2,3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
All relevant contents of each step related to the above method embodiment may be referred to the functional description of the corresponding functional module, which is not described herein again.
Since the communication apparatus 700, the communication apparatus 800 and the communication apparatus 900 provided in the embodiments of the present application can be used to execute the method provided in the embodiment shown in fig. 2a or the embodiment shown in fig. 3, the technical effects obtained by the embodiments of the method can be referred to the above embodiments, and are not repeated herein.
Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the procedures or functions described in accordance with the embodiments of the present application are generated in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a Digital Versatile Disk (DVD)), or a semiconductor medium (e.g., a Solid State Disk (SSD)), among others.
It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present application without departing from the spirit and scope of the application. Thus, to the extent that such modifications and variations of the embodiments of the present application fall within the scope of the claims and their equivalents, it is intended that the present application also encompass such modifications and variations.

Claims (77)

1. A signal transmission method, comprising:
generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) }satisfyingx (N) ═ a · b (N) · jn，
Figure FDA0003094903870000011
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (c + t) mod 10231(n)+c2((n+v)mod 31))mod2, n is 0,1,2, …,1022, v is an integer, c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000012
Figure FDA0003094903870000013
Element c2(n) satisfies
Figure FDA0003094903870000014
Figure FDA0003094903870000015
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
and/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000031
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000032
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n)Satisfy the requirement of
Figure FDA0003094903870000033
Figure FDA0003094903870000034
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000035
Figure FDA0003094903870000036
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
2. The method of claim 1,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
3. The method according to claim 1, characterized in that the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same, the initial state of the second shift register sequence is the same, and v is different.
4. The method of claim 1, further comprising:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
5. The method of claim 1, further comprising:
selecting a sequence { s (n) } from the first set of sequences based on the initial state of the first shift register sequence, the initial state of the second shift register sequence, and v, wherein v is determined based on a sequence group ID or a cell ID.
6. The method of claim 1, wherein the first signal is a DMRS or an SRS or control information.
7. The method of claim 1, wherein generating the first signal according to the sequence { x (n) }, comprises:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
8. The method of claim 7, further comprising:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
9. A signal transmission method, comprising:
generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) }satisfyingx (N) ═ a · b (N) · jn，
Figure FDA0003094903870000041
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence (c)1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000042
Figure FDA0003094903870000043
Element c2(n) satisfies
Figure FDA0003094903870000044
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000045
Element c2(n) satisfies
Figure FDA0003094903870000046
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000061
Figure FDA0003094903870000062
Element c2(n) satisfies
Figure FDA0003094903870000063
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000064
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000065
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) { is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000066
Figure FDA0003094903870000067
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000068
Figure FDA0003094903870000069
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N satisfies 192 < N < 432;
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA00030949038700000610
Figure FDA00030949038700000611
Element c2(n) satisfies
Figure FDA00030949038700000612
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000071
Element c2(n) satisfies
Figure FDA0003094903870000072
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ]; and the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000081
therein, the sequence { c1(n) is a third shift register sequence,c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000082
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000083
Figure FDA0003094903870000084
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000085
Figure FDA0003094903870000086
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
10. The method of claim 9,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
11. The method according to claim 9, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same, the initial state of the second shift register sequence is the same, and v is different.
12. The method of claim 9, further comprising:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
13. The method of claim 9, further comprising:
selecting a sequence { s (n) } from the first set of sequences based on the initial state of the first shift register sequence, the initial state of the second shift register sequence, and v, wherein v is determined based on a sequence group ID or a cell ID.
14. The method of claim 9, wherein the first signal is a DMRS or an SRS or control information.
15. The method of claim 9, wherein generating the first signal according to the sequence { x (n) }, comprises:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
16. The method of claim 15, further comprising:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
17. A signal transmission method, comprising:
generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) }satisfyingx (N) ═ a · b (N) · jn，
Figure FDA0003094903870000091
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000101
Figure FDA0003094903870000102
Element c2(n) satisfies
Figure FDA0003094903870000103
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]]。
18. The method of claim 17,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
19. The method according to claim 17, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same and the initial state of the second shift register sequence is different.
20. The method of claim 17, further comprising:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
21. The method of claim 17, wherein the first signal is a DMRS or an SRS or control information.
22. The method of claim 17, wherein generating the first signal according to the sequence { x (n) }, comprises:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
23. The method of claim 22, further comprising:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
24. A signal receiving method, comprising:
receiving a first signal carried on N subcarriers, and acquiring N elements in a sequence { x (N)) }carriedby the first signal, wherein N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ A.b (N) · jn，
Figure FDA0003094903870000104
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
processing said first signal according to N elements of said sequence { x (N); wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N — 1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2,., 1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000111
Element c2(n) satisfies
Figure FDA0003094903870000112
Figure FDA0003094903870000113
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
and/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure FDA0003094903870000121
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000122
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000123
i) Mod 4, n 0,1,23(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000131
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
25. The method of claim 24,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
26. The method according to claim 24, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same, the initial state of the second shift register sequence is the same, and v is different.
27. The method of claim 24, wherein the first signal is a DMRS or an SRS or control information.
28. The method of claim 24, wherein receiving a first signal carried on N subcarriers, and obtaining N elements in a sequence { x (N) } carried by the first signal comprises:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
29. A signal receiving method, comprising:
receiving a first signal carried on N subcarriers, and acquiring N elements in a sequence { x (N)) }carriedby the first signal, wherein N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ A.b (N) · jn，
Figure FDA0003094903870000132
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
processing said first signal according to N elements of said sequence { x (N); wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000133
Figure FDA0003094903870000134
Element c2(n) satisfies
Figure FDA0003094903870000135
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And a combination of [1,0,0，1]、[1，1，1，0，0，1]and [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000141
Element c2(n) satisfies
Figure FDA0003094903870000142
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000151
Figure FDA0003094903870000152
Element c2(n) satisfies
Figure FDA0003094903870000153
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000161
wherein, the sequence (c)1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000162
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000163
Figure FDA0003094903870000164
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000165
Figure FDA0003094903870000166
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N satisfies 192 < N < 432;
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000167
Figure FDA0003094903870000168
Element c2(n) satisfies
Figure FDA0003094903870000169
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And a combination of [1,1,0,0]、[1，1，0，0，1，1]and [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA00030949038700001610
Element c2(n) satisfies
Figure FDA00030949038700001611
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ]; and the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000181
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000182
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3(n) } inElement of (2), sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000183
Figure FDA0003094903870000184
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000185
Figure FDA0003094903870000186
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
30. The method of claim 29,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
31. The method of claim 29, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are the same, and v is different.
32. The method of claim 29, wherein the first signal is a DMRS or an SRS or control information.
33. The method of claim 29, wherein receiving a first signal carried on N subcarriers, and obtaining N elements in a sequence { x (N) } carried by the first signal comprises:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
34. A signal receiving method, comprising:
receiving a first signal carried on N subcarriers, and acquiring N elements in a sequence { x (N)) }carriedby the first signal, wherein N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ A.b (N) · jn，
Figure FDA0003094903870000191
N is [0, N-1 ]]Wherein the element b (n) satisfies b (n) u (1-2s (n)), and both A and u are non-zero complex numbers consisting ofThe sequence of elements s (n) (s (n)) is one of the sequences in the first set of sequences;
processing said first signal according to N elements of said sequence { x (N); wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000192
c1(n + i)) mod2, n 0,1,22(n) satisfies
Figure FDA0003094903870000193
Figure FDA0003094903870000194
Wherein N is more than or equal to 48 and less than or equal to 96, [ h0, h1, h2, h3, h4 and h5]And [ p0, p1, p2, p3, p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]]。
35. The method of claim 34,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
36. The method of claim 34, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial state of the first shift register sequence is the same and the initial state of the second shift register sequence is different.
37. The method of claim 34, wherein the first signal is a DMRS or an SRS or control information.
38. The method of claim 34, wherein receiving a first signal carried on N subcarriers, and obtaining N elements in a sequence { x (N) } carried by the first signal comprises:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
39. A communications apparatus, comprising:
a processing unit for generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) } satisfying x (N) ═ A · b (N) · j ·n，
Figure FDA0003094903870000201
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a transceiving unit for transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2,., 1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000202
Element c2(n) satisfies
Figure FDA0003094903870000203
Figure FDA0003094903870000204
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
and/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure FDA0003094903870000211
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000221
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000222
Figure FDA0003094903870000223
Sequence c3(n) is a second shift register sequence,
Figure FDA0003094903870000224
wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
40. The communication device of claim 39,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
41. The apparatus according to claim 39, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are the same, and v is different.
42. The communications apparatus of claim 39, wherein the processing unit is further configured to:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
43. The communications apparatus of claim 39, wherein the processing unit is further configured to:
selecting a sequence { s (n) } from the first set of sequences based on the initial state of the first shift register sequence, the initial state of the second shift register sequence, and v, wherein v is determined based on a sequence group ID or a cell ID.
44. The communications apparatus of claim 39, wherein the first signal is a DMRS or SRS or control information.
45. A communications device according to claim 39, wherein the processing unit is configured to generate the first signal according to the sequence { x (n) }, by:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
46. The communications apparatus of claim 45, wherein the processing unit is further configured to:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
47. A communications apparatus, comprising:
a processing unit for generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) } satisfying x (N) ═ A · b (N) · j ·n，
Figure FDA0003094903870000231
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a transceiving unit for transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N — 1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ N)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000232
Figure FDA0003094903870000233
Element c2(n) satisfies
Figure FDA0003094903870000234
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000235
Element c2(n) satisfies
Figure FDA0003094903870000236
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000251
Figure FDA0003094903870000252
Element c2(n) satisfies
Figure FDA0003094903870000253
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000254
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000255
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000256
Figure FDA0003094903870000257
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000258
Figure FDA0003094903870000259
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N satisfies 192 < N < 432;
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA00030949038700002510
Figure FDA00030949038700002511
Element c2(n) satisfies
Figure FDA00030949038700002512
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000261
Element c2(n) satisfies
Figure FDA0003094903870000262
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ]; and the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000271
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000272
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000273
Figure FDA0003094903870000274
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000275
Figure FDA0003094903870000276
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
48. The communication device of claim 47,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
49. The apparatus according to claim 47, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are the same, and v is different.
50. The communications apparatus of claim 47, wherein the processing unit is further configured to:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
51. The communications apparatus of claim 47, wherein the processing unit is further configured to:
selecting a sequence { s (n) } from the first set of sequences based on the initial state of the first shift register sequence, the initial state of the second shift register sequence, and v, wherein v is determined based on a sequence group ID or a cell ID.
52. The communications apparatus of claim 47, wherein the first signal is a DMRS or SRS or control information.
53. A communications device according to claim 47, wherein the processing unit is configured to generate the first signal according to the sequence { x (n) }, by:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
54. The communications apparatus of claim 53, wherein the processing unit is further configured to:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
55. A communications apparatus, comprising:
a processing unit for generating a first signal according to a sequence { x (N) }, the sequence { x (N) } comprising N elements, N being an integer greater than 1, the sequence { x (N) } satisfying x (N) ═ A · b (N) · j ·n，
Figure FDA0003094903870000281
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
a transceiving unit for transmitting the first signal; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000291
Figure FDA0003094903870000292
Element c2(n) satisfies
Figure FDA0003094903870000293
Wherein N is more than or equal to 48 and less than or equal to 96, [ h0, h1, h2, h3, h4 and h5]And [ p0, p1, p2, p3, p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]]。
56. The communication device of claim 55,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
57. The communications apparatus as claimed in claim 55, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same and the initial states of the second shift register sequences are different.
58. The communications apparatus of claim 55, wherein the processing unit is further configured to:
selecting a sequence { s (n) } from the first set of sequences based on an initial state of the first shift register sequence and an initial state of the second shift register sequence, wherein the second shift register sequence initial state is determined based on a sequence group ID or a cell ID.
59. The communications apparatus of claim 55, wherein the first signal is a DMRS or SRS or control information.
60. A communications device according to claim 55, wherein the processing unit is configured to generate the first signal according to the sequence { x (n) }, by:
performing discrete Fourier transform processing on N elements in the sequence { x (N) } to obtain a sequence { f (N) };
mapping N elements in the sequence { f (N) } to continuous N subcarriers respectively to obtain the first signal; or, mapping N elements in the sequence { f (N) } to N subcarriers at equal intervals, respectively, to obtain the first signal.
61. The communications apparatus of claim 60, wherein the processing unit is further configured to:
filtering the sequence { x (N) } before discrete fourier transform processing of N elements in the sequence { x (N) }; alternatively, the first and second electrodes may be,
after discrete fourier transform processing of N elements in the sequence { x (N) }, filtering the sequence { x (N) } after discrete fourier transform processing.
62. A communications apparatus, comprising:
a transceiving unit, configured to receive a first signal carried on N subcarriers;
a processing unit, configured to obtain N elements in a sequence { x (N)) } carried by the first signal, where N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ a · b (N) · jn，
Figure FDA0003094903870000301
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
the processing unit is further configured to process the first signal according to N elements in the sequence { x (N) }; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2,., 1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000302
Element c2(n) satisfies
Figure FDA0003094903870000303
Figure FDA0003094903870000304
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
and/or the presence of a gas in the gas,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1
Figure FDA0003094903870000311
Therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000321
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000322
Figure FDA0003094903870000323
Sequence c3(n) is a second shift register sequence,
Figure FDA0003094903870000324
wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
63. The communication device of claim 62,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
64. The communications apparatus as claimed in claim 62, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are the same, and v is different.
65. The communications apparatus of claim 62, wherein the first signal is a DMRS or SRS or control information.
66. The communication device of claim 62,
the transceiving unit is configured to receive a first signal carried on N subcarriers by:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
the processing unit is configured to obtain N elements in the sequence { x (N) } carried by the first signal by:
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
67. A communications apparatus, comprising:
a transceiving unit, configured to receive a first signal carried on N subcarriers;
a processing unit, configured to obtain N elements in a sequence { x (N)) } carried by the first signal, where N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ a · b (N) · jn，
Figure FDA0003094903870000325
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
the processing unit is further configured to process the first signal according to N elements in the sequence { x (N) }; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000331
Figure FDA0003094903870000332
Element c2(n) satisfies
Figure FDA0003094903870000333
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000334
Element c2(n) satisfies
Figure FDA0003094903870000335
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ];
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000351
Figure FDA0003094903870000352
Element c2(n) satisfies
Figure FDA0003094903870000353
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000354
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA00030949038700003514
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n 0,1,2,. 246, v isInteger, c2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000355
Figure FDA0003094903870000356
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000357
Figure FDA0003094903870000358
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N satisfies 192 < N < 432;
alternatively, the first and second electrodes may be,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N — 1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ N)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Elements of (n) } orderColumn { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000359
Figure FDA00030949038700003510
Element c2(n) satisfies
Figure FDA00030949038700003511
Wherein N is 48-96, h0，h1，h2，h3，h4，h5]And [ p ]0，p1，p2，p3，p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]](ii) a And the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 1023), N ═ 0,1,2, …, N-1, t is an integer, c (N) ═ c (t) ((c + t) mod 1023)1(n)+c2((n + v) mod 31)) mod2, n is 0,1,2, …,1022, v is an integer, c is an integer1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA00030949038700003512
Element c2(n) satisfies
Figure FDA00030949038700003513
Wherein N satisfies 768 ≦ N ≦ 1620, [ q ≦ q [0，q1，q2，q3，q4，q5，q6，q7，q8，q9]And [ w0，w1，w2，w3，w4]Are respectively as
[1,0,0,0,0,0,0,1,0,0] and [1,1,1,1,0],
[1,0,0,0,0,0,1,1,0,1] and [1,0,1,1,1 ]),
[1,0,0,0,0,1,0,0,1,1] and [1,1,1,1,0],
[1,0,0,0,0,1,0,1,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,0,1,0] and [1,1,1,1,0],
[1,0,0,0,1,1,0,1,1,1] and [1,0,0,1,0],
[1,0,0,1,0,0,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,0,1,0,0,0,1,0,1] and [1,1,1,0,1],
[1,0,0,1,1,0,0,0,1,0] and [1,1,1,0,1],
[1,0,0,1,1,0,1,0,1,1] and [1,0,1,1,1 ]),
[1,0,0,1,1,1,0,0,1,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,0,0,1] and [1,1,0,1,1 ]),
[1,0,0,1,1,1,1,1,1,1] and [1,1,0,1,1 ]),
[1,0,1,0,0,0,0,1,1,0] and [1,0,1,0,0],
[1,0,1,0,0,0,1,1,0,0] and [1,1,0,1,1 ]),
[1,0,1,0,0,1,0,0,0,1] and [1,1,1,0,1 ]),
[1,0,1,0,0,1,1,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,0,0,1,1,1,1,0] and [1,0,0,1,0],
[1,0,1,0,1,0,0,0,0,1] and [1,1,0,1,1 ]),
[1,0,1,0,1,0,1,0,1,1] and [1,0,0,1,0],
[1,0,1,0,1,1,0,1,0,1] and [1,1,1,1,0 ]),
[1,0,1,1,0,0,0,0,1,0] and [1,0,0,1,0],
[1,0,1,1,0,0,0,1,1,1] and [1,0,0,1,0],
[1,0,1,1,0,0,1,0,1,1] and [1,1,1,0,1],
[1,0,1,1,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,0,1,1,1,0,0,0,1,1] and [1,0,1,1,1 ]),
[1,0,1,1,1,1,0,0,1,0] and [1,0,1,0,0],
[1,0,1,1,1,1,1,0,1,1] and [1,0,0,1,0 ]),
[1,0,1,1,1,1,1,1,0,1] and [1,1,1,0,1 ]),
[1,1,0,0,0,0,1,0,0,1] and [1,1,1,1,0 ]),
[1,1,0,0,0,0,1,0,1,0] and [1,1,1,0,1],
[1,1,0,0,0,1,0,0,1,0] and [1,1,0,1,1 ]),
[1,1,0,0,0,1,1,0,1,1] and [1,1,1,0,1 ]),
[1,1,0,0,1,0,0,0,0,1] and [1,0,1,1,1 ]),
[1,1,0,0,1,0,0,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,0,1,0,1,1, 1,0,1] and [1,0,0,1,0],
[1,1,0,0,1,1,1,1,0,0] and [1,1,1,0,1 ]),
[1,1,0,0,1,1,1,1,1,1] and [1,1,1,1,0 ]),
[1,1,0,1,0,0,0,1,0,0] and [1,1,0,1,1 ]),
[1,1,0,1,0,1,1,0,1,0] and [1,0,1,1,1 ]),
[1,1,0,1,1,0,0,0,0,0] and [1,1,1,1,0],
[1,1,0,1,1,0,1,0,0,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,0,1,1,1,1] and [1,0,1,0,0 ]),
[1,1,0,1,1,1,1,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,0,0,1,0,1,1] and [1,0,1,0,0],
[1,1,1,0,0,0,1,1,1,0] and [1,1,1,1,0],
[1,1,1,0,0,1,0,0,0,0] and [1,0,1,1,1 ]),
[1,1,1,0,0,1,1,1,0,0] and [1,1,1,0,1],
[1,1,1,0,1,0,0,0,1,1] and [1,0,0,1,0],
[1,1,1,0,1,0,0,1,1,0] and [1,1,0,1,1 ]),
[1,1,1,0,1,0,1,0,1,0] and [1,0,1,0,0],
[1,1,1,0,1,0,1,1,0,0] and [1,1,1,1,0 ]),
[1,1,1,0,1,1,0,0,0,1] and [1,1,0,1,1 ]),
[1,1,1,0,1,1,1,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,0,1,1,0] and [1,0,1,0,0],
[1,1,1,1,0,0,1,0,0,1] and [1,0,0,1,0],
[1,1,1,1,0,1,1,0,0,0] and [1,0,1,0,0],
[1,1,1,1,1,0,1,1,0,1] and [1,0,0,1,0 ]),
[1,1,1,1,1,1, 0,0,1] and [1,0,1,1,1], or
[1,1,1,1,1,1,1,1,0,0] and [1,1,1,0,1 ]; and the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod254), N ═ 0,1,2, …, N-1, t is an integer,
Figure FDA0003094903870000371
therein, the sequence { c1(n) is the third shift register sequence, c1(n) is equal to {0,1,2,3}, element c1(n) satisfies
Figure FDA0003094903870000372
Or element c1(n) satisfies c1(n)＝(c2(n)+2×c3(n + v) mod254) mod 4, n is 0,1,2,. 246, v is an integer, c is an integer2(n)∈{0，1，2，3}，c3(n)∈{0，1}，c2(n) is the sequence { c2Element in (n) }, c3(n) is the sequence { c3Element in (n) }, sequence { c2(n) is the first shift register sequence, element c2(n) satisfies
Figure FDA0003094903870000373
Figure FDA0003094903870000374
Sequence c3(n) is a second shift register sequence, element c3(n) satisfies
Figure FDA0003094903870000375
Figure FDA0003094903870000376
Wherein [ y0，y1，y2，y3，y4，y5，y6]Is [3,1,0,0,2,0,0]、[3，0，2，0，3，0，0]、[3，0，0，1，0，2，0]、[3，3，1，1，2，2，0]、[3，2，1，3，3，2，0]、[3，2，3，2，2，1，1]、[3，2，1，1，3，1，1]、[3，3，1，1，2，3，1]、[3，3，1，2，3，3，1]、[3，0，2，2，3，3，1]、[3，3，3，2，2，1，2]、[3，1，2，3，0，3，2]、[3，0，2，1，1，3，2]、[3，3，3，1，3，3，2]、[3，0，0，2，0，0，3]、[3，2，1，0，1，2，3]、[3，1，2，2，1，2，3]Or [3,1,2,3,2,2,3 ]]Wherein N is 192-432.
68. The communication device of claim 67,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 < N < 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 < N < 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
69. The communications apparatus as claimed in claim 67, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same, the initial states of the second shift register sequences are the same, and v is different.
70. The communications apparatus of claim 67, wherein the first signal is a DMRS or SRS or control information.
71. The communication device of claim 67,
the transceiving unit is configured to receive a first signal carried on N subcarriers by:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
the processing unit is configured to obtain N elements in the sequence { x (N) } carried by the first signal by:
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
72. A communications apparatus, comprising:
a transceiving unit, configured to receive a first signal carried on N subcarriers;
a processing unit, configured to obtain N elements in a sequence { x (N)) } carried by the first signal, where N is a positive integer greater than 1, and the sequence { x (N)) } satisfies x (N) ═ a · b (N) · jn，
Figure FDA0003094903870000381
N is [0, N-1 ]]Element b (n) satisfies b (n) u (1-2s (n)), a and u being non-zero plural numbers, the sequence consisting of element s (n) { s (n) } being one of the sequences in the first set of sequences;
the processing unit is further configured to process the first signal according to N elements in the sequence { x (N) }; wherein the content of the first and second substances,
the first set of sequences comprises the sequence { k (N) }, the element k (N) satisfies k (N) ═ c ((N + t) mod 63), N ═ 0,1,2, …, N-1, t is an integer, and the element c (N) satisfies c (N) ═ c (c ═ t)1(n)+c2(n))mod 2，n＝0，1，2，...，62，c1(n) is the sequence { c1Element in (n) }, c2(n) is the sequence { c2Element in (n) }, sequence { c1(n) is the first shift register sequence, sequence { c }2(n) is a second shift register sequence, element c1(n) satisfies
Figure FDA0003094903870000382
Figure FDA0003094903870000383
Element c2(n) satisfies
Figure FDA0003094903870000384
Figure FDA0003094903870000385
Wherein N is more than or equal to 48 and less than or equal to 96, [ h0, h1, h2, h3, h4 and h5]And [ p0, p1, p2, p3, p4]Are respectively [1,0,0,0,0, 1]]And [1,1,0,0,0]、[1，1，0，0，1，1]And [1,0,0,0, 1]]、[1，1，0，1，1，0]And [1,1,0,0,0]、[1，0，1，1，0，1]And [1,0,0,0, 1]]、[1，1，1，0，0，1]And [1,1,0,0,0]Or [1,1,0, 0]]And [1,0,0,0, 1]]。
73. The communication device of claim 72,
when N is more than or equal to 48 and less than or equal to 96, the value of N is 48, 54, 60, 72, 90 or 96; and/or the presence of a gas in the gas,
when N satisfies 768 is not less than N not more than 1620, the value of N is 768, 810, 864, 900, 960, 972, 1080, 1152, 1200, 1296, 1350, 1440, 1458, 1500 or 1536; and/or the presence of a gas in the gas,
when N satisfies 192 is not less than N not more than 432, the value of N is 192, 216, 240, 270, 288, 300, 324, 360, 384 or 432.
74. The communications apparatus as claimed in claim 72, wherein the first sequence set comprises at least two sequence groups, each of the at least two sequence groups comprising at least one sequence, and wherein two sequences belonging to different sequence groups of the at least two sequence groups satisfy that the initial states of the first shift register sequences are the same and the initial states of the second shift register sequences are different.
75. The communications apparatus of claim 72, wherein the first signal is a DMRS or SRS or control information.
76. The communication device of claim 72,
the transceiving unit is configured to receive a first signal carried on N subcarriers by:
acquiring the first signals on the N subcarriers on consecutive N subcarriers, or acquiring the first signals on the N subcarriers on equally spaced N subcarriers;
the processing unit is configured to obtain N elements in the sequence { x (N) } carried by the first signal by:
acquiring N elements in a sequence { f (N) }, wherein N is a positive integer greater than 1, and the first signal is generated by mapping the sequence { f (N) } onto the N subcarriers;
and (3) performing inverse discrete Fourier transform processing on the sequence { f (N) } to obtain N elements in the sequence { x (N) }.
77. A computer-readable storage medium storing a computer program for implementing a signal transmission method according to any one of claims 1 to 23 or a signal reception method according to any one of claims 24 to 38 when the computer program is executed.
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