CN110867827A - Time-delay tripping low-voltage frame switch - Google Patents
Time-delay tripping low-voltage frame switch Download PDFInfo
- Publication number
- CN110867827A CN110867827A CN201911093903.8A CN201911093903A CN110867827A CN 110867827 A CN110867827 A CN 110867827A CN 201911093903 A CN201911093903 A CN 201911093903A CN 110867827 A CN110867827 A CN 110867827A
- Authority
- CN
- China
- Prior art keywords
- resistor
- circuit
- capacitor
- chip
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/24—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to undervoltage or no-voltage
- H02H3/247—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to undervoltage or no-voltage having timing means
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
- H02H7/261—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations
- H02H7/262—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations involving transmissions of switching or blocking orders
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/26—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured
- H02H7/261—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations
- H02H7/263—Sectionalised protection of cable or line systems, e.g. for disconnecting a section on which a short-circuit, earth fault, or arc discharge has occured involving signal transmission between at least two stations involving transmissions of measured values
Landscapes
- Emergency Protection Circuit Devices (AREA)
Abstract
The invention discloses a delay tripping low-voltage frame switch, which comprises an undervoltage tripping circuit and a delay unit electrically connected with the undervoltage tripping circuit, wherein the delay unit comprises a voltage detection circuit, a timer circuit, a clock control circuit and a voltage stabilizing circuit, the input end of the voltage detection circuit is electrically connected with the output end of the undervoltage tripping circuit, the output end of the voltage detection circuit is electrically connected with the input end of the timer circuit, and the input end of the clock control circuit and the input end of the voltage stabilizing circuit are electrically connected with the output end of the timer circuit. The delay unit is additionally arranged on the original undervoltage trip circuit, so that the undervoltage trip circuit has the functions of voltage loss delay disconnection, can avoid power grid fluctuation, and has adjustable delay time and good safety performance.
Description
Technical Field
The invention relates to the technical field of power systems, in particular to a time-delay tripping low-voltage frame switch.
Background
The thunderstorm season is a high-occurrence period of a power grid fluctuation event caused by weather reasons, a low-voltage frame switch with voltage loss protection trips when the working voltage is lower than 80% of the rated voltage, the general power grid fluctuation range far exceeds the value, and the low-voltage frame switch trips under voltage, so that the whole production stops, and the normal operation of a company is seriously influenced. To solve this problem, the low-voltage frame switch needs to be modified.
Disclosure of Invention
The invention aims to solve the technical problem that the delay tripping low-voltage frame switch has a no-voltage delay disconnection function, can avoid power grid fluctuation and has adjustable delay time.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a delay tripping low-voltage frame switch comprises an undervoltage tripping circuit and a delay unit electrically connected with the undervoltage tripping circuit, wherein the delay unit comprises a voltage detection circuit, a timer circuit, a clock control circuit and a voltage stabilizing circuit, the input end of the voltage detection circuit is electrically connected with the output end of the undervoltage tripping circuit, the output end of the voltage detection circuit is electrically connected with the input end of the timer circuit, and the input end of the clock control circuit and the input end of the voltage stabilizing circuit are both electrically connected with the output end of the timer circuit.
Preferably, the voltage detection circuit includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C8 and an operational amplifier a1, one end of the resistor R3, one end of the resistor R4 and one end of the capacitor C8 are all connected to an inverting input terminal of the operational amplifier a1, the other end of the resistor R3 is connected to a forward input terminal of the operational amplifier a1, the other end of the resistor R4 and the other end of the capacitor C8 are all connected to one end of the resistor R5, one end of the resistor R5 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to an output terminal of the operational amplifier a 1.
Preferably, the timer circuit includes a first chip U1, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C2, a capacitor C3, a capacitor C4, a transistor Q1, a relay K2, and a diode D2, wherein a first pin of the first chip U2 and one end of the resistor R2 are connected to a second pin of the first chip U2, the other end of the resistor R2 and one end of the resistor R2 are connected to one end of the resistor R2, the other end of the resistor R2 and one end of the resistor C2 are connected to one end of the resistor R2, the other end of the resistor R2 is connected to a sixth pin of the first chip U2, the other end of the capacitor C2 is connected to a seventh pin of the first chip U2, one end of the relay K2 and a cathode of the diode D2 are connected to an eighth pin of the first chip U2, the other end of the diode D2 and an anode of the relay K2 are connected to a ninth pin of the first chip 2, the other end of the resistor R10 is grounded through a capacitor C3, the collector of the triode Q1 is connected with the third pin of the first chip U1, the emitter of the triode Q1 is grounded, and the fifth pin of the first chip U1 is grounded through a capacitor C4.
Preferably, the clock control circuit comprises a second chip U2, a diode D3, a capacitor C5, a capacitor C6 and a resistor R12, wherein one end of the capacitor C6, one end of the resistor R12 and a fifth pin of the first chip U1 are all connected with a first pin of the second chip, and a ninth pin of the first chip U1 and a cathode of the diode D3 are all connected with a third pin of the second chip U2.
Preferably, the voltage stabilizing circuit comprises a triode Q2, a resistor R13, a resistor R14, a resistor R15, an operational amplifier a2, a capacitor C7 and a diode D4, wherein a collector of the triode Q2 is connected with a first pin of a second chip U1, a base of the triode Q2 is grounded through the capacitor C7, an emitter of the triode Q2 is connected with one end of the resistor R14, the other end of the resistor R14 is connected with a forward input end of the operational amplifier a2, a second pin of the second chip U2 is connected with a reverse input end of the operational amplifier a2 through the resistor R13, an output end of the operational amplifier a2 is connected with one end of the resistor R15, the other end of the resistor R15 is connected with an anode of the diode D4, and a cathode of the diode D4 is connected with the other end of the capacitor C5.
Preferably, one end of the resistor R16 and one end of the capacitor C5 are both connected to the anode of the diode D3, the other end of the resistor R16 is connected to the other end of the capacitor C5, and the other ends of the resistor R12 and the capacitor C6 are both grounded.
By adopting the technical scheme, the invention provides a delay tripping low-voltage frame switch, a delay unit in the delay tripping low-voltage frame switch comprises a voltage detection circuit, a timer circuit, a clock control circuit and a voltage stabilizing circuit, wherein the input end of the voltage detection circuit is electrically connected with the output end of an undervoltage tripping circuit, the output end of the voltage detection circuit is electrically connected with the input end of the timer circuit, the input end of the clock control circuit and the input end of the voltage stabilizing circuit are electrically connected with the output end of the timer circuit, the delay unit is additionally arranged on the original undervoltage tripping circuit, when the voltage is undervoltage, a main circuit in the undervoltage tripping circuit is disconnected after delaying for a period of time through the delay unit, and the voltage is recovered to be normal within the delay time, the main circuit of the undervoltage tripping circuit does not trip, so that the undervoltage tripping circuit has the voltage delay disconnection function, the delay time can avoid the power grid fluctuation, is adjustable, simple and practical, can completely avoid the influence of the power grid fluctuation on the under-voltage protection, solves the practical problem of the power grid fluctuation, and has good safety performance.
Drawings
FIG. 1 is a block diagram of the present invention;
FIG. 2 is a schematic diagram of the circuit of the present invention;
in the figure, 1-undervoltage trip circuit, 2-time delay unit, 21-voltage detection circuit, 22-timer circuit, 23-clock control circuit and 24-voltage stabilizing circuit.
Detailed Description
The following further describes embodiments of the present invention with reference to the drawings. It should be noted that the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
As shown in fig. 1, in the structural block diagram of a delay tripping low-voltage frame switch of the present invention, the delay tripping low-voltage frame switch includes an undervoltage tripping circuit 1 and a delay unit 2 electrically connected to the undervoltage tripping circuit 1, the delay unit 2 includes a voltage detection circuit 21, a timer circuit 22, a clock control circuit 23 and a voltage stabilizing circuit 24, an input end of the voltage detection circuit 21 is electrically connected to an output end of the undervoltage tripping circuit 1, an output end of the voltage detection circuit 21 is electrically connected to an input end of the timer circuit 22, and input ends of the clock control circuit 23 and the voltage stabilizing circuit 24 are both electrically connected to an output end of the timer circuit 22. It can be understood that the voltage detection circuit 21 is configured to detect the voltage condition in the undervoltage trip circuit 1 in real time, and when it detects a voltage undervoltage, send the voltage information to the timer circuit 22, the timer circuit 22 sets the delay time information to the clock control circuit 23 and the voltage regulator circuit 24, and the voltage regulator circuit 24 maintains the voltage stability of the undervoltage trip circuit 1, so as to send the control signal to the undervoltage trip circuit 1 to control the delay trip, thereby implementing the voltage-loss delay disconnection function of the undervoltage trip circuit 1.
Specifically, fig. 2 is a schematic circuit diagram of a delay tripping low-voltage frame switch according to the present invention, and with reference to fig. 1 and fig. 2, the voltage detection circuit 21 includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C8, and an operational amplifier a1, the timer circuit 22 includes a first chip U1, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C2, a capacitor C3, a capacitor C4, a triode Q1, a relay K2, and a diode D2, the clock control circuit 23 includes a second chip U2, a diode D3, a capacitor C5, a capacitor C6, and a resistor R12, the voltage regulator circuit 24 includes a triode Q2, a resistor R13, a resistor R14, a resistor R15, an operational amplifier a2, a capacitor C7, and a diode D4; one end of the resistor R3, one end of the resistor R4 and one end of the capacitor C8 are all connected to the inverting input terminal of the operational amplifier a1, the other end of the resistor R3 is connected to the forward input terminal of the operational amplifier a1, the other end of the resistor R4 and the other end of the capacitor C8 are both connected to one end of the resistor R5, one end of the resistor R5 is connected to one end of the resistor R6, and the other end of the resistor R6 is connected to the output terminal of the operational amplifier a 1; the first pin of the first chip U1 and one end of the resistor R7 are connected to the second pin of the first chip U1, the other end of the resistor R7 and one end of the resistor R8 are both connected with one end of the resistor R10, the other end of the resistor R8 and one end of the resistor C2 are both connected with one end of the resistor R9, the other end of the resistor R9 is connected to the sixth pin of the first chip U1, the other end of the capacitor C2 is connected to the seventh pin of the first chip U1, one end of the relay K1 and the cathode of the diode D2 are both connected to the eighth pin of the first chip U1, the anode of the diode D2 and the other end of the relay K2 are both connected to the ninth pin of the first chip U1, the other end of the resistor R10 is grounded via a capacitor C3, the collector of the transistor Q1 is connected to the third pin of the first chip U1, the emitter of the transistor Q1 is grounded, and the fifth pin of the first chip U1 is grounded through a capacitor C4; one end of the capacitor C6, one end of the resistor R12 and the fifth pin of the first chip U1 are all connected to the first pin of the second chip, and the ninth pin of the first chip U1 and the cathode of the diode D3 are all connected to the third pin of the second chip U2; the collector of the triode Q2 is connected with the first pin of the second chip U1, the base of the triode Q2 is grounded through a capacitor C7, the emitter of the triode Q2 is connected with one end of a resistor R14, the other end of the resistor R14 is connected with the forward input end of an operational amplifier a2, the second pin of the second chip U2 is connected with the reverse input end of the operational amplifier a2 through a resistor R13, the output end of the operational amplifier a2 is connected with one end of the resistor R15, the other end of the resistor R15 is connected with the anode of a diode D4, and the cathode of the diode D4 is connected with the other end of the capacitor C5; one end of the resistor R16 and one end of the capacitor C5 are both connected to the anode of the diode D3, the other end of the resistor R16 is connected to the other end of the capacitor C5, and the other ends of the resistor R12 and the capacitor C6 are both grounded. It is understood that the first chip U1 may be an NE555 chip or an LQFP48 chip or the like, the second chip U2 may be a DS1302 clock chip or a 78L12 chip or the like, and the data processing chip U3 may be an 80C51 chip or the like.
It can be understood that the undervoltage trip circuit 1 includes a resistor R1, a resistor R2, a capacitor C1, a diode D1, a relay K1, a trip switch T1 and a breaker P1, one end of the resistor R1 and one end of the resistor R2 are both connected to one end of a relay K1, the other end of the resistor R1 is connected to one end of the trip switch T1, the other end of the resistor R2 is connected to one end of the capacitor C1, the other end of the capacitor C1 is connected to an anode of the diode D1, and a cathode of the diode D1, the other end of the relay K1 and one end of the resistor R3 are all connected to one end of the breaker P1.
The invention has the advantages of reasonable design and unique structure, and the frame switch is transformed to have the function of voltage-loss delay disconnection, so that the delay time can avoid the fluctuation of a power grid and can be adjusted. Namely, a delay unit is additionally arranged on the original undervoltage tripping circuit, when the voltage is undervoltage, the main circuit is disconnected after a period of time delay, and the voltage returns to normal within the delay time, so that the main circuit does not trip, and the influence of power grid fluctuation on undervoltage protection can be completely avoided; the delay tripping low-voltage frame switch has the following advantages: 1. the change is small, and excessive equipment is not needed; 2. simple and practical, can solve the undulant actual problem of electric wire netting.
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the described embodiments. It will be apparent to those skilled in the art that various changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, and the scope of protection is still within the scope of the invention.
Claims (6)
1. The utility model provides a time delay tripping operation low pressure frame switch, includes undervoltage tripping operation return circuit and with the delay unit that undervoltage tripping operation return circuit electricity is connected which characterized in that: the delay unit comprises a voltage detection circuit, a timer circuit, a clock control circuit and a voltage stabilizing circuit, wherein the input end of the voltage detection circuit is electrically connected with the output end of the undervoltage tripping circuit, the output end of the voltage detection circuit is electrically connected with the input end of the timer circuit, and the input end of the clock control circuit and the input end of the voltage stabilizing circuit are both electrically connected with the output end of the timer circuit.
2. The time-lapse tripping low-voltage frame switch of claim 1, wherein: the voltage detection circuit comprises a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C8 and an operational amplifier A1, wherein one end of the resistor R3, one end of the resistor R4 and one end of the capacitor C8 are connected with the inverting input end of an operational amplifier A1, the other end of the resistor R3 is connected with the forward input end of an operational amplifier A1, the other end of the resistor R4 and the other end of the capacitor C8 are connected with one end of the resistor R5, one end of the resistor R5 is connected with one end of a resistor R6, and the other end of the resistor R6 is connected with the output end of the operational amplifier A1.
3. The time-lapse tripping low-voltage frame switch of claim 1, wherein: the timer circuit comprises a first chip U1, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C2, a capacitor C3, a capacitor C4, a triode Q1, a relay K2 and a diode D2, wherein a first pin of the first chip U2 and one end of the resistor R2 are connected with a second pin of the first chip U2, the other end of the resistor R2 and one end of the resistor R2 are connected with one end of the resistor R2, the other end of the resistor R2 and one end of the resistor C2 are connected with one end of the resistor R2, the other end of the resistor R2 is connected with a sixth pin of the first chip U2, the other end of the capacitor C2 is connected with a seventh pin of the first chip U2, one end of the relay K2 and a cathode of the diode D2 are connected with an eighth pin of the diode U2, and the other end of the diode D2 and the ninth pin of the relay U2 are connected with a ninth pin of the first chip U2, the other end of the resistor R10 is grounded through a capacitor C3, the collector of the triode Q1 is connected with the third pin of the first chip U1, the emitter of the triode Q1 is grounded, and the fifth pin of the first chip U1 is grounded through a capacitor C4.
4. The time-lapse tripping low-voltage frame switch of claim 3, wherein: the clock control circuit comprises a second chip U2, a diode D3, a capacitor C5, a capacitor C6 and a resistor R12, wherein one end of the capacitor C6, one end of the resistor R12 and a fifth pin of the first chip U1 are connected with a first pin of the second chip, and a ninth pin of the first chip U1 and a cathode of the diode D3 are connected with a third pin of the second chip U2.
5. The time-lapse tripping low-voltage frame switch of claim 4, wherein: the voltage stabilizing circuit comprises a triode Q2, a resistor R13, a resistor R14, a resistor R15, an operational amplifier A2, a capacitor C7 and a diode D4, wherein a collector of the triode Q2 is connected with a first pin of a second chip U1, a base of the triode Q2 is grounded through the capacitor C7, an emitter of the triode Q2 is connected with one end of the resistor R14, the other end of the resistor R14 is connected with a forward input end of the operational amplifier A2, a second pin of the second chip U2 is connected with a reverse input end of the operational amplifier A2 through a resistor R13, an output end of the operational amplifier A2 is connected with one end of a resistor R15, the other end of the resistor R15 is connected with an anode of a diode D4, and a cathode of the diode D4 is connected with the other end of the capacitor C5.
6. The time-lapse tripping low-voltage frame switch of claim 4, wherein: one end of the resistor R16 and one end of the capacitor C5 are both connected with the anode of the diode D3, the other end of the resistor R16 is connected with the other end of the capacitor C5, and the other end of the resistor R12 and the other end of the capacitor C6 are both grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911093903.8A CN110867827A (en) | 2019-11-11 | 2019-11-11 | Time-delay tripping low-voltage frame switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911093903.8A CN110867827A (en) | 2019-11-11 | 2019-11-11 | Time-delay tripping low-voltage frame switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110867827A true CN110867827A (en) | 2020-03-06 |
Family
ID=69654336
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911093903.8A Pending CN110867827A (en) | 2019-11-11 | 2019-11-11 | Time-delay tripping low-voltage frame switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110867827A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204536942U (en) * | 2015-03-17 | 2015-08-05 | 黄海 | A kind of simple and practical water heater control circuit |
| CN105158704A (en) * | 2015-08-28 | 2015-12-16 | 贵州天义电器有限责任公司 | DC power supply quality detection module |
| CN105307366A (en) * | 2015-12-11 | 2016-02-03 | 成都翰兴科技有限公司 | Overcurrent protection type intelligent delayed lighting control system for underground parking garage |
-
2019
- 2019-11-11 CN CN201911093903.8A patent/CN110867827A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN204536942U (en) * | 2015-03-17 | 2015-08-05 | 黄海 | A kind of simple and practical water heater control circuit |
| CN105158704A (en) * | 2015-08-28 | 2015-12-16 | 贵州天义电器有限责任公司 | DC power supply quality detection module |
| CN105307366A (en) * | 2015-12-11 | 2016-02-03 | 成都翰兴科技有限公司 | Overcurrent protection type intelligent delayed lighting control system for underground parking garage |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN203787935U (en) | Over-current protection circuit based on high side current detection | |
| CN202206111U (en) | Over-current protection device for boost discharge adjusting unit | |
| CN101582581B (en) | Electricity leakage-prevention and overcurrent protection device | |
| CN2932790Y (en) | An AC over-voltage protector | |
| CN202678082U (en) | Electronic transformer collector with overcurrent and overvoltage prevention function | |
| CN110867827A (en) | Time-delay tripping low-voltage frame switch | |
| CN202840510U (en) | Anti-lighting household protector | |
| CN2710223Y (en) | Microcomputer protection device of terminal user switch cubicle with power supple | |
| CN110954738A (en) | Embedded feeder terminal residual voltage detection circuit | |
| CN113394013B (en) | Intelligent voltage transformer | |
| CN201270385Y (en) | Intelligent synthetic electric distribution box | |
| CN202856312U (en) | Integrated intelligent protection device | |
| CN208315406U (en) | The auxiliary contact and surge protector of surge protector | |
| CN203596599U (en) | Digital direct-current circuit breaker | |
| CN2385456Y (en) | Overvoltage lightning protector for domestic electrical equipment and power supply line | |
| CN216774381U (en) | Intelligent power distribution unit | |
| CN221227126U (en) | Phase-to-earth fault monitoring and protecting equipment | |
| CN217882828U (en) | Main transformer protection device and system of traction substation transformer substation | |
| CN202679332U (en) | Digital air switch | |
| CN110034536A (en) | A kind of middle school teaching experiment power supply protection system | |
| CN203071557U (en) | Distribution transformer overvoltage/undervoltage protector | |
| CN216389211U (en) | High-efficient intelligent circuit breaker of removing obstacles | |
| CN202840261U (en) | Informationalized household protector | |
| CN215267621U (en) | Open circuit and open phase protector with data storage function | |
| CN216356460U (en) | Improved auxiliary power supply circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200306 |
|
| RJ01 | Rejection of invention patent application after publication |