CN110867490A - Protective layer for semiconductor thin film transistor and methods of implementation and application thereof - Google Patents

Protective layer for semiconductor thin film transistor and methods of implementation and application thereof Download PDF

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CN110867490A
CN110867490A CN201810989320.2A CN201810989320A CN110867490A CN 110867490 A CN110867490 A CN 110867490A CN 201810989320 A CN201810989320 A CN 201810989320A CN 110867490 A CN110867490 A CN 110867490A
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layer
thin film
amzo
film
protective layer
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CN110867490B (en
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解海艇
董承远
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Shanghai Jiaotong University
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous

Abstract

A protective layer for semiconductor Thin Film Transistor (TFT) and its realization and application method, i.e. Al-Mn-Zn oxide (AMZO) film made of alumina Al2O3Manganese oxide MnO and zinc oxide ZnO, wherein the doping amount ranges from 3% to 90% by weight respectively. The single-layer AMZO film or the double-layer SiO film is obtained by depositing the magnetron sputtering on the thin film transistor2the/AMZO thin film is used as a device protective layer. The single-layer AMZO protective layer can shield ultraviolet light with short wavelength and transmit visible light with longer wavelength, so that the illumination stability of the nitrogen-doped amorphous oxide semiconductor thin film transistor is greatly improved. And a double layer of SiO2the/AMZO protective layer solves the problem of the deterioration of the operating characteristics of the device caused by a single-layer AMZO protective layer, and can obtain the nitrogen-doped amorphous oxide semiconductor thin film crystal with high stabilityBody tube.

Description

Protective layer for semiconductor thin film transistor and methods of implementation and application thereof
Technical Field
The invention relates to a technology in the field of semiconductors, in particular to a protective layer for a nitrogen-doped amorphous oxide semiconductor thin film transistor and an implementation and application method thereof.
Background
Amorphous oxide semiconductor thin film transistor (oxidized by amorphous indium gallium zinc)Thin film transistors (a-IGZO TFTs) are typical, and have high mobility (μFE>10cm2V.s), high on-off current ratio (I)ON/IOFF>108) High visible light transmittance (>80%) and low temperature process (normal temperature magnetron sputtering), but the electrical characteristics of the material are easily affected by light (especially short wavelength UV light) and ambient atmosphere (such as oxygen and water vapor), and the material shows unstable electrical characteristics.
In order to reduce the influence of environmental factors on the amorphous oxide semiconductor thin film transistor, SiO is generally adopted2、Al2O3And the protective layer film is used for improving the environmental stability of the device. However, these protective layer materials still cannot completely solve the unstable characteristics of the amorphous oxide semiconductor thin film transistor under the illumination condition. Under the action of light, for example, more defects and trapped states are generated in the channel of the amorphous oxide semiconductor thin film transistor, so that the threshold voltage thereof is severely and negatively shifted. Researchers have attempted to suppress the photo instability of amorphous oxide semiconductor thin film transistors by various methods. However, these methods have limited effect on improving the illumination stability of the device.
Disclosure of Invention
The invention provides a protective layer for a semiconductor thin film transistor and an implementation and application method thereof, aiming at the problem of illumination instability of the existing amorphous oxide semiconductor thin film transistor.
The invention is realized by the following technical scheme:
the invention relates to a protective layer for nitrogen-doped amorphous oxide semiconductor thin film transistor, namely an aluminum manganese zinc oxide thin film (AMZO), made of aluminum oxide Al2O3Manganese oxide MnO and zinc oxide ZnO.
The doping amount ranges of the three components in the protective layer are respectively 3-90 wt%, and Al is preferred2O3:MnO:ZnO＝6:5:89wt％。
The thickness of the protective layer is 25-1000 nm, and preferably 100 nm.
The invention relates to a method for producing the protective layer, by mixing Al2O3And MnO and ZnO are mixed and ground, pressed into a target and then sintered to obtain an AMZO target material, and a protective layer deposited on the nitrogen-doped amorphous oxide semiconductor thin film transistor is obtained by performing magnetron sputtering in a vacuum cavity.
The vacuum degree range of the vacuum cavity is 1 multiplied by 10-3～5×10-2Torr, preferably 2X 10-3Torr。
The magnetron sputtering is realized in an inert atmosphere, wherein the flow range of the inert atmosphere is 20-50 sccm of argon, and specifically can be 30sccm of argon.
The magnetron sputtering power range is 50-200W, and specifically can be 100W.
The invention relates to a preparation process of a nitrogen-doped amorphous oxide semiconductor thin film transistor based on the AMZO thin film as a protective layer, wherein the AMZO thin film is obtained through magnetron sputtering, and the optimization of the characteristics (especially the illumination stability of a device) of the thin film transistor is realized.
The process specifically comprises the following steps:
step 1) preparing a layer of gate electrode film on a glass substrate, and forming a gate electrode pattern by using a patterning process;
the patterning process includes, but is not limited to, exposure, development, etching, and stripping.
Step 2) preparing a layer of gate insulating layer film (SiO) by utilizing magnetron sputtering or PECVD process2、Si3N4Etc.) overlying the gate electrode pattern.
Step 3) preparing a layer of nitrogen-doped amorphous oxide semiconductor film on the gate insulating layer film by utilizing magnetron sputtering, and forming a channel pattern by a patterning process;
the nitrogen-doped amorphous oxide semiconductor film is a film such as but not limited to nitrogen-doped amorphous indium gallium zinc oxide (a-IGZO: N), nitrogen-doped amorphous indium zinc oxide (a-IZO: N), nitrogen-doped amorphous indium zinc tin oxide (a-IZTO: N), nitrogen-doped amorphous indium tungsten (a-IWO: N) and the like, and is preferably an a-IGZO: N film.
Step 4) preparing a layer of source-drain electrode film on the channel layer pattern by magnetron sputtering, and forming a source-drain electrode pattern by a patterning process;
step 5) preparing a layer of AMZO film on the source-drain electrode pattern by magnetron sputtering
Step 5), preferably, a layer of SiO is prepared in advance on the source/drain electrode pattern2After the film is formed, then SiO2The AMZO film is prepared on the film, namely a double-protection-layer film is adopted to further improve the electrical characteristics of the thin film transistor.
And 6) forming a contact hole on the AMZO film by using a patterning process, and forming a pixel electrode pattern by using the patterning process after further preparing the transparent pixel electrode film.
Technical effects
Compared with the conventional method which adopts SiO2Compared with a nitrogen-doped device with the film as the protective layer, the AMZO film has better shielding effect on short-wavelength UV light and has higher transmittance on visible light. In ambient light, visible light has little influence on the device performance of the nitrogen-doped amorphous oxide semiconductor thin film transistor, and short-wavelength UV light with higher energy can cause the change of defect states in the device, thereby having bad influence on the electrical performance of the device. Therefore, a single-layer AMZO thin film or a double-layer SiO is used2The nitrogen-doped amorphous oxide semiconductor thin film transistor with the/AMZO thin film as the protective layer can well inhibit the change of defect states in a device channel, and further the device has stable and reliable illumination stability.
And secondly, the AMZO film has better compactness and can play a role in well isolating water and oxygen in the environment, so that the environmental stability of the nitrogen-doped device is further improved.
Drawings
FIG. 1 shows an AMZO thin film prepared in the present invention and a conventional SiO film2The light transmittance of the film;
FIG. 2 is a schematic structural diagram of a nitrogen-doped amorphous oxide semiconductor thin film transistor using a single AMZO thin film as a protective layer according to the present invention;
FIG. 3 shows the use of a double layer of AMZO/SiO in the present invention2The film is taken as the structural schematic diagram of the nitrogen-doped amorphous oxide semiconductor thin film transistor of the protective layer;
FIG. 4 shows a single SiO layer (a) according to the invention2(b) single-layer AMZO and (c) double-layer AMZO/SiO2The light irradiation stability of the nitrogen-doped amorphous oxide semiconductor thin film transistor with the thin film as a protective layer;
FIG. 5 is a schematic process flow diagram of a nitrogen-doped amorphous oxide semiconductor thin film transistor with an AMZO protective layer prepared in the present invention;
in the figure: the pixel electrode layer includes a glass substrate 210, a gate electrode layer 220, a gate insulating layer 230, a nitrogen-doped amorphous oxide semiconductor layer 240, a drain electrode layer 251, a source electrode layer 252, an AMZO protective layer 260, a first protective layer 261, a second protective layer 262, a contact hole 270, and a pixel electrode layer 280.
Detailed Description
Example 1
As shown in FIG. 1, the AMZO thin film of the present embodiment is capable of better shielding UV light with short wavelength and the conventional SiO thin film2Comparative illustration of light transmittance of thin film, wherein AMZO thin film is Al2O3Mixing and grinding the MnO and the ZnO, pressing into a target, sintering to obtain the AMZO target material, and sputtering by using a magnetron sputtering device to obtain the product.
The three components (Al)2O3MnO and ZnO), the doping amount of each component ranges from 3% to 90% by weight, and in this example, the target ratio used is Al2O3:MnO:ZnO＝6:5:89wt％。
As shown in fig. 2, the non-crystalline oxide semiconductor thin film transistor with doped nitrogen using a single-layer AMZO thin film as a protection layer according to the present embodiment includes: a gate electrode layer 220, a gate insulating layer 230, an amorphous nitrogen-doped oxide semiconductor layer 240, a drain electrode layer 251, a source electrode layer 252, an AMZO protective layer 260, a contact hole 270, and a pixel electrode layer 280, which are sequentially formed over a glass substrate 210.
The gate electrode layer 220 is located on the glass substrate 210 and is usually made of a metal material such as molybdenum, aluminum, chromium, or copper. In the large-sized flat panel display backplane technology, the gate electrode layer 220 is usually made of a molybdenum niobium/aluminum neodymium alloy, which can not only obtain good conductive characteristics but also prevent defects such as "hillocks" on the surface of the thin film. Typically, the thickness of the gate electrode layer 220 is about 300 nm.
The gate insulating layer 230 is disposed on the gate electrode 220 and the substrate 210, and covers the gate electrode layer 220, and is typically made of SiO2Or Si3N4Formed to a thickness of about 300 nm.
The nitrogen-doped amorphous oxide semiconductor layer 240 is located on the gate insulating layer 230, and is made of a nitrogen-doped amorphous oxide semiconductor material represented by a-IGZO (a-IGZO: N). The thickness of the nitrogen-doped amorphous oxide semiconductor layer 240 is within a range of 100 to 300 nm.
The drain electrode layer 251 and the source electrode layer 252 are located on the gate insulating layer 230 and the nitrogen-doped amorphous oxide semiconductor layer 240, and generally comprise metal materials such as molybdenum, aluminum, chromium, copper, and the like, and in the large-size flat panel display backplane technology, the drain electrode layer 251 and the source electrode layer 252 generally comprise molybdenum niobium/aluminum neodymium alloy, so that the good conductive property can be obtained, and the defects such as 'hillocks' on the surface of the thin film can be inhibited. The thickness of the drain electrode layer 251 and the source electrode layer 252 is generally about 300 nm.
The AMZO protective layer 260 is located on the nitrogen-doped amorphous oxide semiconductor layer 240, the drain electrode layer 251, the source electrode layer 252, and the gate insulating layer 230, and covers most of the area. The AMZO protective layer 260 is approximately 100nm thick.
Example 2
As shown in FIG. 3, the present embodiment relates to a method using a double-layer AMZO/SiO2Compared with embodiment 1, the nitrogen-doped amorphous oxide semiconductor thin film transistor with the thin film as the protective layer in this embodiment includes: a first protective layer 261 and a second protective layer 262, wherein: the first protective layer 261 is positioned over the active layer 240, the drain electrode layer 251, and the source electrode layer 252 and under the second protective layer 262.
The first protective layer261 is SiO2The film is prepared by magnetron sputtering or PECVD equipment, and the thickness of the film is 50 nm;
the second protective layer 262 is an AMZO thin film and is prepared by magnetron sputtering, and the thickness of the second protective layer is 50 nm.
Fig. 5 is a schematic flow chart of a process for manufacturing the nitrogen-doped amorphous oxide semiconductor thin film transistor based on the AMZO protective layer. The preparation process comprises the following steps:
n10: preparing a layer of gate electrode film on a glass substrate, and forming a gate electrode layer pattern by photoetching and etching;
n20: preparing a gate insulating layer film;
n30: preparing a layer of nitrogen-doped amorphous oxide semiconductor film, and forming a channel layer pattern by photoetching and etching;
n40: preparing a source and drain electrode film, and forming a source and drain electrode layer pattern by photoetching and etching;
n50: preparing a layer of AMZO film or a double-layer of SiO2the/AMZO film is used for forming a contact hole pattern through photoetching and etching;
n60: preparing a layer of pixel electrode film, and forming a pixel electrode layer pattern by photoetching and etching.
In the step N10, the film forming process may adopt a magnetron sputtering technique, and generally, a metal target material such as molybdenum, aluminum, chromium, copper, etc. may be selected. The patterning process may employ wet or dry etching techniques. And selecting corresponding etching liquid or etching reaction gas according to different materials.
In the step N20, the film forming process may adopt a magnetron sputtering or PECVD deposition technique. According to different preparation processes, corresponding target materials or reaction gases are selected.
In step N30, the film forming process generally employs a radio frequency magnetron sputtering technique, and the target material employed is an amorphous oxide semiconductor material typified by amorphous indium gallium zinc oxide (a-IGZO). The sputtering pressure is 1Pa, the atomic percentage range of the nitrogen doping amount in the oxide film is within 2-5% by adjusting the proportion of nitrogen and argon, and the carrier concentration range in the oxide film is 1013-1015/cm3Thereby allowing the oxide thin film to exhibit the characteristics of a semiconductor. The patterning process of the thin film generally employs a wet etching technique.
In the step N40, the film forming process may adopt a magnetron sputtering technique, and generally, a metal target material such as molybdenum, aluminum, chromium, copper, etc. may be selected. The patterning process may employ wet or dry etching techniques. And selecting corresponding etching liquid or etching reaction gas according to different materials.
In the step N50, the film forming process mainly adopts a magnetron sputtering technology. The patterning of the contact hole typically employs a dry etching technique.
In the step N60, the film forming process generally adopts a magnetron sputtering technique, the thin film material generally adopts an ITO material, and the etching process generally adopts a wet etching technique.
As shown in FIGS. 4a to 4c, the single layer SiO is used in the above embodiment2AMZO thin film and double-layer AMZO/SiO2And (3) testing the illumination stability of the nitrogen-doped amorphous oxide semiconductor thin film transistor with the thin film as the protective layer. Tests show that the single-layer AMZO and the double-layer AMZO/SiO are provided2The a-IGZO: N TFT of the protective layer exhibits very stable light stability. With conventional SiO2Compared with the protective layer, the AMZO protective layer can effectively improve the illumination stability of the device by shielding UV light and isolating the ambient atmosphere. However, the operation characteristics of the device using the single-layered AMZO protective layer may be deteriorated (threshold voltage is biased positive, sub-threshold is deteriorated). However, by using AMZO/SiO2A device with a double protective layer structure can solve the problem well. AMZO/SiO2The double-protection layer film can not only shield UV light, but also has the first protection layer (SiO)2Layer) also reduces defects in the channel layer caused when the AMZO layer is sputtered, so that better device operation characteristics and light stability can be obtained.
In summary, compared with the prior art, the effects of the invention include:
1) the AMZO film has a good shielding effect on short-wavelength UV light. Thus, the AMZO protective layer and the nitrogen doping process (channel layer)) The combination can well inhibit the change of defect states in the channel of the device, and further improve the illumination stability of the amorphous oxide semiconductor thin film transistor. In addition, SiO is used2The nitrogen-doped device with the/AMZO double protection layers can improve the illumination stability of the device and can also improve the operating characteristics (threshold voltage, sub-threshold swing and the like) of the device.
2) The AMZO film has better compactness, and can well isolate water and oxygen in the ambient atmosphere, thereby further improving the environmental stability of the nitrogen-doped device.
The foregoing embodiments may be modified in many different ways by those skilled in the art without departing from the spirit and scope of the invention, which is defined by the appended claims and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims (11)

1. A protective layer for nitrogen-doped amorphous oxide semiconductor thin film transistor, i.e. an Al-Mn-Zn oxide thin film, is prepared from Al oxide2O3Manganese oxide MnO and zinc oxide ZnO, and the doping amount ranges from 3% to 90% by weight.
2. The protective layer for a nitrogen-doped amorphous oxide semiconductor thin film transistor as claimed in claim 1, wherein the composition and doping amount are Al2O3:MnO:ZnO＝6:5:89wt％。
3. A preparation method related to the protective layer is characterized in that Al is added2O3And MnO and ZnO are mixed and ground, pressed into a target and then sintered to obtain an AMZO target material, and a protective layer deposited on the nitrogen-doped amorphous oxide semiconductor thin film transistor is obtained by performing magnetron sputtering in a vacuum cavity.
4. A method according to claim 3, characterized in that the method is embodied as: prepared on a thin film transistor by magnetron sputteringA single-layer AMZO film is used as a protective layer, or a layer of SiO is prepared first2After the film is formed, then SiO2Covering an AMZO film on the film by magnetron sputtering, and introducing SiO between the channel layer and the AMZO layer2The film is used for preventing defects introduced into the channel layer when the AMZO film is sputtered, and SiO is used2the/AMZO double-protection layer thin film structure is used for further improving the characteristics of the thin film transistor.
5. The method as set forth in claim 3, wherein the vacuum chamber has a degree of vacuum of 1 x 10-3～5×10- 2Torr。
6. The method of claim 3, wherein the magnetron sputtering is performed in an inert atmosphere with a flow rate of argon gas ranging from 20 to 50 sccm.
7. The method of claim 3, wherein the magnetron sputtering power is in the range of 50 to 200W.
8. A process for preparing a nitrogen-doped amorphous oxide semiconductor thin film transistor based on the AMZO thin film as a protective layer in any one of the preceding claims, wherein the AMZO thin film is obtained by magnetron sputtering to optimize the illumination stability of the thin film transistor.
9. The process as claimed in claim 8, wherein the thickness of the AMZO thin film is in the range of 25-1000 nm.
10. The process as claimed in claim 8, which includes the steps of:
step 1) preparing a layer of gate electrode layer thin film on a glass substrate, and forming a gate electrode layer pattern by using a patterning process;
step 2) preparing a layer of gate insulating layer film on the gate electrode layer pattern by utilizing a magnetron sputtering or PECVD process to cover the gate electrode pattern;
step 3) preparing a layer of nitrogen-doped amorphous oxide semiconductor film on the gate insulating layer film by magnetron sputtering, and forming a channel layer pattern by a patterning process;
step 4), preparing a layer of source-drain electrode film on the channel layer pattern by magnetron sputtering, and forming a source-drain electrode pattern by a patterning process;
step 5) preparing single-layer AMZO or double-layer SiO on the source and drain electrode patterns by magnetron sputtering2an/AMZO thin film;
and 6) forming a contact hole on the AMZO film by using a patterning process, and forming a pixel electrode pattern by using the patterning process after further preparing the transparent pixel electrode film.
11. The process as claimed in claim 10, wherein step 5) is carried out by preparing a layer of SiO on the source/drain electrode pattern2After the film is formed, then SiO2The AMZO film is prepared on the film, namely a double-protection-layer film is adopted to further improve the electrical characteristics of the thin film transistor.
CN201810989320.2A 2018-08-28 2018-08-28 Protective layer for semiconductor thin film transistor and methods of implementation and application thereof Active CN110867490B (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020106839A1 (en) * 2001-02-02 2002-08-08 International Business Machines Corporation Thin film transistor and method for manufacturing the same
CN105084412A (en) * 2014-05-05 2015-11-25 强生消费者公司 Particulate zinc oxide with manganese ion dopant
US20160147109A1 (en) * 2014-11-26 2016-05-26 Semiconductor Energy Laboratory Co., Ltd. Display Device and Electronic Device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20020106839A1 (en) * 2001-02-02 2002-08-08 International Business Machines Corporation Thin film transistor and method for manufacturing the same
CN105084412A (en) * 2014-05-05 2015-11-25 强生消费者公司 Particulate zinc oxide with manganese ion dopant
US20160147109A1 (en) * 2014-11-26 2016-05-26 Semiconductor Energy Laboratory Co., Ltd. Display Device and Electronic Device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
CHENGYUAN DONG,ET.AL: "Improvements in passivation effect of amorphous InGaZnO thin film transistors", 《MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING》 *

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