CN110855449B - Gigabit network connection circuit - Google Patents
Gigabit network connection circuit Download PDFInfo
- Publication number
- CN110855449B CN110855449B CN201911114134.5A CN201911114134A CN110855449B CN 110855449 B CN110855449 B CN 110855449B CN 201911114134 A CN201911114134 A CN 201911114134A CN 110855449 B CN110855449 B CN 110855449B
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- gigabit network
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/30—Definitions, standards or architectural aspects of layered protocol stacks
- H04L69/32—Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Computer Security & Cryptography (AREA)
- Amplifiers (AREA)
- Telephonic Communication Services (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Abstract
The embodiment of the invention discloses a gigabit network connection circuit which comprises a first gigabit network circuit, a second gigabit network circuit, a first differential circuit and a second differential circuit, wherein the first gigabit network circuit is bridged on the positive and negative electrodes of the first differential circuit, the second gigabit network circuit is bridged on the positive and negative electrodes of the second differential circuit, and the positive and negative electrodes of the first differential circuit are respectively connected with the positive and negative electrodes of the second differential circuit by using a first capacitor and a second capacitor.
Description
Technical Field
The invention relates to the field of circuits, in particular to a gigabit network connection circuit.
Background
At present, when gigabit network systems in the market are interconnected, a PHY (Physical Layer) is required to be connected to a network transformer, and then a network interface provided by the network transformer is connected to another gigabit network system.
Disclosure of Invention
In view of this, embodiments of the present invention provide a gigabit network connection circuit, which uses a capacitor to bridge between gigabit network circuits, thereby implementing simple connection between gigabit network systems, reducing manufacturing cost, and isolating dc signals between gigabit network circuits, and further being capable of avoiding a problem that systems cannot be connected because of unidentified systems due to different dc bias levels between the systems.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
a gigabit network connection circuit comprises a first gigabit network circuit, a second gigabit network circuit, a first differential circuit and a second differential circuit, wherein the first gigabit network circuit is in bridge connection with the positive and negative electrodes of the first differential circuit, the second gigabit network circuit is in bridge connection with the positive and negative electrodes of the second differential circuit, and the positive and negative electrodes of the first differential circuit are respectively connected with the positive and negative electrodes of the second differential circuit by using a first capacitor and a second capacitor.
Optionally, the first gigabit network circuit includes a first impedance matching network circuit and a second impedance matching network circuit, where a first pull-up resistor is set on the first impedance matching network circuit, and a second pull-up resistor is set on the second impedance matching network circuit.
Optionally, the second gigabit network circuit includes a third impedance matching network circuit and a fourth impedance matching network circuit, where a third pull-up resistor is set on the third impedance matching network circuit, and a fourth pull-up resistor is set on the fourth impedance matching network circuit.
Optionally, a third capacitor is further disposed between the first gigabit network circuit and the external power supply, and a fourth capacitor is further disposed between the second gigabit network and the external power supply.
Optionally, the first pull-up resistor is 49.9 Ω.
Optionally, the second pull-up resistor is 49.9 Ω.
Optionally, the third pull-up resistor is 49.9 Ω.
Optionally, the fourth pull-up resistor is 49.9 Ω.
Optionally, the third capacitor and the fourth capacitor are both 0.1 uf.
Optionally, the first capacitor and the second capacitor are both 0.1 uf.
In summary, embodiments of the present invention provide a gigabit network connection circuit, where the gigabit network connection circuit includes a first gigabit network circuit, a second gigabit network circuit, a first differential line, and a second differential line, the first gigabit network circuit is bridged across the positive and negative electrodes of the first differential line, the second gigabit network circuit is bridged across the positive and negative electrodes of the second differential line, and the positive and negative electrodes of the first differential line are further connected to the positive and negative electrodes of the second differential line by using a first capacitor and a second capacitor, respectively.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a gigabit network connection circuit according to the present invention;
fig. 2 is a schematic circuit diagram of a gigabit network connection circuit according to the present invention;
fig. 3 is a schematic circuit diagram of a gigabit network connection circuit according to another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1 and 2, a gigabit network connection circuit according to an embodiment of the present invention includes a first gigabit network circuit 01, a second gigabit network circuit 02, a first differential line 07, and a second differential line 08, where the first gigabit network circuit 01 is connected across positive and negative electrodes of the first differential line 07, the second gigabit network circuit 02 is connected across positive and negative electrodes of the second differential line 08, and the positive and negative electrodes of the first differential line 07 are further connected to the positive and negative electrodes of the second differential line 07 by using a first capacitor 03 and a second capacitor 04, respectively.
Specifically, as shown in fig. 1 and 2, the first gigabit network circuit 01 includes a first impedance matching network circuit 011 and a second impedance matching network circuit 012, and a first pull-up resistor 011a is provided in the first impedance matching network circuit 011 and a second pull-up resistor 012a is provided in the second impedance matching network circuit 012.
Specifically, as shown in fig. 1 and 2, the second gigabit network 02 includes a third impedance matching network 021 and a fourth impedance matching network 022, a third pull-up resistor 021a is disposed on the third impedance matching network 021, and a fourth pull-up resistor 022a is disposed on the fourth impedance matching network 022.
Specifically, as shown in fig. 2, a third capacitor 05 is further provided between the first gigabit network circuit 01 and the external power supply, and a fourth capacitor 06 is further provided between the second gigabit network circuit 02 and the external power supply.
In the embodiment of the present invention, the first pull-up resistor 011a is 49.9 Ω, the second pull-up resistor 012a is 49.9 Ω, the third pull-up resistor 021a is 49.9 Ω, the fourth pull-up resistor 022a is 49.9 Ω, the first capacitor 03 and the second capacitor 04 are both 0.1uf, and the third capacitor 05 and the fourth capacitor 06 are both 0.1 uf.
In an embodiment, as shown in fig. 3, the gigabit network connection circuit may further include multiple first gigabit network circuits 01 connected in parallel and multiple second gigabit network circuits 02 connected in parallel and corresponding to the multiple first gigabit network circuits 01, each of the multiple first gigabit network circuits 01 is provided with one first differential line 07 corresponding thereto, and each of the multiple second gigabit network circuits 02 is provided with one second differential line 08 corresponding thereto; correspondingly, each first gigabit network circuit 01 is connected to the positive and negative electrodes of each second differential line 08 through the positive and negative electrodes of each first differential line 07 by using the first capacitor 03 and the second capacitor 04, and one first gigabit network circuit 01 corresponds to one second gigabit network circuit 02.
The principle of the embodiment of the invention is as follows:
as shown in fig. 1 to 3, in the embodiment of the present invention, a first capacitor and a second capacitor are bridged between the positive electrode and the negative electrode of a first differential line connected to a first gigabit network circuit and a second differential line connected to a second gigabit network circuit, so as to implement simple connection between gigabit network systems, instead of using a network transformer in the conventional manner, reduce the cost, and isolate the dc signals between the gigabit network systems by using the characteristics of the capacitors, thereby further avoiding the problem that the systems cannot be connected because of unidentified dc offset levels between the gigabit network systems.
As shown in fig. 1 to 3, in the embodiment of the present invention, each impedance matching network circuit in the first gigabit network circuit and the second gigabit network circuit is provided with a pull-up resistor, and the resistance of the pull-up resistor is 49.9 Ω, so that the line impedance on each impedance matching network circuit is ensured to be 50 Ω, and by providing a capacitor between each gigabit network circuit and the external power supply, the voltage of the external power supply can be prevented from affecting the bias inside the system, and the external power supply and the bias circuit inside the system can be isolated, so that the operation stability of the gigabit network system is increased, and the normal operation of the gigabit network system is ensured.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (9)
1. A gigabit network connection circuit is characterized by comprising a first gigabit network circuit, a second gigabit network circuit, a first differential circuit and a second differential circuit, wherein the first gigabit network circuit is bridged on the positive and negative electrodes of the first differential circuit, the second gigabit network circuit is bridged on the positive and negative electrodes of the second differential circuit, and the positive and negative electrodes of the first differential circuit are connected with the positive and negative electrodes of the second differential circuit respectively by using a first capacitor and a second capacitor;
a third capacitor is arranged between the first gigabit network circuit and an external power supply, and a fourth capacitor is arranged between the second gigabit network and the external power supply;
the gigabit network connection circuit is provided with a plurality of paths of parallel connection first gigabit network circuits and a plurality of paths of parallel connection corresponding to the first gigabit network circuits, and the second gigabit network circuits are connected with the first gigabit network circuits respectively through the positive and negative electrodes of the first differential lines, the first gigabit network circuits are used by the first capacitors and the second capacitors respectively, and are connected with the positive and negative electrodes of the second differential lines respectively, so that one path of the first gigabit network circuits is formed and corresponds to one path of the second gigabit network circuits.
2. The gigabit network connection circuit of claim 1, wherein the first gigabit network circuit comprises a first impedance matching network circuit and a second impedance matching network circuit, a first pull-up resistor being provided on the first impedance matching network circuit and a second pull-up resistor being provided on the second impedance matching network circuit.
3. The gigabit network connection circuit of claim 1, wherein the second gigabit network circuit comprises a third impedance matching network circuit and a fourth impedance matching network circuit, a third pull-up resistor being provided on the third impedance matching network circuit and a fourth pull-up resistor being provided on the fourth impedance matching network circuit.
4. The gigabit network connection of claim 2, wherein the first pull-up resistor is 49.9 Ω.
5. The gigabit network connection of claim 2, wherein the second pull-up resistor is 49.9 Ω.
6. The gigabit network connection of claim 3, wherein the third pull-up resistor is 49.9 Ω.
7. The gigabit network connection of claim 3, wherein the fourth pull-up resistor is 49.9 Ω.
8. The gigabit network connection of claim 1, wherein the third capacitor and the fourth capacitor are each 0.1 uf.
9. The gigabit network connection of any one of claims 1-8, wherein the first and second capacitors are each 0.1 uf.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911114134.5A CN110855449B (en) | 2019-11-14 | 2019-11-14 | Gigabit network connection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911114134.5A CN110855449B (en) | 2019-11-14 | 2019-11-14 | Gigabit network connection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110855449A CN110855449A (en) | 2020-02-28 |
| CN110855449B true CN110855449B (en) | 2022-03-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201911114134.5A Active CN110855449B (en) | 2019-11-14 | 2019-11-14 | Gigabit network connection circuit |
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Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10212003B2 (en) * | 2008-06-20 | 2019-02-19 | Lantiq Beteiligungs-GmbH & Co. KG | Multi-mode ethernet transceiver |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN205123242U (en) * | 2015-10-20 | 2016-03-30 | 武汉微创光电股份有限公司 | Gigabit ethernet mouth lightning protection circuit |
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2019
- 2019-11-14 CN CN201911114134.5A patent/CN110855449B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10212003B2 (en) * | 2008-06-20 | 2019-02-19 | Lantiq Beteiligungs-GmbH & Co. KG | Multi-mode ethernet transceiver |
Non-Patent Citations (3)
| Title |
|---|
| "capacitive coupling ethernet transceivers without using transformers";micrel;《http://ww1.microchip.com/downloads/en/AppNotes/AN-120%20Capacitive%20Coupling%20for%20Ethernet%20Transceiver.pdf》;20060130;正文第1-2页 * |
| "以太网PHY无变压器设计方法与原理";jank121;《https://wenku.baidu.com/view/c898d4754a73f242336c1eb91a37f111f0850d12.html》;20171028;正文第1-5页 * |
| jank121."以太网PHY无变压器设计方法与原理".《https://wenku.baidu.com/view/c898d4754a73f242336c1eb91a37f111f0850d12.html》.2017, * |
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| CN110855449A (en) | 2020-02-28 |
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