CN110854204B - Thin film transistor, preparation method thereof, pixel circuit and display panel - Google Patents
Thin film transistor, preparation method thereof, pixel circuit and display panel Download PDFInfo
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- CN110854204B CN110854204B CN201911175613.8A CN201911175613A CN110854204B CN 110854204 B CN110854204 B CN 110854204B CN 201911175613 A CN201911175613 A CN 201911175613A CN 110854204 B CN110854204 B CN 110854204B
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- 239000010409 thin film Substances 0.000 title claims abstract description 58
- 238000002360 preparation method Methods 0.000 title abstract description 10
- 239000004065 semiconductor Substances 0.000 claims abstract description 272
- 239000000758 substrate Substances 0.000 claims abstract description 148
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 56
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 56
- 239000001301 oxygen Substances 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims description 34
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 239000000463 material Substances 0.000 description 20
- 238000010586 diagram Methods 0.000 description 9
- 238000000059 patterning Methods 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- 230000000149 penetrating effect Effects 0.000 description 4
- 238000002161 passivation Methods 0.000 description 3
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 229910052738 indium Inorganic materials 0.000 description 2
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 2
- 239000004417 polycarbonate Substances 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- AJNVQOSZGJRYEI-UHFFFAOYSA-N digallium;oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[Ga+3].[Ga+3] AJNVQOSZGJRYEI-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910001195 gallium oxide Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000013589 supplement Substances 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Abstract
The application provides a thin film transistor, a preparation method thereof, a pixel circuit and a display panel. The thin film transistor comprises a substrate, an active layer, a gate electrode, a source electrode and a drain electrode. The active layer is formed on the substrate, and the active layer comprises a first oxide semiconductor layer and a second oxide semiconductor layer positioned on the side of the first oxide semiconductor layer, wherein the second oxide semiconductor layer is in contact with the first oxide semiconductor layer, and the second oxide semiconductor layer is used for providing oxygen for the first oxide semiconductor layer so that the oxygen content of the first oxide semiconductor layer is improved. The gate electrode, the source electrode and the drain electrode are formed on the substrate, the gate electrode and the active layer are insulated from each other, and the source electrode and the drain electrode are electrically connected with the active layer respectively.
Description
Technical Field
The present application relates to the field of semiconductor technologies, and in particular, to a thin film transistor, a method for manufacturing the thin film transistor, a pixel circuit, and a display panel.
Background
In recent years, display devices based on OLEDs (Organic Light Emitting Diode, organic light emitting diodes) have been popular display products at home and abroad because of their advantages of self-luminescence, wide viewing angle, high luminous efficiency, wide color gamut, low operating voltage, thin panel, and the like.
The driving mode of the OLED display device is generally active driving, that is, the pixels of the display device are driven by the pixel circuit. The switching transistor in a general pixel circuit employs an oxide semiconductor transistor. However, the active layer of the oxide semiconductor transistor is made of an oxide semiconductor material, the oxide semiconductor material has poor heat resistance, and oxygen in the active layer easily escapes at high temperature, so that the threshold voltage of the oxide semiconductor transistor is shifted, and the display device is disabled or abnormally displayed.
Disclosure of Invention
According to a first aspect of an embodiment of the present application, there is provided a thin film transistor including:
a substrate;
an active layer formed over the substrate, the active layer including a first oxide semiconductor layer and a second oxide semiconductor layer located on a side of the first oxide semiconductor layer, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer, the second oxide semiconductor layer being for supplying oxygen to the first oxide semiconductor layer so that an oxygen content of the first oxide semiconductor layer is increased;
the gate electrode is insulated from the active layer, and the source electrode and the drain electrode are respectively and electrically connected with the active layer.
In one embodiment, the number of the second oxide semiconductor layers is at least two, and at least two of the second oxide semiconductor layers are arranged at intervals on the peripheral side of the first oxide semiconductor layer.
In one embodiment, a step structure is provided on a side portion of the first oxide semiconductor layer, and an abutting portion that mates with the step structure is provided on a side portion of the second oxide semiconductor layer, and the abutting portion abuts against the step structure.
In one embodiment, the sidewall of the portion of the first oxide semiconductor layer close to the substrate is recessed in a direction away from the second oxide semiconductor layer to form the step structure, or the sidewall of the portion of the first oxide semiconductor layer away from the substrate is recessed in a direction away from the second oxide semiconductor layer to form the step structure.
In one embodiment, the step structure includes at least two steps;
the side walls of the parts of the first oxide semiconductor layers, which deviate from the substrate, are recessed in the direction, which deviates from the second oxide semiconductor layers, so that the step structures are formed, and the side walls of at least two step parts sequentially protrude outwards along the direction, which is close to the substrate; or, the side walls of the parts, close to the substrate, of the first oxide semiconductor layers are recessed towards the direction away from the second oxide semiconductor layers to form the step structures, and the side walls of at least two step parts sequentially protrude outwards along the direction away from the substrate.
According to a second aspect of an embodiment of the present application, there is provided a pixel circuit for driving a pixel, the pixel circuit including the thin film transistor described above.
According to a third aspect of embodiments of the present application, there is provided a display panel including the pixel circuit described above.
According to a fourth aspect of an embodiment of the present application, there is provided a method for manufacturing a thin film transistor, the method comprising:
providing a substrate;
an active layer including a first oxide semiconductor layer and a second oxide semiconductor layer located at a side of the first oxide semiconductor layer is formed over the substrate, the second oxide semiconductor layer is in contact with the first oxide semiconductor layer, and an oxygen content of the second oxide semiconductor layer is greater than an oxygen content of the first oxide semiconductor layer.
In one embodiment, the forming an active layer on the substrate includes:
forming a first oxide semiconductor layer on the substrate, wherein the side wall of the part of the first oxide semiconductor layer, which is away from the substrate, is inwards recessed to form a step structure;
and forming a second oxide semiconductor layer on the substrate, wherein an abutting part matched with the step structure is arranged on the side part of the second oxide semiconductor layer, and the abutting part abuts against the step structure.
In one embodiment, the forming an active layer on the substrate includes:
forming a first oxide semiconductor layer on the substrate, wherein the side wall of a part of the first oxide semiconductor layer, which is close to the substrate, is inwards recessed to form a step structure;
forming the second oxide semiconductor layer on the substrate, wherein an abutting part matched with the step structure is arranged on the side part of the second oxide semiconductor layer, and the abutting part abuts against the step structure;
or alternatively, the process may be performed,
the forming an active layer on the substrate includes:
forming a second oxide semiconductor layer on the substrate, wherein a contact part is arranged at a side part of the second oxide semiconductor layer;
a first oxide semiconductor layer is formed on the substrate, and a side wall of a portion of the first oxide semiconductor layer close to the substrate is recessed inward to form a step structure so that the step structure is abutted to the abutting portion.
According to the thin film transistor, the manufacturing method thereof, the pixel circuit and the display panel, the active layer of the thin film transistor comprises the first oxide semiconductor layer and the second oxide semiconductor layer positioned on the side portion of the first oxide semiconductor layer, the second oxide semiconductor layer is used for providing oxygen for the first oxide semiconductor layer, so that the oxygen content of the first oxide semiconductor layer is improved, the temperature of the first oxide semiconductor layer is increased in the manufacturing process of the thin film transistor or in the using process of the thin film transistor, when the oxygen content in the first oxide semiconductor layer is reduced due to oxygen overflow, the oxygen in the second oxide semiconductor layer flows into the first oxide semiconductor layer, the oxygen content in the first oxide semiconductor layer is improved, and the problem that the characteristics of the thin film transistor drift due to the fact that the oxygen content in the first oxide semiconductor layer is too low can be avoided.
Drawings
Fig. 1 is a schematic structural diagram of a thin film transistor according to an embodiment of the present application;
fig. 2 is a schematic structural diagram of another thin film transistor according to an embodiment of the present application;
fig. 3 is an exploded view of an active layer of the thin film transistor shown in fig. 1 and 2;
fig. 4 is a schematic structural diagram of another thin film transistor according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of another thin film transistor according to an embodiment of the present application;
fig. 6 is an exploded view of an active layer of the thin film transistor shown in fig. 4 and 5;
fig. 7 is a top view of an active layer of a thin film transistor according to an embodiment of the present application;
fig. 8 is a flowchart of a method for manufacturing a thin film transistor according to an embodiment of the present application;
FIG. 9 is a schematic structural diagram of a first intermediate structure according to an embodiment of the present application;
FIG. 10 is a schematic structural diagram of a second intermediate structure according to an embodiment of the present application;
FIG. 11 is a schematic structural diagram of a third intermediate structure according to an embodiment of the present application;
fig. 12 is a schematic structural diagram of a fourth intermediate structure according to an embodiment of the present application;
fig. 13 is a schematic structural diagram of a fifth intermediate structure according to an embodiment of the present application.
Detailed Description
Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, the same numbers in different drawings refer to the same or similar elements, unless otherwise indicated. The implementations described in the following exemplary examples do not represent all implementations consistent with the application. Rather, they are merely examples of apparatus consistent with aspects of the application as detailed in the accompanying claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. Unless defined otherwise, technical or scientific terms used herein should be given the ordinary meaning as understood by one of ordinary skill in the art to which this application belongs. The use of the terms "a" or "an" and the like in the description and in the claims do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that elements or items appearing before "comprising" or "comprising" are encompassed by the element or item recited after "comprising" or "comprising" and equivalents thereof, and that other elements or items are not excluded. The terms "connected" or "connected," and the like, are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The term "plurality" includes two, corresponding to at least two. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any or all possible combinations of one or more of the associated listed items.
The thin film transistor, the manufacturing method thereof, the pixel circuit and the display panel provided by the embodiment of the application are described in detail below with reference to the accompanying drawings. The features of the examples and embodiments described below may be supplemented or combined with one another without conflict.
The embodiment of the application provides a thin film transistor. Referring to fig. 1 to 6, the thin film transistor includes a substrate 10, an active layer 20, a gate electrode 30, a source electrode 40, and a drain electrode 50.
An active layer 20 is formed on the substrate 10, the active layer 20 includes a first oxide semiconductor layer 21 and a second oxide semiconductor layer 22 located at a side portion of the first oxide semiconductor layer 21, a sidewall of the second oxide semiconductor layer 22 is in contact with a sidewall of the first oxide semiconductor layer 21, and the second oxide semiconductor layer 22 is used to supply oxygen to the first oxide semiconductor layer 21 so that an oxygen content of the first oxide semiconductor layer 21 is increased.
A gate electrode 30, a source electrode 40 and a drain electrode 50 are formed on the substrate 10, the gate electrode 30 and the active layer 20 are insulated from each other, and the source electrode 40 and the drain electrode 50 are electrically connected to the active layer 20, respectively.
The number of gate electrodes 30 in the thin film transistor may be one or two. When the number of the gate electrodes 30 is one, as shown in fig. 1 and 4, the gate electrodes 30 may be located at a side of the active layer 20 facing away from the substrate 10; in other embodiments, the gate electrode 30 may be located on a side of the active layer 20 near the substrate 10. When the number of gate electrodes 30 is two, as shown in fig. 2 and 5, one gate electrode 30 is located on a side of the active layer 20 facing away from the substrate 10, and the other gate electrode 30 is located on a side of the active layer 20 facing toward the substrate 10.
In the thin film transistor provided by the embodiment of the application, the active layer 20 comprises the first oxide semiconductor layer 21 and the second oxide semiconductor layer 22 positioned at the side part of the first oxide semiconductor layer 21, the second oxide semiconductor layer 22 is used for providing oxygen for the first oxide semiconductor layer 21, so that the oxygen content of the first oxide semiconductor layer 21 is improved, the temperature of the first oxide semiconductor layer 21 is increased in the preparation process of the thin film transistor or the use process of the thin film transistor, when the oxygen content in the first oxide semiconductor layer 21 is reduced due to the overflow of oxygen in the first oxide semiconductor layer 21, the oxygen in the second oxide semiconductor layer 22 flows into the first oxide semiconductor layer 21, so that the oxygen content in the first oxide semiconductor layer 21 is improved, the problem that the characteristics of the thin film transistor are seriously drifted due to the too low oxygen content in the first oxide semiconductor layer 21 can be avoided, and the thermal stability and the reliability of the thin film transistor can be improved.
In the embodiment of the present application, the process of forming the first oxide semiconductor 21 is a high temperature process, and oxygen in the first oxide semiconductor layer 21 escapes under the effect of the high temperature, resulting in a decrease in the oxygen content of the first oxide semiconductor layer 21. Immediately after the formation of the second oxide semiconductor layer 22, the oxygen content of the second oxide semiconductor layer 22 is larger than that of the first oxide semiconductor layer 21, and there is a difference in concentration between the oxygen content of the second oxide semiconductor layer 22 and that of the first oxide semiconductor layer 21. The process of preparing the second oxide semiconductor layer 22 is also a high temperature process, and oxygen in the second oxide semiconductor layer 22 flows toward the first oxide semiconductor layer 21 under the action of a high temperature and the action of an oxygen concentration difference. The first oxide semiconductor layer 21 and the second oxide semiconductor layer 22 eventually form an oxygen distribution balance, and at this time, the oxygen content of the first oxide semiconductor layer 21 and the oxygen content of the second oxide semiconductor layer 22 are the same, or the oxygen content of the second oxide semiconductor layer 22 is slightly larger than the oxygen content of the first oxide semiconductor layer 21.
In one embodiment, the substrate 10 may be a flexible substrate or a rigid substrate. The flexible substrate may be a transparent substrate made of one or more of PET (polyethylene terephthalate), PI (polyimide), PC (polycarbonate), and the like. The rigid substrate may be a transparent substrate such as a glass substrate, a quartz substrate, or a plastic substrate.
In one embodiment, as shown in fig. 1 and 4, the thin film transistor includes a gate electrode 30, and the gate electrode 30 is located on a side of the active layer 20 facing away from the substrate 10, and the thin film transistor may further include a buffer layer 60, a gate insulating layer 70, and a planarization layer 80. The buffer layer 60 is located between the substrate 10 and the active layer 20, the gate insulating layer 70 is located on a side of the active layer 20 facing away from the substrate 10, the gate electrode 30 is located on a side of the gate insulating layer 70 facing away from the substrate 10, and the planarization layer 80 is located on a side of the gate electrode 30 facing away from the substrate 10. Two contact holes penetrating the gate insulating layer 70 and the planarization layer 80 are formed on the gate insulating layer 70 and the planarization layer 80, respectively, and the source electrode 40 and the drain electrode 50 are electrically connected to the active layer 20 through the contact holes, respectively.
In another embodiment, as shown in fig. 2 and 5, the thin film transistor includes two gate electrodes 30, and the thin film transistor may further include a buffer layer 60, a passivation layer 90, a gate insulating layer 70, and a planarization layer 80. The buffer layer 60 is located between the substrate 10 and the gate electrode 30 on the side facing away from the substrate 10, the passivation layer 90 is located between the gate electrode 30 on the side facing away from the substrate 10 and the active layer 20, the gate insulating layer 70 is located on the side of the active layer 20 facing away from the substrate 10, the gate electrode 30 is located on the side of the gate insulating layer 70 facing away from the substrate 10, and the planarization layer 80 is located on the side of the gate electrode 30 facing away from the substrate 10. Two contact holes penetrating the gate insulating layer 70 and the planarization layer 80 are formed on the gate insulating layer 70 and the planarization layer 80, respectively, and the source electrode 40 and the drain electrode 50 are electrically connected to the active layer 20 through the contact holes, respectively.
In one embodiment, referring to fig. 1, 2, 4 and 5, the source electrode 40 and the drain electrode 50 are respectively in contact with the first oxide semiconductor layer 21, that is, the orthographic projections of the contact holes corresponding to the source electrode 40 and the drain electrode 50 on the substrate 10 fall within the orthographic projections of the first oxide semiconductor layer 21 on the substrate 10. Thus, the channel length of the active layer 20 is short, and the thin film transistor provides a possibility of designing higher PPI in the display panel when used in the pixel circuit of the display panel. In other embodiments, the source electrode 40 may be in contact with the first oxide semiconductor layer 21, and the drain electrode 50 is in contact with the oxide semiconductor layer 22, that is, the orthographic projection of the contact hole corresponding to the source electrode 40 on the substrate 10 falls within the orthographic projection of the first oxide semiconductor layer 21 on the substrate 10, and the orthographic projection of the drain electrode 50 on the substrate 10 falls within the orthographic projection of the second oxide semiconductor layer 22 on the substrate 10. By this arrangement, the channel length of the active layer 20 can be made longer, which is advantageous for reducing the driving voltage of the thin film transistor.
In one embodiment, referring to fig. 7, the number of the second oxide semiconductor layers 22 may be at least two, and at least two of the second oxide semiconductor layers 22 are arranged at intervals on the peripheral side of the first oxide semiconductor layer 21. Thus, at least two second oxide semiconductor layers 22 each have an oxygen concentration difference from that of the first oxide semiconductor layer 21, and oxygen in at least two second oxide semiconductor layers 22 flows into the first oxide semiconductor layer 21, respectively, which is advantageous in increasing the oxygen content in the first oxide semiconductor layer 21. Further, at least two second oxide semiconductor layers 22 are arranged at regular intervals in the circumferential direction, contributing to a relatively uniform distribution of oxygen in the first oxide semiconductor layer 21. In the embodiment shown in fig. 7, the number of the second oxide semiconductor layers 22 is four. In other embodiments, the number of second oxide semiconductor layers 22 may be two, three, or more than four.
In one embodiment, a step structure 211 is provided on a side portion of the first oxide semiconductor layer 21, and an abutting portion 221 that mates with the step structure 211 is provided on a side portion of the second oxide semiconductor layer 22, and the abutting portion 221 abuts against the step structure 211. The second oxide semiconductor layer 22 may include a body portion 222, and the abutment portion 221 is formed by extending the body portion 222 toward the first oxide semiconductor layer 21. The side wall of the abutment 221 abuts against the side wall of the step structure 211, and the wall of the abutment 221 in the lateral direction abuts against the wall of the step structure 211 in the lateral direction. When the number of the second oxide semiconductor layers 22 is at least two, at least two step structures 211 are provided on the first oxide semiconductor layer 21 one by one with the at least two second oxide semiconductor layers.
As shown in fig. 3 and 6, the first oxide semiconductor layer 21 includes a portion 201 near the substrate 10 and a portion 202 away from the substrate 10. In order to distinguish the portion 201 close to the substrate 10 from the portion 202 facing away from the substrate 10, a broken line is schematically shown, but it should be noted that in an actual manufacturing process, the portion 201 close to the substrate 10 and the portion 202 facing away from the substrate 10 are generally formed in the same process step, and there is no obvious boundary therebetween. Of course, in some embodiments, the portion 201 proximate to the substrate 10 and the portion 202 facing away from the substrate 10 may also be formed in different process steps, and the portion 201 proximate to the substrate 10 may be prepared first and then the portion 202 facing away from the substrate 10 may be formed.
In the embodiment shown in fig. 3, the sidewall of the portion 201 of the first oxide semiconductor layer 21 close to the substrate 10 is recessed in a direction away from the second oxide semiconductor layer 22 to form the step structure 211. The abutting portion 221 of the second oxide semiconductor layer 22 is formed by extending a portion of the main body portion 222 away from the substrate 10. In the process, oxygen on one side of the first oxide semiconductor layer 21, which is away from the substrate 10, escapes more easily, and the step structure 211 formed by recessing the sidewall of the portion 201 of the first oxide semiconductor layer 21, which is close to the substrate 10, toward the direction away from the second oxide semiconductor layer 22 abuts against the abutting portion 221 of the second oxide semiconductor layer 22, so that more oxygen in the second oxide semiconductor layer 22 supplements to the portion 201 of the first oxide semiconductor layer 21, which is close to the substrate 10, which is beneficial to making the oxygen content distribution in the first oxide semiconductor layer 21 more uniform.
In the embodiment shown in fig. 6, the sidewall of the portion 202 of the first oxide semiconductor layer 21 facing away from the substrate 10 is recessed in a direction facing away from the second oxide semiconductor layer 22 to form the step structure 211, and the abutment 221 is formed by extending a portion of the main body 222 adjacent to the substrate 10.
In one embodiment, the step structure 211 includes at least two steps 212.
In one embodiment, the sidewall of the portion 201 of the first oxide semiconductor layer 21 adjacent to the substrate 10 is recessed in a direction away from the second oxide semiconductor layer 22 to form the step structure 211, and the step structure 211 includes at least two step portions 212, and the sidewalls of the at least two step portions 212 sequentially protrude outward in the direction away from the substrate 10. Accordingly, the shape of the abutment 221 is adapted to the shape of the step structure 211. In the embodiment shown in fig. 6, the step structure 211 comprises two steps 212, one of which is close to the substrate 10 and the other of which is remote from the substrate 10. The side wall of the step portion 212 facing away from the substrate 10 abuts against the side wall of the portion of the main body portion 222 facing away from the substrate 10, and the side wall of the step portion 212 facing closer to the substrate 10 abuts against the side wall of the abutting portion 221. The cooperation of the step structure 211 and the abutment 221 can make the first oxide semiconductor layer 21 closely adhere to the second oxide semiconductor layer 22, thereby facilitating the flow of oxygen in the second oxide semiconductor layer 22 into the first oxide semiconductor layer 21.
In another embodiment, the oxide semiconductor layer 21 is recessed away from the sidewall of the portion 202 of the substrate 10, and the step structure 211 is formed by recessing the oxide semiconductor layer in a direction away from the second oxide semiconductor layer 22, and the sidewalls of at least two of the step portions 212 sequentially protrude outward in a direction approaching the substrate 10. The contact portion 221 and the portion of the second oxide semiconductor layer 22 facing away from the substrate 10 are respectively in contact with the sidewalls of at least two of the step portions 212.
In one embodiment, the materials of the first oxide semiconductor layer 21 and the second oxide semiconductor layer 22 may be IGZO (indium gallium zinc oxide), IZO (indium zinc oxide), IGO (indium gallium oxide), or the like. Wherein the material of the first oxide semiconductor layer 21 and the material of the second oxide semiconductor layer 22 may be the same or different. When the material of the first oxide semiconductor layer 21 and the material of the second oxide semiconductor layer 22 are the same, the oxygen content in the second oxide semiconductor layer 22 can be made larger than the oxygen content in the first oxide semiconductor layer 21 by controlling the process conditions.
The embodiment of the application also provides a preparation method of the thin film transistor. Referring to fig. 8, the preparation method includes the following steps 101 to 103.
In step 101, a substrate is provided.
In step 102, an active layer is formed on the substrate, the active layer including a first oxide semiconductor layer and a second oxide semiconductor layer located at a side of the first oxide semiconductor layer, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer, and an oxygen content of the second oxide semiconductor layer being greater than an oxygen content of the first oxide semiconductor layer.
In one embodiment, the portion 201 of the first oxide semiconductor layer 21 facing away from the substrate 10 is formed with a step structure 211, and the step 102 of forming an active layer on the substrate can be completed by the following steps 1021 and 1022.
In step 1021, a first oxide semiconductor layer is formed on the substrate, and a portion of the first oxide semiconductor layer facing away from the substrate is recessed inward to form a step structure.
Wherein a direction from the first oxide semiconductor layer 21 to the outside in the lateral direction is from the inside to the outside, a direction from the outside to the first oxide semiconductor layer 21 is from the outside to the inside, and the inward recess of the first oxide semiconductor layer 21 means that the first oxide semiconductor layer 21 is recessed in the outside to the inside direction.
In one embodiment, in forming the first oxide semiconductor layer 21, an oxide semiconductor material is globally deposited on the substrate 10 first, and then the globally deposited oxide semiconductor material may be exposed using a Half Tone Mask (Half Tone Mask) using an exposure and development process, and the photoresist used in the exposure and development process may be a positive photoresist. Specifically, the halftone mask includes three regions of different gray levels, the region not corresponding to the first oxide semiconductor layer 21 has the smallest gray level, the region corresponding to the step structure of the first oxide semiconductor layer 21 has the center of gray level, and the region corresponding to the other portion of the first oxide semiconductor layer 21 has the largest gray level. The larger the gradation of the mask plate is, the smaller the light passing rate is when exposure is performed. In the exposure development process, the oxide semiconductor material corresponding to the region of the halftone mask having the smallest gray scale is entirely developed, the portion of the oxide semiconductor material corresponding to the region having the middle gray scale facing away from the substrate 10 is developed, and the oxide semiconductor material corresponding to the region having the largest gray scale is not developed, thereby forming the first oxide semiconductor layer 21.
A first intermediate structure as shown in fig. 9 may be obtained by step 1021.
In step 1022, a second oxide semiconductor layer is formed on the substrate, and an abutting portion that mates with the step structure is provided on a side portion of the second oxide semiconductor layer, the abutting portion abutting the step structure.
In one embodiment, in forming the second oxide semiconductor layer 22, an oxide semiconductor material is first formed by global deposition on the surface of the first intermediate structure, and then a patterning process is performed, so that the second oxide semiconductor layer 22 is formed. In one exemplary embodiment, the patterning process may also be performed using an exposure and development process.
A second intermediate structure as shown in fig. 10 may be obtained by step 1022.
In another embodiment, the portion 202 of the first oxide semiconductor layer 21 near the substrate 10 is formed with a step structure 211, and the step 102 of forming an active layer on the substrate can be completed by the following steps 1023 and 1024.
In step 1023, a first oxide semiconductor layer is formed over the substrate, a portion of the first oxide semiconductor layer adjacent to the substrate being recessed inward to form a step structure.
In one embodiment, in forming the first oxide semiconductor layer 21, the oxide semiconductor material is globally deposited on the substrate 10 first, and then the globally deposited oxide semiconductor material may be exposed using a halftone mask using an exposure and development process, where the photoresist used in the exposure and development process is a negative photoresist. Specifically, a negative photoresist is formed on the side of the globally deposited oxide semiconductor material, and then a halftone mask is covered on the negative photoresist for exposure, and then development is performed to form the first oxide semiconductor layer 21.
A third intermediate structure as shown in fig. 11 may be obtained by step 1023.
In step 1024, the second oxide semiconductor layer is formed on the substrate, and an abutting portion that mates with the step structure is provided on a side portion of the second oxide semiconductor layer, the abutting portion abutting the step structure.
In one embodiment, in forming the second oxide semiconductor layer 22, the oxide semiconductor material is first deposited on both sides of the third intermediate structure, and then patterned, thereby forming the second oxide semiconductor layer 22. In one exemplary embodiment, the patterning process may also be performed using an exposure and development process.
A fourth intermediate structure as shown in fig. 12 may be obtained, via step 1024.
In yet another embodiment, the portion 202 of the first oxide semiconductor layer 21 adjacent to the substrate 10 is formed with a step structure 211, and the step 102 of forming an active layer on the substrate can be completed by the following steps 1025 and 1026.
In step 1025, a second oxide semiconductor layer is formed on the substrate, with a side portion of the second oxide semiconductor layer provided with an abutment.
In one embodiment, in forming the second oxide semiconductor layer 22, oxide semiconductor material is first globally deposited and then patterned. In one exemplary embodiment, the patterning may also be performed using an exposure and development process, with a halftone mask being used to expose the globally deposited oxide semiconductor material.
A fifth intermediate structure as shown in fig. 13 may be obtained by step 1025.
In step 1026, a first oxide semiconductor layer is formed over the substrate, and a portion of the first oxide semiconductor layer adjacent to the substrate is recessed inward to form a step structure such that the abutment portion abuts the step structure.
In one embodiment, in forming the first oxide semiconductor layer 21, an oxide semiconductor material is first formed by global deposition, followed by patterning. In one exemplary embodiment, the patterning process may be performed using an exposure and development process.
A fourth intermediate structure as shown in fig. 12 may be obtained by step 1025.
In an embodiment of the present application, the preparation method further includes a step of forming a gate electrode, a source electrode, and a drain electrode, where the gate electrode and the active layer are insulated from each other, and the source electrode and the drain electrode are electrically connected to the active layer, respectively. In one embodiment, as shown in fig. 1 and 4, the thin film transistor includes a gate electrode 30, and the gate electrode 30 is located on a side of the active layer 20 facing away from the substrate 10. The steps of forming the gate electrode, the source electrode and the drain electrode may be realized by the following processes: forming a gate insulating layer 70 on the second intermediate structure, forming a gate electrode 30 on a side of the gate insulating layer 70 facing away from the substrate 10; thereafter forming a planarization layer 80 on a side of the gate electrode 30 facing away from the substrate 10; forming contact holes penetrating through the planarization layer 80 and the gate insulating layer 70, wherein projections of the contact holes on the substrate 10 are positioned in projections of the active layers 20 on the substrate 10, and one active layer 20 corresponds to two contact holes; the source electrode 40 and the drain electrode 50 are formed, and the source electrode 40 and the drain electrode 50 are electrically connected to the active layer 20 through corresponding contact holes, respectively.
In one embodiment, as shown in fig. 2 and 5, the thin film transistor includes two gate electrodes 30, wherein one gate electrode 30 is located on a side of the active layer 20 away from the substrate 10, and the other gate electrode 30 is located on a side of the active layer 20 close to the substrate 10. The steps of forming the gate electrode, the source electrode and the drain electrode may be realized by the following processes:
before step 120, forming a gate electrode 30 on a side of the buffer layer 60 facing away from the substrate 10, and forming a passivation layer on a side of the gate electrode 30 facing away from the substrate;
after step 120, forming a gate insulating layer 70 on a side of the active layer 20 facing away from the substrate 10, and forming a gate electrode 30 on a side of the gate insulating layer 70 facing away from the substrate 10; thereafter forming a planarization layer 80 on a side of the gate electrode 30 facing away from the substrate 10; forming contact holes penetrating through the planarization layer 80 and the gate insulating layer 70, wherein projections of the contact holes on the substrate 10 are positioned in projections of the active layers 20 on the substrate 10, and one active layer 20 corresponds to two contact holes; the source electrode 40 and the drain electrode 50 are formed, and the source electrode 40 and the drain electrode 50 are electrically connected to the active layer 20 through corresponding contact holes, respectively.
It should be noted that, the intermediate structure shown in fig. 9 to 13 is an intermediate structure obtained by the illustrated preparation process in which the thin film transistor includes a gate electrode 30, and the gate electrode 30 is located on the side of the active layer 20 away from the substrate 10, and intermediate structures obtained by the preparation processes of thin film transistors of other structures are not illustrated.
In one embodiment, the step structure 211 includes at least two steps 212. The side walls of the portion 201 of the first oxide semiconductor layer 21, which is close to the substrate 10, are recessed in a direction away from the second oxide semiconductor layer 22 to form the step structure 211, and the side walls of at least two of the step portions 212 may sequentially protrude outward in a direction away from the substrate 10. When the side wall of the portion 201 of the first oxide semiconductor layer 21 facing away from the substrate 10 is recessed in a direction facing away from the second oxide semiconductor layer 22 to form the step structure 211, the side walls of at least two of the step portions 212 sequentially protrude outward in a direction facing toward the substrate 10.
In one embodiment, the number of the second oxide semiconductor layers 22 may be at least two, and at least two of the second oxide semiconductor layers 22 are arranged at regular intervals on the peripheral side of the first oxide semiconductor layer 21.
The product embodiment provided by the embodiment of the application basically corresponds to the embodiment of the preparation method, so that the descriptions of related details and beneficial effects can be mutually referred to, and the detailed description is omitted.
The embodiment of the application also provides a pixel circuit which is used for driving the pixel and comprises the thin film transistor.
In one embodiment, the thin film transistor in the pixel circuit may be used as a switching transistor and connected to the scan line. In other embodiments, the thin film transistor described above in the pixel circuit may also be used as a driving tube.
In one embodiment, the pixel circuit may further include a low temperature polysilicon thin film transistor.
The pixel circuit may be a 2T1C circuit, a 3T1C circuit, a 7T2C circuit, or the like.
The embodiment of the application also provides a display panel which comprises the pixel circuit. The display panel further includes a plurality of pixels, the number of pixel circuits being the same as the number of pixels, one pixel circuit for driving one pixel.
According to the pixel circuit and the display panel provided by the embodiment of the application, the active layer of the switch transistor of the pixel circuit comprises the first oxide semiconductor layer and the second oxide semiconductor layer positioned at the side part of the first oxide semiconductor layer, and the second oxide semiconductor layer is used for providing oxygen for the first oxide semiconductor layer, so that the oxygen content of the first oxide semiconductor layer is improved, when the oxygen content in the first oxide semiconductor layer is reduced due to oxygen overflow in the first oxide semiconductor layer in the process of the thin film transistor or the use process of the thin film transistor, the oxygen in the second oxide semiconductor layer can flow into the first oxide semiconductor layer, and the problem that the pixel circuit cannot be driven normally due to characteristic drift of the thin film transistor caused by too low oxygen content in the first oxide semiconductor layer is avoided, so that the display panel displays abnormal.
It is noted that in the drawings, the size of layers and regions may be exaggerated for clarity of illustration. Moreover, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or intervening layers may be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may be present. In addition, it will be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intervening layer or element may also be present. Like reference numerals refer to like elements throughout.
Other embodiments of the application will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of the application following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the application pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the application being indicated by the following claims.
It is to be understood that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, which have been described above, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (9)
1. A thin film transistor, the thin film transistor comprising:
a substrate;
an active layer formed over the substrate, the active layer including a first oxide semiconductor layer and a second oxide semiconductor layer located on a side of the first oxide semiconductor layer, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer, the second oxide semiconductor layer being for supplying oxygen to the first oxide semiconductor layer so that an oxygen content of the first oxide semiconductor layer is increased; a step structure is arranged on the side part of the first oxide semiconductor layer, an abutting part matched with the step structure is arranged on the side part of the second oxide semiconductor layer, and the abutting part abuts against the step structure;
a gate electrode, a source electrode and a drain electrode formed on the substrate, the gate electrode and the active layer being insulated from each other, the source electrode and the drain electrode being electrically connected to the active layer, respectively 。
2. The thin film transistor according to claim 1, wherein the number of the second oxide semiconductor layers is at least two, and at least two of the second oxide semiconductor layers are arranged at intervals on a peripheral side of the first oxide semiconductor layer.
3. The thin film transistor according to claim 1, wherein a side wall of a portion of the first oxide semiconductor layer close to the substrate is recessed to form the step structure in a direction away from the second oxide semiconductor layer, or wherein a side wall of a portion of the first oxide semiconductor layer away from the substrate is recessed to form the step structure in a direction away from the second oxide semiconductor layer.
4. The thin film transistor according to claim 1, wherein the step structure includes at least two step portions;
the side walls of the parts of the first oxide semiconductor layers, which deviate from the substrate, are recessed in the direction, which deviates from the second oxide semiconductor layers, so that the step structures are formed, and the side walls of at least two step parts sequentially protrude outwards along the direction, which is close to the substrate; or, the side walls of the parts, close to the substrate, of the first oxide semiconductor layers are recessed towards the direction away from the second oxide semiconductor layers to form the step structures, and the side walls of at least two step parts sequentially protrude outwards along the direction away from the substrate.
5. A pixel circuit for driving a pixel, the pixel circuit comprising the thin film transistor according to any one of claims 1 to 4.
6. A display panel comprising the pixel circuit of claim 5.
7. A method of manufacturing a thin film transistor, the method comprising:
providing a substrate;
forming an active layer over the substrate, the active layer including a first oxide semiconductor layer and a second oxide semiconductor layer located on a side of the first oxide semiconductor layer, the second oxide semiconductor layer being in contact with the first oxide semiconductor layer, and an oxygen content of the second oxide semiconductor layer being greater than an oxygen content of the first oxide semiconductor layer; the side part of the first oxide semiconductor layer is provided with a step structure, the side part of the second oxide semiconductor layer is provided with an abutting part matched with the step structure, and the abutting part abuts against the step structure.
8. The method of manufacturing a thin film transistor according to claim 7, wherein the forming an active layer on the substrate comprises:
forming a first oxide semiconductor layer on the substrate, wherein the side wall of the part of the first oxide semiconductor layer, which is away from the substrate, is inwards recessed to form a step structure;
and forming a second oxide semiconductor layer on the substrate, wherein an abutting part matched with the step structure is arranged on the side part of the second oxide semiconductor layer, and the abutting part abuts against the step structure.
9. The method of manufacturing a thin film transistor according to claim 7, wherein the forming an active layer on the substrate comprises:
forming a first oxide semiconductor layer on the substrate, wherein the side wall of a part of the first oxide semiconductor layer, which is close to the substrate, is inwards recessed to form a step structure;
forming the second oxide semiconductor layer on the substrate, wherein an abutting part matched with the step structure is arranged on the side part of the second oxide semiconductor layer, and the abutting part abuts against the step structure;
or alternatively, the process may be performed,
the forming an active layer on the substrate includes:
forming a second oxide semiconductor layer on the substrate, wherein a contact part is arranged at a side part of the second oxide semiconductor layer;
a first oxide semiconductor layer is formed on the substrate, and a side wall of a portion of the first oxide semiconductor layer close to the substrate is recessed inward to form a step structure so that the step structure is abutted to the abutting portion.
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