CN110853694A - Repair method for NAND flash memory defects - Google Patents

Abstract

The invention discloses a method for repairing NAND flash memory defects, which comprises the following steps: testing the NAND flash memory device to find all blocks and columns of the memory cells containing the defects, counting the number of the defects on the data rows and the data columns at the positions of the defects, and sequencing the defective blocks and the defective columns in sequence according to the number of the defects; the data rows and columns where the defects are located are replaced with redundancy according to the sequentially ordered list: repairing the defective column by using the redundant column, and writing the defective column into the flash memory as repair data so that the replacement is effective; the defective block is replaced by using the virtual redundant row, and then the address of the block corresponding to the defective block needs to be written into the flash memory, and the defective block is marked as a bad block. The method enables the repair algorithm of the NAND flash memory to be simpler, so that the whole process is more efficient, and the output of the test equipment is improved.

Description

Repair method for NAND flash memory defects

Technical Field

The invention relates to the field of NAND flash memory devices, in particular to a method for repairing defects of a NAND flash memory.

Background

There are three main types of defects of NAND flash memory: row defects, column defects, and scatter defects.

For a row defect, a block corresponding to the row is generally marked as a bad block;

replacing the column defects with redundant columns;

the scatter point defect is a main problem solved by the invention, because the column where the scatter point is located is replaced by the redundant column only, a good test result cannot be achieved, so that the chip is sieved (namely, the chip is tested to be invalid due to an unreasonable repair algorithm or test condition), and the yield is influenced.

In the prior art, a method and apparatus for defect repair in a NAND flash memory device, publication No.: CN105097045A, published: 2015-11-25, can solve this problem well. As shown in fig. 1, the number of defects on each row is counted first according to the row where the defect is located, block coverage of the current block is calculated (block coverage is the number of blocks to be repaired while the current block is completely repaired), and then block weight is calculated (block weight ═ the number of block coverage/defective columns), as shown in table 1. And then, repairing the block with large weight according to the total number of the redundant columns, repairing the block with the maximum weight firstly, counting the number of the residual redundant columns again, calculating the weight again, finally marking other defective rows as unrepairable when the redundancy is used up, and marking the blocks corresponding to the rows as bad blocks.

TABLE 1 weight method data statistics table

In general, the NAND flash memory has only redundant columns as columns for defect repair, and the defective data columns are replaced with the redundant columns, thereby improving the yield and reliability of the chip. However, the number of redundant columns cannot be too large, which wastes the area of the data storage area. Therefore, a reasonable redundant column is designed according to the capacity of the NAND flash memory in the design process. As moore's law increases, the number of defects in the NAND flash memory during the manufacturing process increases, and the number of redundant columns required increases.

The NAND flash memory repair method can solve the problems of high defect number and low yield caused by only using redundant column repair. However, in the case of a large number of defects or some extreme cases, the repair time is long by using the method, and the method cannot guarantee that the used resources are minimum.

Disclosure of Invention

In order to solve the problems in the prior art, the invention provides a method for repairing the defects of the NAND flash memory, which enables the repair algorithm of the NAND flash memory to be simpler, so that the whole process is more efficient, and the output of test equipment is improved.

In order to achieve the purpose, the invention adopts the following technical means:

a method for repairing NAND flash memory defects comprises the following steps:

firstly, the method comprises a virtual redundant row, wherein the virtual redundant row can replace the defect of the row direction in the row direction;

secondly, counting the number of the defects on the data rows and the data columns at the positions of the defects;

then, the defect number is sorted to obtain a sorted list, and the list comprises the code number of the defect block or the defect column and the number of the defects;

finally, the defective blocks and defective columns are replaced with redundancy through the list.

Optionally, the method comprises the following steps:

step S100: starting;

step S110: judging the number of defects;

step S110 is to determine whether the total number of defects is greater than the range in which the virtual redundant row and the redundant column can be repaired;

if the number of defects is larger than the repairable range, performing step S180;

if the number of defects is less than the repairable range, go to step S120;

step S120, defect statistics;

step S130, defect sorting;

step S140, judging column redundancy;

step S150, processing the defect exceeding the number of redundant columns;

step S160, judging a virtual redundant line;

step S170, repairable;

step S180, non-repairable;

judging whether the total defect number is larger than the range of the virtual redundant row and the redundant column which can be repaired:

if so, the repair is not possible; if not, the repair is judged to be repairable, and then the repair is carried out.

Optionally, in the step S110, the repairable range in the defect number judgment is: the product of the virtual redundant row and the redundant column.

Optionally, in the step S110, if the NAND flash memory has no defect, the chip is marked as a repaired chip without any following steps.

Optionally, in step S120, the defect is summarized as: respectively counting the number of defects by blocks and columns; the blocks may be understood as rows.

Optionally, the statistical defect number is: when the number of defects is equal, if a certain defective cell is counted as a defect on a row or a defect on a column, the defect on the column is preferably counted.

Optionally, the counted defective cells are not counted again at the next counting.

Optionally, the counted defective cells are not counted again at the next counting:

counting the defects on a certain column of a certain defective cell, and only counting the number of other defects of the row after the defect is removed in the next time of counting the row defects corresponding to the defect;

a certain defect is counted as a defect on a row, and when counting the number of defects on a column where the defect is located next time, only the number of other defects on the column from which the defect is removed is counted.

Optionally, the step S120 of counting defects further includes: the defect numbers obtained by block and column are counted again: firstly, counting the blocks or columns with the maximum defect number; then removing the defects on the block or the column; counting the next largest block or column again; until all the defects are counted.

Optionally, in step S130, the defect sequence is: and comprehensively sorting the blocks and columns counted in the step S120 according to the number of the defects.

Optionally, the comprehensive ranking is a priority of non-blocking and non-column, the block or column with the largest defect number is arranged at the top, redundancy is firstly allocated, and the blocks or columns with the largest defect number are arranged in sequence.

Optionally, in step S140, the column redundancy determination is: it is determined whether the number of defective columns exceeds the total redundant columns.

Optionally, the step S150 includes processing the defect exceeding the number of redundant columns: defective columns exceeding the number of redundant columns are counted as block defects.

Optionally, in step S160, the virtual redundant line is determined as: judging whether the number of the defect blocks exceeds a set virtual redundant line or not;

if the number of the defective blocks exceeds the set number of the virtual redundant lines, the step S180 is entered;

if the number of defective blocks does not exceed the set number of virtual redundant lines, the process proceeds to step S170.

Optionally, the step S170 may be modified as follows: the flag chip can be repaired by all redundancies including true column redundancies and virtual redundant rows.

Optionally, the step S180 may not be modified as follows: the chip is marked as not repairable and the repair method is ended.

Optionally, after step S170, the method further includes the following steps:

step S200, judging a redundant column;

step S210, counting the defects of the block;

step S220, sorting the defects of the blocks;

step S230, repairing the row defect by the redundant column;

and step S240, defect repair judgment.

Optionally, the step S200 determines that the redundant column is:

judging whether the redundant column is used up;

if the redundant column has been used up, go to step S250;

if there are remaining redundant columns, the number of remaining redundant columns is obtained.

Optionally, the number of remaining redundant columns is total redundant number-the number of redundant columns already used.

Optionally, in step S210, the block defects are summarized as:

the number of defects of those blocks repaired by the redundant row in the already derived repair scheme is counted again.

Optionally, the statistical process does not include the defect that has been repaired by the redundant column.

Optionally, in step S220, the block defect sequence is:

sorting the blocks that can be repaired using the remaining redundant columns in a small to large order;

blocks with more defects than the remaining redundant columns are retained, not sorted and subjected to subsequent steps.

Optionally, in step S230, the repairing the row defect by the redundant column is:

and repairing the row defect with the least defect number by using the residual redundant columns, and if the row defect can be completely repaired by the residual redundant columns, the row defect is not repaired by using the virtual redundant row any more, and the virtual redundant row is released.

Optionally, the step S240 determines that the line defect repair is:

starting from the block with the least defect number, judging whether the block can be completely replaced by the residual redundant columns;

if the number of defects in the block is more than the number of remaining redundant columns, it proceeds to step S250.

Compared with the prior art, the invention has the following advantages:

the repair method for the NAND flash memory defects provided by the invention counts the number of the defects on the data rows and the data columns at the positions of the defects by providing the concept of the virtual redundant rows according to the defect numberBy sorting sequentially, redundancy can be used to replace the defective blocks and defective columns from this list, and the NAND flash array can allocate redundancy using a reasonable algorithm based on the location of the defect. The method can obviously reduce the times of repairing the algorithm and reduce the testing time caused by calculation, thereby improving the testing efficiency. The prior art (e.g. weight method) requires and is more extreme

(n is the number of defective blocks) can get the final repair result, with the number of defective blocks increasing. The method of the invention needs m + n (m is the number of defective blocks and n is the number of defective columns) times to obtain reasonable repairing results. If m is equal to n, when the number of the defective blocks is more than 2, the invention can reduce the times of repairing algorithm, thereby improving the repairing efficiency.

The invention also provides an optimized secondary repairing step, on the basis of the repairing result, whether the residual redundant columns exist is judged, and the blocks finally replaced by the virtual redundant rows need to be marked as bad blocks, so that the capacity of a data storage area is reduced for a part of chips with slightly more bad blocks, the number of the bad blocks can be further reduced by reducing the use of the virtual redundant rows, the effective data storage space is increased, and the number of the bad blocks can be reduced.

Drawings

FIG. 1 is the result of a repair using the weightage method;

FIG. 2 is a schematic diagram of a NAND flash memory array;

FIG. 3 is a schematic diagram of a NAND flash memory array with dummy redundant rows;

FIG. 4 is a NAND flash repair flow diagram;

FIG. 5 is a two-dimensional diagram of a NAND flash memory defect;

6(a) -6 (f) are state diagrams of the results of repairing a defect in a NAND flash memory using a first method;

FIG. 7 is a flow chart of secondary optimized repair of a NAND flash;

fig. 8 is a result of repairing a defect in a NAND flash memory using the second method.

Detailed Description

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

The first purpose of the invention is to provide a method for repairing defects of a NAND flash memory, which comprises the following steps:

first, a concept of a virtual redundant row is proposed, which assumes that some extra rows in the row direction can be used to replace the defects in the row direction, so that the NAND flash memory array can use a reasonable algorithm to allocate redundancy according to the location of the defects.

Secondly, counting the number of the defects on the data rows and the data columns at the positions of the defects, sorting the defects from high to low, preferentially using the redundant columns for repairing if the number of the defects is the same, thus ensuring that the redundant columns are used to the maximum, removing the defects and counting other defects after determining that a defective block is replaced by one redundant row, thereby ensuring that the same defect is not repaired repeatedly and ensuring the repairing accuracy.

Then, after sorting, a set of lists is obtained, each item in the list containing two data: the code of the defect block or defect column and the number of defects.

Finally, redundancy can be used to replace the defective blocks and defective columns from this list. Finally, repairing the defective columns by using the redundant columns, wherein the replacement relation can be written into the flash memory as repair data to enable the replacement to be effective; for the defective block, for convenience of repair analysis, the defective block is replaced by using the virtual redundant row, and then the address of the block corresponding to the defective block needs to be written into the flash memory, and the defective block is marked as a bad block.

The method of the present invention is described in detail below with reference to specific embodiments and the accompanying drawings.

Example 1

FIG. 2 illustrates a conceptual layout of a NAND flash memory device of an embodiment of the present invention. As shown in fig. 2, it contains 2048 blocks (blocks) and 2240 columns (columns), which contain 2112 data columns and 128 redundant columns.

The NAND flash memory device includes 2048 data blocks, numbered 0, 1, 2, 3, …, 2047, each block including 64 pages. Each page includes 2240 columns including 2112 data columns and 128 redundant columns in which data is recorded. Each data column stores data in units of bytes using a storage cell. All of these data disclosed in the present embodiment are exemplary and not limited to these specific values.

FIG. 3 shows a schematic of a NAND flash memory array with added virtual redundant rows, comprising 2176 blocks (of 2048 data blocks and 128 redundant rows), and 2240 columns (columns, comprising 2112 data columns and 128 redundant columns).

Referring to fig. 4, a method for repairing defects in a NAND flash memory device according to an embodiment of the present disclosure is described. The method specifically comprises the following steps:

in steps S110 to S180, which is a first method of the present disclosure, a specific method is as follows:

step S100 starts:

in S100, the NAND flash memory device is tested to find all blocks and columns of memory cells containing defects, and the defective memory cells are denoted as "X", and a defective two-dimensional map is formed as shown in fig. 5, where the cell denoted as "X" means that there is a defective memory cell in a position determined by a block and a corresponding data column corresponding to the cell, and the number of the defective cells should be determined as at least one bit. It should be noted that for simplicity of description, a simplified device for a NAND flash memory is shown in the example of FIG. 5, where each block (i.e., rows 0-7 in FIG. 5) includes only 16 columns of data numbered hexadecimal from 0 to F and 5 redundant columns numbered 0 to 4.

In addition, the test should include a redundant column, and once a defective cell is found in the redundant column, the conditions of the subsequent sorting should be comprehensively considered, and if the subsequent current column sorting is allocated as column repair, the redundant column should be marked as an unavailable redundant column and is not counted in the subsequent process, that is, when the column repair is performed, the defective redundant column cannot be used for column repair.

If the defect in this redundant column is counted as a defect of a block, this redundant column can still be used to repair other defective columns.

Step S110, judging the number of defects:

the method specifically comprises the following steps: in step S110, it is determined whether the total number of defects is greater than the range in which the virtual redundant row and the redundant column can be repaired, and if the total number of defects is greater than the product of the two (the virtual redundant row and the redundant column), the method will directly jump to step S180, where the chip is represented as an unrepairable chip.

In addition, if the NAND flash memory has no defects, the chip is directly marked as a repaired chip without any steps, and the process is finished.

Step S120, defect statistics:

the method specifically comprises the following steps: the defect two-dimensional map is counted in step S120 to obtain the number of defects counted separately by block (here, a block is also understood to be a row) and by column. It should be noted that in the case of equal number of defects, if a certain defective cell is counted as a defect on both a row and a column, the statistical case as a defect on a column should be prioritized.

The counted defective cells are not counted again in the next counting, that is, once a certain defective cell is counted as a defect on a certain column, only the number of other defects after the defect is removed in the row should be counted next time when the row defect corresponding to the defect is counted.

If a certain defect is counted as a defect on a row, when counting the number of defects on the column where the defect is located later, only counting the number of other defects on the column where the defect is removed.

As shown in fig. 5, the flash memory device has 7 defective cells per block (e.g., row 0-row 6 in the figure) and 9 defective cells per column (e.g., column 0-column 7, column 9 in the figure).

According to the block statistics, the block statistics are obtained,

for block 0, its data columns 0, 1 contain defective cells;

for block 1, its data columns 2, 3, and 9 contain defective cells ….

According to the statistics of the columns,

for column 0, cells whose blocks 0, 3, and 5 are defective,

for column 1, block 0 has a defective cell ….

The number of defective cells in each block is shown on the right side of fig. 5 for that block, and the number of defective cells in each column is shown below that column.

According to step S120, the number of defects obtained by block and column respectively, as derived from fig. 5, is counted again:

firstly, counting the blocks or columns with the maximum defect number;

then removing the defects on the block or the column;

counting the next largest block or column again;

until all the defects are counted.

Step S130, defect sorting:

the method specifically comprises the following steps: and after the defect number statistics of the step S120 is completed, sorting of the step S130 is performed, and the blocks and the columns counted in the step S120 are comprehensively sorted according to the defect number.

It should be noted that the overall ordering, i.e. the priority of the non-partitioned blocks and columns, the block or column with the largest number of defects is arranged first, redundancy is allocated first, and the second largest is arranged in sequence.

Table 2 is a statistical table of the NAND flash memory defects shown in fig. 5 after comprehensive sorting, in which the first column indicates whether the position of the defect belongs to a block defect or a column defect, the second column indicates the number of the defects in the comprehensive sorting, and the third column indicates which redundancy should be used to replace the defect.

TABLE 2 comprehensive sorted repair statistics Table

Location of defect	Number of defects	Redundant position
			Line
3	4	Redundant row 0
			Column 2	3	Redundant column 0
Column 0	2	Redundant column 1
			Line 1	2	Redundant row 1
Line 4	2	Redundant row 2
			Column 1	1	Redundant column 2

Step S140 column redundancy judgment:

returning to FIG. 4, after step 130 is completed, step 140 is performed, in which it is determined whether the number of defective columns exceeds the total number of redundant columns.

Therefore, in the previous statistics, the statistics are performed in a column-first manner, and the statistics are preferentially performed as column defects for the defect number of 1, so if the column with the defect number of 1 is larger than the number of column redundancies, the excess part should be counted as block defects, and the defects are considered to be replaced by using the virtual redundant row.

Step S150 is to process the defect exceeding the number of redundant columns:

the method specifically comprises the following steps: defective columns exceeding the number of redundant columns are counted as block defects.

So once the number of defective columns in the statistics exceeds the redundant columns, the method proceeds to S150, and the column defects exceeding the redundant columns are counted as block defects.

It should be noted that the number of virtual redundant rows is also limited, theoretically to the maximum number of bad blocks allowed by the NAND flash memory, so that the column defect exceeding the number of redundant columns needs to be counted as a block defect to determine whether the number of defective blocks exceeds the set virtual redundant row.

Step S160 virtual redundant line judgment:

i.e. the method proceeds to step S160, if the number of defective blocks exceeds the set number of virtual redundant lines, the process proceeds directly to step S180.

Step S180 is not repairable

The chip is marked as non-repairable and the repair method is ended. If step S160 determines that the number of defective blocks is within the range of the virtual redundant lines, the method will proceed to step S170.

Step S170 repairable

The method specifically comprises the following steps: step S170 indicates that the chip can be repaired by all redundancies, including the true column redundancies and the virtual redundant rows.

The defective columns are replaced in order from high to low using the redundant columns and the defective blocks are replaced in order from high to low using the virtual redundant rows.

According to the statistics and sorting results in table 2, the first column indicates whether the defect is a block defect or a column defect, the block defect can only be replaced by a virtual redundant row, the column defect can only be replaced by a redundant column, and if a defect is a redundant column, it should be determined that the redundant column cannot be used to replace a data column.

Block defects will not be virtual redundant rows because these blocks will not be present during actual testing and therefore will not be of this type of defect.

This step starts with redundant row 0 replacing the defective block and simultaneously with redundant column 0 replacing the defective column, and then replaces the next defective block with redundant row 1 and the next defective column with redundant column 1 ….

The third column of table 2 shows the alternative procedure for this step and identifies the locations where specific redundancy is used. It should be noted that in this case, the defective column is written into the NAND flash memory using the correspondence of the redundant column replacement as a final repair scheme, and such replacement is actually effected after the flash memory is restarted again.

In addition, those defective blocks replaced with redundant rows are finally marked as bad blocks, the addresses of the bad blocks are written into the NAND flash memory, and it is ensured that users do not use the bad blocks.

In order to be able to better understand the overall method, the repair process of the above example will be briefly described below with reference to fig. 6, where "X" denotes a defective cell.

The alternative procedure for this step, which is shown in the table from the above step, i.e. in comparison with table 2 and the third column of table 2; rows 3, 1, 4 have 4, 2 defects, respectively, and finally these three blocks are replaced with virtual redundant rows 0, 1, 2, respectively; columns 2, 0, 1 have 3, 2, 1 defects, respectively, and the three columns are eventually replaced with redundant columns 0, 1, 2, respectively. And writing the corresponding relation of the replacement of the redundant columns as a final repair scheme into the NAND flash memory by using the defective columns, and really enabling the replacement to be effective after the flash memory is restarted again. Those defective blocks that are replaced with redundant rows are eventually marked as bad blocks, the addresses of the bad blocks are written into the NAND flash memory, and it is ensured that the user does not use the bad blocks.

According to a first solution, the total repair resources can be guaranteed to be minimal. The virtual redundant rows are added, and the comprehensive ordering and then the overall repair scheme is actually used for repairing as many defects as possible each time by using redundant resources in two directions. However, those blocks that are finally replaced by the virtual redundant lines need to be marked as bad blocks, so that the capacity of the data storage area is reduced when a little more bad blocks exist in a part of the chip, and therefore, the reduction of the use of the virtual redundant lines can further reduce the number of the bad blocks, thereby increasing the effective data storage space.

To this end, a second object of the present application is to propose a second solution, based on the first solution, which allows to reduce the number of bad blocks. The method comprises the following steps:

firstly, the method judges whether residual redundant columns exist on the basis of the repair result obtained by the first solution, then carries out statistics according to the number of the block defects replaced by the virtual redundant rows, and removes the defects replaced by the redundant columns during statistics to avoid repeated counting.

Then, the defective blocks having a defect number not greater than the remaining redundant columns are sorted in the order of the defect number from small to large (the smaller the number of defects of the block replaced with the virtual redundant row, the more wasteful it is to mark it as a bad block). And replacing the blocks with the least number of defects by using the residual redundant columns, recalculating the residual redundant columns after replacement, and counting the defect blocks with the residual number of defects not more than the residual redundant columns and sequencing if the residual redundant columns are not 0.

Thirdly, repairing the block with the minimum defect number by using the residual redundant columns, and if the block cannot be completely repaired, finishing; if the defect blocks can be completely repaired by the residual redundant columns, the next defect block with the defect number not more than the residual redundant columns is continuously replaced until the residual redundant columns are 0, the block with the minimum defect number cannot be repaired or the defect block with the defect number not more than the residual redundant columns is completely replaced.

Finally, repairing the defective column by using the redundant column, wherein the replacement relation can be written into the flash memory as repair data to enable the replacement to be effective; for the defective block, for convenience of repair analysis, the defective block is replaced by using the virtual redundant row, and then the address of the block corresponding to the defective block needs to be written into the flash memory, and the defective block is marked as a bad block.

The method of the present invention is described in detail below with reference to specific embodiments and the accompanying drawings.

Example 2

In steps S110 to S250, it is a second method of the present disclosure. After the repair scheme has been obtained by the method described above, the number of block defects is reduced by this method, i.e. the use of column redundancy is tried to replace the block defects.

Step S170 begins

Returning to fig. 7, in proceeding to step S170, a usable repair solution has been obtained, but the number of defective blocks is not minimal, which may result in some blocks being marked as bad blocks and thus wasted, which requires optimization of the results obtained by the first method.

Step S200 of determining redundant column

First, from step S170 to S200, it is determined whether the redundant columns are used up, that is, whether the number of remaining redundant columns is 0.

In this step, if the redundant column is already used up, it indicates that the repair result obtained by the first method cannot be optimized, and the process directly proceeds to step S250, and ends the process;

if there are remaining redundant columns, the number of remaining redundant columns is obtained, which is the total number of redundant columns-the number of redundant columns that have been used.

As shown in the third column of table 3, it should be determined that the number of remaining redundant columns is calculated in order to determine which redundant blocks can be repaired (a block having a defect number less than that of the remaining redundant columns among defective blocks can be repaired, and a defective block having more than that of the remaining redundant columns is not repairable), thereby reducing the number of times of optimization.

TABLE 3 optimized repair Defect statistics Table

Location of defect	Number of defects	Remaining column redundancy	Whether or not to repair
				Line 1	2	2	Repairable
Line
	4	2	2	Repairable
Line
	3	3	2	Can not be repaired

Table 4 optimized repair redundancy replacement table

Location of defect	Number of defects	Redundant position
			Column 3'	1	Redundant column 3
Column 9'	1	Redundant column 4
			Line 4'	2	Redundant row 1
Line 3'	3	Redundant row 0

Step S210 block defect statistics

The method then proceeds to step S210, which again counts the number of defects of those blocks of the resulting repair scheme that have been repaired by the redundant rows. It should be noted that since the number of defects may vary after each optimization in the blocks counted as block defects in the obtained repair scheme, the sorting result is directly affected. While removing those defects that have been repaired by the redundant columns in a statistical process.

Step S220 block defect sorting

The method proceeds to step S220, where those blocks that can be repaired using the remaining redundant columns are sorted in a small to large order, and those blocks with more defects than the remaining redundant columns should be retained first, not sorted and subjected to the subsequent optimization step. Sorting here it should be noted that sorting is only done according to the number of defects in the block defect, as shown in the second column of table 4, the first column shows the number of sorted blocks, from which it can be known that those blocks are completely replaced by the remaining redundant columns and those blocks are not completely repaired.

Step S230 redundant columns repair row defects

The method proceeds to step S230 and repairs the row defect with the least number of defects using the remaining redundant columns, which, once fully repaired by the remaining redundant columns, will no longer be repaired using the virtual redundant row, which should be released.

Step S240 line defect repair judgment

Finally, step S240 is performed, starting from the block with the least number of defects, to determine whether the block can be completely replaced by the remaining redundant columns, if the number of defects in the block is greater than the number of remaining redundant columns, it indicates that the block cannot be completely repaired by the remaining redundant columns, and when the method is finished, step S250 is performed.

If the number of defects in the defective block is less than the number of remaining redundant columns, all defects in the defective block should be first replaced with the remaining redundant columns, and then the number of remaining redundant columns should be recalculated, where the number of remaining redundant columns is the number of remaining redundant columns-the number of remaining columns used for replacement. After the number' of remaining redundant columns is calculated, steps S200 to S240 are repeated until the defective block cannot be completely replaced by the remaining redundant columns or the number of remaining redundant columns is 0.

In order to understand the detailed steps of the method, fig. 8 briefly describes the repair process of the second method, and "X" denotes a defective cell.

From the table from the above steps, columns 2, 0, 1 have 3, 1 defects, respectively, and the three columns are eventually replaced with redundant columns 0, 1, 2, respectively.

Rows 3, 1, 4 have 4, 2 defects, respectively, and finally these three blocks are replaced with virtual redundant rows 0, 1, 2, respectively;

the remaining 2 redundant columns, the defects replaced with redundant rows are counted again,

rows 1, 4, 3 have 2, 3 defects, respectively, with row 3 marked as non-repairable, and the remaining two redundant columns replacing two defects on row 1, i.e., redundant column 3 replacing a defect on column 3 and redundant column 4 replacing a defect on column 9. The redundant column remaining after the replacement is 0, and the replacement by the second method is ended.

The final repair result is that columns 2, 0, 1, 3, 9 replace the five columns with redundant columns 0, 1, 2, 3, 4, respectively, rows 4, 3 have 2, 3 defects, respectively, and finally the two blocks are replaced with virtual redundant rows 0, 1, respectively.

The second method reduces 1 bad block compared to the first method. The area of data storage is effectively increased. And then writing the corresponding relation of the replacement of the defective columns by using the redundant columns as a final repair scheme into the NAND flash memory, and really enabling the replacement to be effective after the flash memory is restarted again. Those defective blocks that are replaced with redundant rows are eventually marked as bad blocks, the addresses of the bad blocks are written into the NAND flash memory, and it is ensured that the user does not use the bad blocks.

Although specific embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the specific embodiments described above, which are intended to be illustrative, instructive, and not restrictive. Those skilled in the art, having the benefit of this disclosure, may effect numerous modifications thereto without departing from the scope of the invention as defined by the appended claims.

Claims (10)

1. A method for repairing a defect of a NAND flash memory is characterized by comprising the following steps:

firstly, the method comprises a virtual redundant row, wherein the virtual redundant row can replace the defect of the row direction in the row direction;

secondly, counting the number of the defects on the data rows and the data columns at the positions of the defects;

then, the defect number is sorted to obtain a sorted list, and the list comprises the code number of the defect block or the defect column and the number of the defects;

finally, the defective blocks and defective columns are replaced with redundancy through the list.

2. The method of claim 1, wherein the method comprises the steps of:

step S100: starting;

step S110: judging the number of defects;

step S110 is to determine whether the total number of defects is greater than the range in which the virtual redundant row and the redundant column can be repaired;

if the number of defects is larger than the repairable range, performing step S180;

if the number of defects is less than the repairable range, go to step S120;

step S120, defect statistics;

step S130, defect sorting;

step S140, judging column redundancy;

step S150, processing the defect exceeding the number of redundant columns;

step S160, judging a virtual redundant line;

step S170, repairable;

step S180, non-repairable;

judging whether the total defect number is larger than the range of the virtual redundant row and the redundant column which can be repaired:

if so, the repair is not possible; if not, the repair is judged to be repairable, and then the repair is carried out.

3. The method of claim 2, wherein the step of repairing the NAND flash memory defect comprises the steps of: step S120 the defect is summarized as: respectively counting the number of defects by blocks and columns; the blocks may be understood as rows.

4. The method of repairing a defect in a NAND flash memory according to claim 3, wherein: the step S120 of defect statistics further includes: the defect numbers obtained by block and column are counted again: firstly, counting the blocks or columns with the maximum defect number; then removing the defects on the block or the column; counting the next largest block or column again; until all the defects are counted.

5. The method of claim 2, wherein the step of repairing the NAND flash memory defect comprises the steps of: the defect sorting in step S130 is: and comprehensively sorting the blocks and columns counted in the step S120 according to the number of the defects.

6. The method of claim 5, wherein the step of repairing the NAND flash memory defect comprises the steps of: the comprehensive sequencing is the priority of non-partitioned blocks and columns, the block or column with the largest defect number is arranged at the top, redundancy is distributed at first, and the blocks or columns with the largest defect number are arranged in sequence.

7. The method of claim 2, wherein the step of repairing the NAND flash memory defect comprises the steps of: the method further comprises the following steps after step S170:

step S200, judging a redundant column;

step S210, counting the defects of the block;

step S220, sorting the defects of the blocks;

step S230, repairing the row defect by the redundant column;

and step S240, defect repair judgment.

8. The method of claim 7, wherein the step of repairing the NAND flash memory defect comprises the steps of: the step S200 determines that the redundant column is:

judging whether the redundant column is used up;

if the redundant column has been used up, go to step S250;

if there are remaining redundant columns, the number of remaining redundant columns is obtained.

9. The method of claim 8, wherein the step of repairing the NAND flash memory defect comprises the steps of: the step S220 is to sort the defects of the blocks as follows:

sorting the blocks that can be repaired using the remaining redundant columns in a small to large order;

blocks with more defects than the remaining redundant columns are retained, not sorted and subjected to subsequent steps.

10. The method of claim 8, wherein the step of repairing the NAND flash memory defect comprises the steps of: the step S230 of repairing the row defect by the redundant column is:

and repairing the row defect with the least defect number by using the residual redundant columns, and if the row defect can be completely repaired by the residual redundant columns, the row defect is not repaired by using the virtual redundant row any more, and the virtual redundant row is released.

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