CN110853225A - Circuit for solving power-on jitter of MCU IO level signal and electronic payment self-service equipment - Google Patents
Circuit for solving power-on jitter of MCU IO level signal and electronic payment self-service equipment Download PDFInfo
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- CN110853225A CN110853225A CN201911062050.1A CN201911062050A CN110853225A CN 110853225 A CN110853225 A CN 110853225A CN 201911062050 A CN201911062050 A CN 201911062050A CN 110853225 A CN110853225 A CN 110853225A
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- circuit
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- jitter
- communication module
- electronic switch
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F5/00—Coin-actuated mechanisms; Interlocks
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- G—PHYSICS
- G07—CHECKING-DEVICES
- G07F—COIN-FREED OR LIKE APPARATUS
- G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/10—Current supply arrangements
Abstract
The invention discloses a circuit for solving the problem of power-on jitter of an MCU IO level signal, which comprises a communication module and an electronic switch anti-jitter circuit, wherein the communication module is connected with the electronic switch anti-jitter circuit. The electronic switch anti-shake circuit is connected with the OPENPC version communication module, so that IO level shake during starting is avoided, and the technical problem of false triggering and upward separation of self-service equipment is solved. The embodiment of the invention also provides electronic payment self-service equipment. Through the embodiment of the invention, the communication module does not need to be externally connected with an external processor, has simple structure and low cost and has good market competitiveness.
Description
Technical Field
The invention relates to a communication power supply circuit, in particular to a circuit for solving the problem of MCU startup signal level jitter.
Background
With the rapid development of internet technology, electronic payment technology is more and more popular, and self-service equipment serving as an electronic payment terminal gradually enters the lives of people. The existing electronic payment self-service equipment judges the amount of payment of a user according to the number of received pulses. The self-service equipment adopts a code scanning or coin inserting mode for payment, the payment box can output a low-level pulse or a high-level pulse to a main board of the self-service equipment after the payment is successful, and the self-service equipment judges the amount of money paid by a user according to the received pulse quantity.
As shown in fig. 1, the traditional payment box hardware adopts a mode of a single chip microcomputer and a communication module, the box receives a coin inserting pulse of a coin inserting device or a dividing instruction issued by a server, and the output level of the single chip microcomputer IO controls a triode to be pulled up or pulled down to output the pulse to a main board of the self-service equipment. The advantage of this circuit is stability. The disadvantages are that: the scheme of the single chip microcomputer and the standard communication module adopts a plurality of devices, large occupied space of the chip, high cost and the like.
The communication module has a standard version and an OPENPU version. The standard version uses standard AT command communication and is not secondarily developed. OPENCPU is an application that uses a module as a main processor. The OPENPU version communication module can be developed for the second time, has programmable IO (input/output), does not need an external processor, saves chip cost by 40%, and can shorten the product development period and reduce the product power consumption. However, the problem that the starting time is long and the IO level is unstable during the starting exists in the system running on the OPENPCPU version communication module. IO level shakes during the boot-strap period, the self-service equipment catches the shake signal and can trigger the upper branch by mistake. The problem of false triggering of the upper branch is not solved, and the OPENPC version communication module can not be switched into the payment box in a single-chip solution mode.
Disclosure of Invention
The invention mainly aims to solve the problem of false triggering and upscoring caused by unstable IO level during the power-on period of the OPENPC version communication module in the application of the payment box.
In order to achieve the purpose, the invention adopts the following technical scheme:
a circuit for solving power-on jitter of an MCU IO level signal comprises a communication module and an electronic switch anti-jitter circuit, wherein the communication module is connected with the electronic switch anti-jitter circuit and is characterized in that the communication module comprises a communication module U1, a resistor R1, a resistor R2, a resistor R3 and a triode Q1, the COIN _ CONTROL of U1 is connected with a first end of R2, a second end of R2 is respectively connected with a first end of R3 and a base of Q1, an emitter of Q1 and a second end of R3 are grounded, a collector of Q1 is respectively connected with a first end of R1 and a DET _ EN end, and a second end of R1 is connected with a power supply end VDD;
the electronic switch anti-shake circuit comprises electronic switch chips U2, U3, resistors R4, R5, R6, R7, a capacitor C1, a triode Q2, a toggle switch S1, a pin 1 of U3 is connected with a DET _ EN end, a pin 2 is connected with a COIN _ OUT end of U1, a pin 3 is grounded, a pin 4 is respectively connected with a pin 2 of the toggle switches S1 and U2 and a first end of R6, and a pin 5 is respectively connected with a power supply end VDD and a first end of R4; the second end of R4 and the first end of R7 are respectively connected with a toggle switch S1; a pin 1 of the U2 is connected with a COIN _ CONTROL end of the U1, a pin 3 is grounded, a pin 4 is connected with a MODE _ DET end, and a pin 5 is respectively connected with a first end of a C1 and second ends of power supply ends VDD and C1 are grounded; the second end of R6 is connected with the base of Q2, the emitter of Q2 is grounded, the collector of Q2 is connected with the first end of R5 and the 2 feet of machine interface H1; the second terminal of R5 and pin 1 of the machine interface H1 are connected to the power source VCC, and pin 3 of the machine interface H1 is connected to ground.
Furthermore, the communication module is an OPENPU version communication module;
furthermore, the model of the electronic switch chip is SN74LVC1G125 DBVR.
The second aspect of the embodiment of the invention provides electronic payment self-service equipment, which comprises the MCU IO level signal power-on jitter circuit and a self-service equipment mainboard, wherein the electronic switch anti-jitter circuit is connected with the self-service equipment mainboard through a machine interface.
Compared with the prior art, the invention has the following beneficial effects:
1. the problem of the application of the OPENPU scheme in the payment box is solved. IO level jitter during the start-up period is avoided by arranging the electronic switch anti-jitter circuit, and the technical problem of false triggering and up-scoring is solved.
2. External processors, memory and discrete and associated design costs are saved. Compared with the prior art that the singlechip is used for outputting the level pulse signal, the technical scheme of the invention can omit the singlechip and does not need to be externally connected with an external processor, the cost of the anti-shake circuit is less than 10 percent of that of the external processor, and the development cost is greatly reduced.
3. Reducing the physical size of the end product. The invention only needs to arrange the anti-shake circuit on the communication module, does not need to be externally connected with an external processor, has simple structure and can reduce the actual size of the terminal product
4. And the power consumption of the product is reduced. Because the singlechip is saved, an external processor is not needed, and the power consumption of the product is greatly reduced.
5. The embedded application of the payment box product is rapidly developed, and the product development period is shortened.
6. Improve the market cost performance of the product and improve the competitiveness of the product. The product of the invention has good cost performance and market competitiveness due to simple structure and low cost.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a schematic block diagram of a conventional payment box arrangement;
FIG. 2 is a schematic block diagram of an OPENPU version communication module scheme;
FIG. 3 is a circuit diagram of an electronic switch anti-shake circuit;
FIG. 4 is a truth table of the SN74LVC1G125 DBVR.
Detailed Description
Various embodiments of the present disclosure will be described more fully hereinafter. The present disclosure is capable of various embodiments and of modifications and variations therein. However, it should be understood that: there is no intention to limit the various embodiments of the disclosure to the specific embodiments disclosed herein, but rather, the disclosure is to cover all modifications, equivalents, and/or alternatives falling within the spirit and scope of the various embodiments of the disclosure.
Example 1
The embodiment 1 of the invention provides a circuit for solving power-on jitter of an MCU IO level signal, which comprises a communication module and an electronic switch anti-jitter circuit, wherein the communication module is connected with the electronic switch anti-jitter circuit, and is characterized in that the communication module comprises a communication module U1, a resistor R1, a resistor R2, a resistor R3 and a triode Q1, the COIN _ CONTROL of U1 is connected with a first end of R2, a second end of R2 is respectively connected with a first end of R3 and a base of Q1, an emitter of Q1 and a second end of R3 are grounded, a collector of Q1 is respectively connected with a first end of R1 and a DET _ EN end, and a second end of R1 is connected with a power supply end VDD;
the electronic switch anti-shake circuit comprises electronic switch chips U2, U3, resistors R4, R5, R6, R7, a capacitor C1, a triode Q2, a toggle switch S1, a pin 1 of U3 is connected with a DET _ EN end, a pin 2 is connected with a COIN _ OUT end of U1, a pin 3 is grounded, a pin 4 is respectively connected with a pin 2 of the toggle switches S1 and U2 and a first end of R6, and a pin 5 is respectively connected with a power supply end VDD and a first end of R4; the second end of R4 and the first end of R7 are respectively connected with a toggle switch S1; a pin 1 of the U2 is connected with a COIN _ CONTROL end of the U1, a pin 3 is grounded, a pin 4 is connected with a MODE _ DET end, and a pin 5 is respectively connected with a first end of a C1 and second ends of power supply ends VDD and C1 are grounded; the second end of R6 is connected with the base of Q2, the emitter of Q2 is grounded, the collector of Q2 is connected with the first end of R5 and the 2 feet of machine interface H1; the second terminal of R5 and pin 1 of the machine interface H1 are connected to the power source VCC, and pin 3 of the machine interface H1 is connected to ground.
Furthermore, the communication module is an OPENPU version communication module.
Furthermore, the model of the electronic switch chip is SN74LVC1G125 DBVR.
The electronic switch anti-shake circuit shown in fig. 3 is a practical application of OPENCPU communication module scheme. U1 is an OPENPUs version communication module, only 4 of which are identified. U2 and U3 are electronic switch chips SN74LVC1G125DBVR, the truth table of which is shown in FIG. 4. S1 is a toggle switch for setting the pulse output to be either high pulse active or low pulse active at initialization. H1 is a machine interface, and the pulse signal is output to the mainboard of the self-service equipment.
The operation of the electronic switch anti-shake circuit is described in detail as a specific example:
before the device is powered up, the toggle switch S1 is toggled down (taking the low level pulse active as an example). When the power is just powered on, the IO level is not stable during the startup period of the OPENPCPU. MODE _ IN is pulled down to GND through the 47K resistor of the toggle switch, low, Q2 is off, and the PULSE output signal PULSE _ OUT pulls up 100K resistor to 12V by default. After the OPENPCPU is started successfully, the IO pin COIN _ CONTROL is pulled low, the U2 electronic switch chip is enabled, and the pins 2 and 4 of the U2 are conducted. Meanwhile, Q1 is cut off, DET _ EN is pulled up by 10K to 3.3V, the U3 enable pin is pulled high, and the U3 switch chip is turned off. The OPEN CPU reads the MODE _ IN signal as low level through the MODE _ IN pin, and configures the output of the machine interface pulse signal as low level pulse effective. That is, by pulling the COIN _ CONTROL and DET _ EN signals high, U2 is turned off, U3 is enabled, and the IO pin COIN _ OUT outputs low to MODE _ IN by default.
When receiving the divide-up command, the COIN _ OUT pin of the OPENPU outputs a high level pulse, and the machine interface outputs a low level pulse through Q2 inversion. And the self-service equipment mainboard receives the low-level pulse, and the upper division is successful.
Example 2
The embodiment 2 of the invention provides electronic payment self-service equipment, which comprises the MCU IO level signal power-on jitter circuit and a self-service equipment mainboard, wherein the electronic switch anti-jitter circuit is connected with the self-service equipment mainboard through a machine interface.
The foregoing is directed to the preferred embodiment of the present invention and is not intended to limit the invention to the specific embodiment described. It will be apparent to those skilled in the art that various modifications, equivalents, improvements and the like can be made without departing from the spirit of the invention, and these are intended to be included within the scope of the invention.
Claims (6)
1. A circuit for solving power-on jitter of an MCU IO level signal comprises a communication module and an electronic switch anti-jitter circuit, wherein the communication module is connected with the electronic switch anti-jitter circuit and is characterized in that the communication module comprises a communication module U1, a resistor R1, a resistor R2, a resistor R3 and a triode Q1, the COIN _ CONTROL of U1 is connected with a first end of R2, a second end of R2 is respectively connected with a first end of R3 and a base of Q1, an emitter of Q1 and a second end of R3 are grounded, a collector of Q1 is respectively connected with a first end of R1 and a DET _ EN end, and a second end of R1 is connected with a power supply end VDD;
the electronic switch anti-shake circuit comprises electronic switch chips U2, U3, resistors R4, R5, R6, R7, a capacitor C1, a triode Q2, a toggle switch S1, a pin 1 of U3 is connected with a DET _ EN end, a pin 2 is connected with a COIN _ OUT end of U1, a pin 3 is grounded, a pin 4 is respectively connected with a pin 2 of the toggle switches S1 and U2 and a first end of R6, and a pin 5 is respectively connected with a power supply end VDD and a first end of R4; the second end of R4 and the first end of R7 are respectively connected with a toggle switch S1; a pin 1 of the U2 is connected with a COIN _ CONTROL end of the U1, a pin 3 is grounded, a pin 4 is connected with a MODE _ DET end, and a pin 5 is respectively connected with a first end of a C1 and second ends of power supply ends VDD and C1 are grounded; the second end of R6 is connected with the base of Q2, the emitter of Q2 is grounded, the collector of Q2 is connected with the first end of R5 and the 2 feet of machine interface H1; the second terminal of R5 and pin 1 of the machine interface H1 are connected to the power source VCC, and pin 3 of the machine interface H1 is connected to ground.
2. The circuit for resolving power-on jitter of an IO level signal of an MCU of claim 1, wherein the communication module is an OPENCPU version communication module.
3. The circuit for resolving power-on jitter of MCU IO level signal as claimed in claim 1, wherein said electronic switch chip is model SN74LVC1G125 DBVR.
4. An electronic payment self-service device, comprising the circuit for solving the electrical jitter problem of the MCU IO level signal and the self-service device mainboard as claimed in claim 1, wherein the electronic switch anti-jitter circuit is connected with the self-service device mainboard through a machine interface.
5. The circuit for resolving power-on jitter of IO level signal of MCU of claim 4, wherein said communication module is OPENPU version communication module.
6. The circuit for resolving power-on jitter of MCU IO level signal as claimed in claim 4, wherein said electronic switch chip is model SN74LVC1G125 DBVR.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911062050.1A CN110853225B (en) | 2019-11-01 | 2019-11-01 | Circuit for solving power-on jitter of MCU IO level signal and electronic payment self-service equipment |
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| CN201911062050.1A CN110853225B (en) | 2019-11-01 | 2019-11-01 | Circuit for solving power-on jitter of MCU IO level signal and electronic payment self-service equipment |
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Cited By (1)
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| CN113781720A (en) * | 2021-09-13 | 2021-12-10 | 深圳市乐唯科技开发有限公司 | De-jitter circuit and self-service payment equipment |
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Address after: 511400 Room 301, building 5, No. 28, Qinglan street, Xiaoguwei street, Panyu District, Guangzhou, Guangdong Province Patentee after: Guangdong Xingyun Kaiwu Technology Co.,Ltd. Address before: 511400 b213-10, 22 zhongerheng Road, Xiaoguwei street, Panyu District, Guangzhou City, Guangdong Province Patentee before: GUANGZHOU LEYAOYAO INFORMATION TECHNOLOGY Co.,Ltd. |