CN110850921A - Programmable reference voltage source based on charge injection and chip - Google Patents

Programmable reference voltage source based on charge injection and chip Download PDF

Info

Publication number
CN110850921A
CN110850921A CN201911294039.8A CN201911294039A CN110850921A CN 110850921 A CN110850921 A CN 110850921A CN 201911294039 A CN201911294039 A CN 201911294039A CN 110850921 A CN110850921 A CN 110850921A
Authority
CN
China
Prior art keywords
reference voltage
source
control circuit
coupled
logic control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201911294039.8A
Other languages
Chinese (zh)
Inventor
乔东海
汪征
朱军辉
吴宇航
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Ji Ju Micro Automation System And Equipment Technology Research Institute Co Ltd
Original Assignee
Jiangsu Ji Ju Micro Automation System And Equipment Technology Research Institute Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Ji Ju Micro Automation System And Equipment Technology Research Institute Co Ltd filed Critical Jiangsu Ji Ju Micro Automation System And Equipment Technology Research Institute Co Ltd
Priority to CN201911294039.8A priority Critical patent/CN110850921A/en
Publication of CN110850921A publication Critical patent/CN110850921A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/461Regulating voltage or current wherein the variable actually regulated by the final control device is dc using an operational amplifier as final control device
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Read Only Memory (AREA)

Abstract

The invention discloses a programmable reference voltage source and a chip based on charge injection, which comprises: the storage unit is provided with a drain D, a source S, a control gate Gc and a floating gate, wherein the control gate Gc is used for controlling writing and reading, the floating gate is used for storing injected charges for a long time, the drain D is coupled to the logic control circuit through a lead-out bit line and is also coupled to the positive input end of the operational amplifier, the output end of the operational amplifier is a reference voltage output end, the source S is coupled to a source Vss, the source Vss is coupled to the logic control circuit, the control gate Gc is coupled to the logic control circuit through a lead-out word line, and the logic control circuit adjusts the reference voltage by adjusting the charge amount stored in the floating gate. The programmable reference voltage source based on charge injection has low power consumption, simple structure and high integration level, and can change the size of the reference voltage.

Description

Programmable reference voltage source based on charge injection and chip
Technical Field
The invention relates to the technical field of integrated circuit chips, in particular to a programmable reference voltage source based on charge injection and a chip.
Background
Reference voltage sources are a very important module in modern integrated circuits, which are widely used in analog, digital and mixed signal systems on chip. The voltage regulator can provide nearly constant voltage for analog-to-digital conversion and digital-to-analog conversion circuits, and can also be used as a direct current voltage regulator of a plurality of small and medium-sized sensors.
The conventional bandgap reference voltage source circuit has the following disadvantages: 1. the circuit itself consumes a relatively large amount of dc power, and is not suitable for use in a low-power system on a chip. 2. The reference voltage generated by the conventional reference source is usually fixed and cannot be modified in real time according to the actual requirements of the circuit. 3. The collector current of a bipolar transistor used in the circuit and the offset voltage of an operational amplifier change along with the change of temperature, so that the temperature coefficient of the reference voltage is poor.
Disclosure of Invention
In view of the deficiencies of the prior art, an object of the present invention is to provide an adjustable charge injection-based programmable reference voltage source with reasonable structure and low power consumption. The technical scheme is as follows:
a charge injection based programmable reference voltage source, comprising: the storage unit is provided with a drain D, a source S, a control gate Gc and a floating gate, wherein the control gate Gc is used for controlling writing and reading, the floating gate is used for storing injected charges for a long time, the drain D is coupled to a logic control circuit through a lead-out bit line and is also coupled to a positive input end of the operational amplifier, the output end of the operational amplifier is a reference voltage output end, the source S is coupled to a source Vss, the source Vss is coupled to the logic control circuit, the control gate Gc is coupled to the logic control circuit through a lead-out word line, and the logic control circuit adjusts the reference voltage by adjusting the amount of charges stored in the floating gate.
As a further improvement of the present invention, the drain D is coupled to the positive input of the operational amplifier through a switch.
As a further improvement of the present invention, the logic control circuit may apply a positive voltage to the drain D through the bit line, and apply a positive pulse to the control gate Gc to charge the floating gate.
As a further improvement of the present invention, the logic control circuit may apply a positive pulse on the source Vss so that a tunneling effect is generated at an overlapping portion between the floating gate and the source S, and charges on the floating gate are discharged through a tunnel region, thereby reducing a reference voltage.
As a further improvement of the present invention, the logic control circuit can adjust the amplitude and width of the positive pulse applied to the control gate Gc.
The second objective of the present invention is to provide a chip, which includes the above-mentioned programmable reference voltage source based on charge injection.
The invention has the beneficial effects that:
the programmable reference voltage source based on charge injection has low power consumption, so that the programmable reference voltage source can be applied to a low-power-consumption system. The programmable function is added, so that the magnitude of the reference voltage can be changed by programming even after the circuit works normally. The programming and erasing operations of the flash memory do not need to use a programmer, a control circuit for storing and releasing charges is integrated in a memory chip, and the memory unit has the advantages of simple structure, high integration level and low cost.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a circuit diagram of a programmable reference voltage source based on charge injection according to an embodiment of the present invention.
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
Example one
As shown in fig. 1, a charge injection based programmable reference voltage source according to a first embodiment of the present invention includes: at least one single-stacked-gate structure memory unit (stacked mos tube) of the flash memory, an operational amplifier Opamp and a logic control circuit. Since logic control circuits are within the prior art, they are omitted from fig. 1 in order to simplify the drawing.
The storage unit is provided with a drain D, a source S, a control gate Gc and a floating gate, wherein the control gate Gc is used for controlling writing and reading, the floating gate is used for storing injected charges for a long time, the drain D is coupled to a logic control circuit through a drawn bit line and is also coupled to a positive input end of an operational amplifier Opamp, the output end of the operational amplifier Opamp is a reference voltage Vref output end, the source S is coupled to a source Vss, the source Vss is coupled to a logic control circuit, the control gate Gc is coupled to the logic control circuit through a drawn word line, and the logic control circuit adjusts the reference voltage Vref by adjusting the charge quantity stored in the floating gate.
In this embodiment, the drain D is coupled to the positive input of the operational amplifier Opamp through the switch S0.
The logic control circuit can apply positive voltage to the drain D through the bit line and apply positive pulse to the control gate Gc to charge the floating gate.
Wherein the logic control circuit may apply a positive pulse on the source Vss so that a tunneling effect is generated at an overlapping portion between the floating gate and the source S, and charges on the floating gate are discharged through the tunnel region, thereby reducing the reference voltage.
Wherein the logic control circuit can adjust the amplitude and width of the positive pulse applied on the control gate Gc.
The working flow of the reference voltage source is as follows:
the logic control circuit controls switch S0 to open and apply a high positive voltage to drain D via the bit line, while applying a large positive pulse (the specific value is determined by the device characteristics) to control gate Gc and controlling source Vss to be at 0. At this time, avalanche breakdown will occur between the drain and the source D, a part of electrons with higher speed will pass through the oxide layer to reach the floating gate and be captured by the floating gate to form injected charges, after the floating gate is charged, the turn-on voltage of the gate stack mos transistor will become very high, and the word line will not be conducted when it is at normal logic high level.
After the charge is injected, the word line gives a logic high level to the control gate Gc through the logic control circuit, the source Vss is still connected to the 0 level, the bit line does not perform any operation, and the injected charge passes through the switch S0 in the form of a drain voltage, and then the voltage is amplified to the required reference voltage Vref through the operational amplifier Opamp.
This is achieved by the logic control circuit adjusting the amplitude and width of the positive pulse (i.e. the magnitude and duration of the positive voltage) applied to the control gate Gc if the magnitude of the output reference voltage Vref needs to be adjusted, and by releasing the stored charge to reduce the voltage if the reference voltage is greater than the desired value. Specifically, the method comprises the following steps: when the control gate Gc is set to 0 level and a positive pulse with a large amplitude is applied to the source Vss, a tunnel effect is generated in a very small overlapping portion between the floating gate and the source S, and charges on the floating gate are discharged through the tunnel region, thereby reducing the voltage.
The number of injected and released charges is controlled by the logic control circuit, so that the reference voltage is accurately regulated and controlled.
In another embodiment of the present invention, the number of the memory cells is plural, and the plural memory cells constitute a memory array.
In another embodiment of the present invention, the Opamp portion of the operational amplifier may function differently according to the specific requirements of the circuit, such as forming an in-phase amplifier circuit or an inverting amplifier circuit.
Example two
A chip comprising the charge injection based programmable reference voltage source of the first embodiment.
The programmable reference voltage source based on charge injection has low power consumption, so that the programmable reference voltage source can be applied to a low-power-consumption system. The programmable function is added, so that the magnitude of the reference voltage can be changed by programming even after the circuit works normally. The programming and erasing operations of the flash memory do not need to use a programmer, a control circuit for storing and releasing charges is integrated in a memory chip, and the memory unit has the advantages of simple structure, high integration level and low cost.
The above embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitution or change made by the technical personnel in the technical field on the basis of the invention is all within the protection scope of the invention. The protection scope of the invention is subject to the claims.

Claims (6)

1. A charge injection based programmable reference voltage source, comprising: the storage unit is provided with a drain D, a source S, a control gate Gc and a floating gate, wherein the control gate Gc is used for controlling writing and reading, the floating gate is used for storing injected charges for a long time, the drain D is coupled to a logic control circuit through a lead-out bit line and is also coupled to a positive input end of the operational amplifier, the output end of the operational amplifier is a reference voltage output end, the source S is coupled to a source Vss, the source Vss is coupled to the logic control circuit, the control gate Gc is coupled to the logic control circuit through a lead-out word line, and the logic control circuit adjusts the reference voltage by adjusting the amount of charges stored in the floating gate.
2. The charge injection based programmable reference voltage source of claim 1, wherein the drain D is coupled to a positive input of the operational amplifier through a switch.
3. The charge injection based programmable reference voltage source of claim 1 wherein said logic control circuit applies a positive voltage to said drain D via the bit line and applies a positive pulse on the control gate Gc to charge said floating gate.
4. The charge injection based programmable reference voltage source of claim 1 wherein the logic control circuit applies a positive pulse on the source Vss such that a tunneling effect is created at the overlap between the floating gate and source S, and charge on the floating gate is discharged through a tunnel region, thereby reducing the reference voltage.
5. The charge injection based programmable reference voltage source of claim 1 wherein said logic control circuit adjusts the amplitude and width of a positive pulse applied on said control gate Gc.
6. A chip comprising a charge injection based programmable reference voltage source according to any of claims 1-5.
CN201911294039.8A 2019-12-16 2019-12-16 Programmable reference voltage source based on charge injection and chip Pending CN110850921A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911294039.8A CN110850921A (en) 2019-12-16 2019-12-16 Programmable reference voltage source based on charge injection and chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911294039.8A CN110850921A (en) 2019-12-16 2019-12-16 Programmable reference voltage source based on charge injection and chip

Publications (1)

Publication Number Publication Date
CN110850921A true CN110850921A (en) 2020-02-28

Family

ID=69609358

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911294039.8A Pending CN110850921A (en) 2019-12-16 2019-12-16 Programmable reference voltage source based on charge injection and chip

Country Status (1)

Country Link
CN (1) CN110850921A (en)

Similar Documents

Publication Publication Date Title
KR100427739B1 (en) Power voltage supplying circuit and semiconductor memory including the same
TWI305919B (en) Negative voltage discharge scheme to improve snapback in a non-volatile memory
US7825698B2 (en) Method and apparatus for systematic and random variation and mismatch compensation for multilevel flash memory operation
EP0525679A2 (en) Writing control circuit employed in non-volatile semiconductor memory device
US10079066B2 (en) Booster circuit capable of reducing noise in an output voltage generated thereby
US10216242B2 (en) Power sequencing for embedded flash memory devices
US8064263B2 (en) Current sink system for source-side sensing
JP2003500882A (en) High voltage withstand voltage transistor circuit
CN103236789A (en) Charge pump output voltage regulating circuit and storage device
US9054683B2 (en) Boosting circuit
CN103562999A (en) Devices and systems including enabling circuits
CN103824597B (en) The reading circuit and read method of memory, memory cell
US6751125B2 (en) Gate voltage reduction in a memory read
CN101650971B (en) Non-volatile semiconductor memory circuit
CN210776356U (en) Programmable reference voltage source based on charge injection and chip
CN110850921A (en) Programmable reference voltage source based on charge injection and chip
CN103811062B (en) Memory and reading method of memory
US6535427B1 (en) Nonvolatile semiconductor memory device with initialization circuit and control method thereof
CN104020807B (en) Sense amplifier voltage regulator
JP2001229686A (en) Non-volatile semiconductor memory device
US6747900B1 (en) Memory circuit arrangement for programming a memory cell
CN114429779A (en) Word line voltage generating circuit and memory
KR100376262B1 (en) Regulation circuit for bitline voltage
CN106875964B (en) sensitive amplifier clamping circuit with feedback function
US20110286281A1 (en) Reference current generator used for programming and erasing of non-volatile memory

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination