CN110838283A - TTS-based operation display terminal scheduling command reading circuit and implementation method - Google Patents
TTS-based operation display terminal scheduling command reading circuit and implementation method Download PDFInfo
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- CN110838283A CN110838283A CN201911290345.4A CN201911290345A CN110838283A CN 110838283 A CN110838283 A CN 110838283A CN 201911290345 A CN201911290345 A CN 201911290345A CN 110838283 A CN110838283 A CN 110838283A
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
- G10L13/00—Speech synthesis; Text to speech systems
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- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
- G10L19/04—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis using predictive techniques
- G10L19/16—Vocoder architecture
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
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Abstract
The invention discloses a scheduling command reading circuit of an operation display terminal based on TTS and an implementation method. The circuit comprises a power supply circuit, an ARM processor, an audio coding and decoding circuit, a TTS circuit and an audio power amplifier circuit. The power circuit is used for converting an input power into various voltages to supply power to each unit, the ARM processor is used for controlling each circuit to realize data conversion and transmission, the audio coding and decoding circuit is used for converting analog signals and digital signals into each other, the TTS circuit is used for converting characters into voice analog signals to realize a dispatching command reading function, and the audio power amplifier circuit is used for driving a loudspeaker to play voice. The invention realizes the reading of the dispatching command of the operation display terminal used in the railway industry, so that a driver can still obtain the information of the dispatching command through voice broadcasting when the dispatching command cannot be checked in time due to some reasons in the driving process, thereby ensuring the running safety of a train and enriching the use function of the operation display terminal.
Description
Technical Field
The invention relates to locomotive integrated wireless communication equipment, in particular to an operation display terminal dispatching command reading circuit based on TTS and an implementation method thereof.
Background
As an operation display terminal of the locomotive comprehensive wireless communication equipment, simple voice prompt can be realized at present, the use of actual workers cannot be well met particularly in the aspect of dispatching commands, the view of locomotive drivers can be dispersed by checking the dispatching commands in a reading mode, the safe driving of the locomotives is influenced, and the accident risk of the railway locomotives is increased.
Disclosure of Invention
In view of the problems in the prior art, the invention provides an operation display terminal scheduling command reading circuit based on TTS and an implementation method thereof. The product realizes the function of dispatching command reading aloud of the operation display terminal by the cooperation of a power supply circuit, an ARM processor, an audio coding and decoding circuit, a TTS circuit and an audio power amplifier circuit in hardware design.
In order to achieve the purpose, the invention adopts the technical scheme that: a TTS-based operation display terminal scheduling command reading circuit is characterized in that: the system comprises a power supply circuit, an ARM processor, an audio coding and decoding circuit, a TTS circuit and an audio power amplifier circuit; the ARM processor adopts a chip with the model of RT1060, the TTS circuit adopts a chip with the model of XFS5152CE, the audio coding and decoding circuit adopts a chip with the model of TLV320AIC3106, and the audio power amplification circuit adopts a chip with the model of SSM 3302; the ARM processor RT1060 chip is connected with an XFS5152CE chip of a TTS circuit through an SPI bus, the XFS5152CE chip is controlled to convert characters into voice analog signals, the voice analog signals are transmitted to a TLV320AIC3106 chip of an audio coding and decoding circuit, the RT1060 chip of the ARM processor is connected with the TLV320AIC3106 chip of the audio coding and decoding circuit through an IIS bus and an IIC bus, audio data are transmitted through the IIS bus, a control command is transmitted through the IIC bus, the TLV320AIC3106 chip of the audio coding and decoding circuit is connected with an SSM3302 chip of an audio power amplification circuit through analog audio, the SSM3302 chip drives a loudspeaker to play and dispatch commands, and the power supply conversion circuit is used for converting input power supply voltage into voltage required by each circuit and then supplying power to each circuit.
The TTS circuit adopts an XFS5152CE chip, pins 42, 43, 44 and 45 of the XFS5152CE chip are respectively connected to pins M16, H10, M11 and G11 of an SPI interface of an ARM processor RT1060 chip, the output audio of the XFS5152CE chip is connected to a TLV320AIC3106 chip of an audio coding and decoding circuit, pins 8 and 9 of an analog differential audio output interface of the XFS5152CE chip are respectively connected to pins 7 and 8 of an analog differential audio interface of the TLV320AIC3106 chip, and pins 26 and 27 of the XFS5152CE chip are connected to a 12M passive crystal DSX 321G.
The audio coding and decoding circuit adopts a TLV320AIC3106 chip, wherein pins 38, 39, 40 and 41 of an IIS interface of the TLV320AIC3106 chip are respectively connected to pins H12, H11, G12 and J14 of an ARM processor RT1060 chip, pins 1 and 2 of an IIC interface of the TLV320AIC3106 chip are respectively connected to pins J11 and K11 of the ARM processor RT1060 chip, a main clock 37 of the TLV320AIC3106 chip is connected to a pin G13 of the ARM processor RT1060 chip, pins 7 and 8 of an analog differential audio input of the TLV320AIC3106 chip are connected to pins 8 and 9 of an analog differential audio output of the XFS51 5152CE chip, and pins 29, 30, 31 and 32 of the TLV320AIC3106 chip are connected to pins 11, 12, 19 and 20 of an analog differential audio input of an SSM3302 chip.
The audio power amplifier circuit adopts an SSM3302 chip, the SSM3302 chip and a TLV320AIC3106 chip transmit left and right channel audio signals through two groups of difference, the TLV320AIC3106 chip controls left and right channel mute through two groups of control pins, the audio input 11 pin, 12 pin, 19 pin and 20 pin of the SSM3302 chip are respectively connected to the 29 pin, 30 pin, 31 pin and 32 pin of the TLV320AIC3106 chip, the left and right channel mute control signal 9 pin and 22 pin of the SSM3302 chip are respectively connected to the 47 pin and 48 pin of the TLV320AIC3106 chip, the left and right channel audio output 2 pin, 3 pin, 4 pin, 5 pin, 26 pin, 27 pin, 28 pin and 29 pin of the SSM3302 chip are respectively connected to a left and right channel speaker through an inductor L13, an inductor L14, an inductor L15 and an inductor L16.
The invention relates to a realization method of an operation display terminal scheduling command reading circuit based on TTS, which is characterized in that: the locomotive integrated wireless communication equipment receives a dispatching command from a wireless air interface, then sends the dispatching command to an operation display terminal, the operation display terminal ARM processor RT1060 chip analyzes the command and sends the command to be read aloud to an XFS5152CE chip of a TTS circuit, the XFS5152CE chip converts characters into voice analog signals and sends the voice analog signals to a TLV320AIC3106 chip of an audio coding and decoding circuit, and finally the ARM processor RT1060 chip controls the TLV320AIC3106 chip of the audio coding and decoding circuit to amplify the analog signals and then drive a loudspeaker to play the analog signals through an SSM3302 chip of an audio power amplification circuit, so that the dispatching command reading aloud function is realized.
Compared with the prior art, the invention has the beneficial effects that: the dispatching command reading method and the dispatching command reading device have the advantages that the dispatching command reading of the operation display terminal used in the railway industry is realized, so that when a driver cannot check the dispatching command in time due to some reasons in the driving process, the dispatching command information can still be obtained through voice broadcasting, and the train running safety is guaranteed. And the use functions of the operation display terminal are enriched, and the use of the operation display terminal is more friendly.
Drawings
FIG. 1 is a system block diagram of the present invention;
FIG. 2 is a schematic diagram of a TTS circuit of the present invention;
FIG. 3 is a schematic diagram of an audio codec circuit of the present invention;
FIG. 4 is a schematic diagram of the audio power amplifier circuit of the present invention;
FIG. 5 is a block diagram of the ARM processor of the present invention connected to a TTS chip and an audio codec chip.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, the operation display terminal scheduling command reading circuit based on TTS includes a power circuit, an ARM processor, an audio codec circuit, a TTS circuit, and an audio power amplifier circuit; the ARM processor adopts a chip with the model of RT1060, the TTS circuit adopts a chip with the model of XFS5152CE, the audio coding and decoding circuit adopts a chip with the model of TLV320AIC3106, and the audio power amplifier circuit adopts a chip with the model of SSM 3302; the ARM processor RT1060 chip is connected with an XFS5152CE chip of a TTS circuit through an SPI bus, the XFS5152CE chip is controlled to convert characters into voice analog signals, the voice analog signals are transmitted to a TLV320AIC3106 chip of an audio coding and decoding circuit, the RT1060 chip of the ARM processor is connected with the TLV320AIC3106 chip of the audio coding and decoding circuit through an IIS bus and an IIC bus, audio data are transmitted through the IIS bus, a control command is transmitted through the IIC bus, the TLV320AIC3106 chip of the audio coding and decoding circuit is connected with an SSM3302 chip of an audio power amplification circuit through analog audio, the SSM3302 chip drives a loudspeaker to play and dispatch commands, and the power supply conversion circuit is used for converting input power supply voltage into voltage required by each circuit and then supplying power to each circuit.
The ARM processor circuit is used for controlling all circuits to achieve data conversion and transmission, the audio coding and decoding circuit is used for converting analog signals and digital signals into each other, the TTS circuit is used for converting characters into voice analog signals to achieve a dispatching command reading function, and the audio power amplifier circuit is used for driving a loudspeaker to play voice.
As shown in FIG. 2, the ARM processor RT1060 chip converts text to speech analog signals through the XFS5152CE chip of the SPI bus control TTS circuit. The 42 pins, 43 pins, 44 pins and 45 pins of an XFS5152CE chip of the TTS circuit are respectively connected to the M16 pins, H10 pins, M11 pins and G11 pins of an SPI interface of an ARM processor RT1060 chip, the output audio of the XFS5152CE chip is connected to an TLV320AIC3106 chip of an audio codec circuit, the 8 pins and 9 pins of an analog differential audio output interface of the XFS5152CE chip are respectively connected to the 7 pins and 8 pins of an analog differential audio interface of the TLV320AIC3106 chip, and the 26 pins and 27 pins of the XFS5152CE chip are connected to a 12M passive crystal DSX 321G.
As shown in FIG. 3, the TLV320AIC3106 chip of the audio codec and the ARM processor RT1060 chip transmit audio data through the IIS bus and control commands through the IIC bus. The IIS interface 38 pins, 39 pins, 40 pins and 41 pins of a TLV320AIC3106 chip of the audio codec circuit are respectively connected to the H12 pin, H11 pin, G12 pin and J14 pin of an ARM processor RT1060 chip, the IIC interface 1 pin and 2 pin of the TLV320AIC3106 chip are respectively connected to the J11 pin and K11 pin of the ARM processor RT1060 chip, the main clock 37 pin of the TLV320AIC3106 chip is connected to the G13 pin of the ARM processor RT1060 chip, the analog differential audio input 7 pin and 8 pin of the TLV320AIC3106 chip are respectively connected to the differential audio output 8 pin and 9 pin of an XFS5152CE chip, the analog differential audio output 29 pin, 30 pin and 31 pin of the TLV320AIC3106 chip are respectively connected to the analog differential audio input 11 pin, 12 pin, 19 pin and 20 pin of an SSM3302 chip.
As shown in fig. 4, the SSM3302 chip of the audio power amplifier circuit and the TLV320AIC3106 chip of the audio codec circuit transmit left and right channel audio signals, the SSM3302 chip and the TLV320AIC3106 chip control the left and right channel muting through two sets of control pins, and the SSM3302 chip and the TLV320AIC3106 chip of the audio power amplifier circuit transmit left and right channel audio signals through two sets of differences. The audio output 11 pins, 12 pins, 19 pins and 20 pins of the SSM3302 chip are respectively connected to the 29 pins, 30 pins, 31 pins and 32 pins of the TLV320AIC3106 chip, the left and right channel mute control signal 9 pins and 22 pins of the SSM3302 chip are respectively connected to the 47 pins and 48 pins of the TLV320AIC3106 chip, and the left and right channel audio output 2 pins, 3 pins, 4 pins, 5 pins, 26 pins, 27 pins, 28 pins and 29 pins of the SSM3302 chip are respectively connected to the left and right channel speakers through an inductor L13, an inductor L14, an inductor L15 and an inductor L16.
The implementation method of the TTS-based operation display terminal scheduling command reading circuit comprises the following steps: the locomotive integrated wireless communication equipment receives a dispatching command from a wireless air interface, then sends the dispatching command to an operation display terminal, the operation display terminal ARM processor RT1060 chip analyzes the command and sends the command to be read aloud to an XFS5152CE chip of a TTS circuit, the XFS5152CE chip converts characters into voice analog signals and sends the voice analog signals to a TLV320AIC3106 chip of an audio coding and decoding circuit, and finally the ARM processor RT1060 chip controls the TLV320AIC3106 chip of the audio coding and decoding circuit to amplify the analog signals and then drive a loudspeaker to play the analog signals through an SSM3302 chip of an audio power amplification circuit, so that the dispatching command reading aloud function is realized.
Claims (5)
1. A TTS-based operation display terminal scheduling command reading circuit is characterized in that: the system comprises a power supply circuit, an ARM processor, an audio coding and decoding circuit, a TTS circuit and an audio power amplifier circuit; the ARM processor adopts a chip with the model of RT1060, the TTS circuit adopts a chip with the model of XFS5152CE, the audio coding and decoding circuit adopts a chip with the model of TLV320AIC3106, and the audio power amplification circuit adopts a chip with the model of SSM 3302; the ARM processor RT1060 chip is connected with an XFS5152CE chip of a TTS circuit through an SPI bus, the XFS5152CE chip is controlled to convert characters into voice analog signals, the voice analog signals are transmitted to a TLV320AIC3106 chip of an audio coding and decoding circuit, the RT1060 chip of the ARM processor is connected with the TLV320AIC3106 chip of the audio coding and decoding circuit through an IIS bus and an IIC bus, audio data are transmitted through the IIS bus, a control command is transmitted through the IIC bus, the TLV320AIC3106 chip of the audio coding and decoding circuit is connected with an SSM3302 chip of an audio power amplification circuit through analog audio, the SSM3302 chip drives a loudspeaker to play and dispatch commands, and the power supply conversion circuit is used for converting input power supply voltage into voltage required by each circuit and then supplying power to each circuit.
2. The TTS-based operational display terminal scheduling command reading circuit of claim 1, wherein: the TTS circuit adopts an XFS5152CE chip, pins 42, 43, 44 and 45 of an XFS5152CE chip are respectively connected to an SPI interface M16 pin, an H10 pin, an M11 pin and a G11 pin of an ARM processor RT1060 chip, an output audio frequency of the XFS5152CE chip is connected to an audio frequency coding and decoding circuit TLV320AIC3106 chip, pins 8 and 9 of an analog differential audio frequency output interface of the XFS5152CE chip are respectively connected to pins 7 and 8 of an analog differential audio frequency interface of the TLV320AIC3106 chip, and pins 26 and 27 of the XFS5152CE chip are connected to a 12M passive crystal DSX 321G.
3. The TTS-based operational display terminal scheduling command reading circuit of claim 1, wherein: the audio coding and decoding circuit adopts a TLV320AIC3106 chip, IIS interface 38 pins, 39 pins, 40 pins and 41 pins of the TLV320AIC3106 chip are respectively connected to H12 pins, H11 pins, G12 pins and J14 pins of an ARM processor RT1060 chip, IIC interface 1 pins and IIC interface 2 pins of the TLV320AIC3106 chip are respectively connected to J11 pins and K11 pins of the ARM processor RT1060 chip, a main clock 37 pin of the TLV320AIC3106 chip is connected to G13 pin of the ARM processor RT1060 chip, an analog differential audio input 7 pin and an analog differential audio output 8 pin and an analog differential audio output 9 pin of the XFS5152CE chip, an analog differential audio output 29 pin, an analog differential audio output 30 pin, an analog differential audio output 31 pin and an analog differential audio output 32 pin of the TLV320AIC3106 chip are connected to analog differential audio input 11 pins, 12 pins, 19 pins and 20 pins of an SSM3302 chip.
4. The TTS-based operational display terminal scheduling command reading circuit of claim 1, wherein: the audio power amplifier circuit adopts an SSM3302 chip, the SSM3302 chip and a TLV320AIC3106 chip transmit left and right channel audio signals through two groups of difference, the TLV320AIC3106 chip controls left and right channel mute through two groups of control pins, audio input pins 11, 12, 19 and 20 of the SSM3302 chip are respectively connected to pins 29, 30, 31 and 32 of the TLV320AIC3106 chip, left and right channel mute control signal pins 9 and 22 of the SSM3302 chip are respectively connected to pins 47 and 48 of the TLV320AIC3106 chip, left and right channel audio output pins 2, 3, 4, 5, 26, 27, 28 and 29 of the SSM3302 chip are respectively connected to left and right channel speakers through an inductor L13, an inductor L14, an inductor L15 and an inductor L16.
5. A method for implementing a TTS-based operation display terminal scheduling command reading circuit according to any of claims 1 to 4, characterized in that: the locomotive integrated wireless communication equipment receives a dispatching command from a wireless air interface, then sends the dispatching command to an operation display terminal, the operation display terminal ARM processor RT1060 chip analyzes the command and sends the command to be read aloud to an XFS5152CE chip of a TTS circuit, the XFS5152CE chip converts characters into voice analog signals and sends the voice analog signals to a TLV320AIC3106 chip of an audio coding and decoding circuit, and finally the ARM processor RT1060 chip controls the TLV320AIC3106 chip of the audio coding and decoding circuit to amplify the analog signals and then drive a loudspeaker to play the analog signals through an SSM3302 chip of an audio power amplification circuit, so that the dispatching command reading aloud function is realized.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111348074A (en) * | 2020-03-20 | 2020-06-30 | 北京佳讯飞鸿电气股份有限公司 | Railway dispatching method and system |
| CN111370039A (en) * | 2020-03-16 | 2020-07-03 | 青岛中加特电气股份有限公司 | Audio playing device and method for playing audio |
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