CN110829523B

CN110829523B - Electronic equipment and reverse charging method

Info

Publication number: CN110829523B
Application number: CN201911054726.2A
Authority: CN
Inventors: 李成亚; 马鹏飞; 栗忠明
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-10-31
Filing date: 2019-10-31
Publication date: 2021-12-31
Anticipated expiration: 2039-10-31
Also published as: WO2021082731A1; CN110829523A

Abstract

The embodiment of the application provides electronic equipment and a reverse charging method. The pull-up circuit is integrated in the electronic device provided by the embodiment of the application, and after the electronic device is connected to the main device end of the USB OTG line, the slave device may identify the USB interface of the electronic device as the CDP port by providing the first voltage to the DM pin of the USB interface. Furthermore, the electronic device provided by the embodiment of the application can provide a larger charging current for the slave device based on the CDP protocol.

Description

Electronic equipment and reverse charging method

Technical Field

The present application relates to the field of reverse charging technologies, and in particular, to an electronic device and a reverse charging method.

Background

With the development of the electronic market, more and more electronic devices have a reverse charging function. For an electronic device with a reverse charging function (e.g., a mobile phone), it may charge another electronic device (e.g., a tablet computer) through an On The Go (OTG) line. The electronic device providing charging may serve as a master device (host), and the electronic device being charged may serve as a slave device (device).

Specifically, in the current OTG charging process, the USB OTG line includes a master device side (a side) and a slave device side (B side). The end a of the USB OTG line is connected to a Universal Serial Bus (USB) interface of the master device, and the end B of the USB OTG line is connected to a USB interface of the slave device. After the master device is determined to be connected to the A end of the USB OTG line, charging electric energy can be provided for the slave device through the USB OTG line. After the slave device determines to access the B end of the USB OTG line, the USB interface of the master device may be identified as a Standard Downlink Port (SDP) through the USB OTG line, so as to receive the charging power provided by the master device based on an SDP protocol.

However, a maximum value of 500mA for the charging current is specified in the SDP protocol, and thus the slave device may limit the charging current to be within 500mA, resulting in a low reverse charging speed. Therefore, the existing reverse charging technology is yet to be further researched.

Disclosure of Invention

In view of the above, the present application provides an electronic device and a reverse charging method, in which a pull-up circuit is integrated in the electronic device, so that the electronic device can identify a USB interface of the electronic device as a CDP port by providing a first voltage to a DM pin of a USB interface after the electronic device is connected to a host device end of a USB OTG line. And then can realize the heavy current reverse charging based on the CDP agreement.

In a first aspect, an embodiment of the present application provides an electronic device, including: the USB interface of the universal serial bus, a pull-up circuit and a control circuit; the USB interface is a standard downlink port SDP, and a pull-up circuit in the electronic equipment is respectively coupled with a digital negative DM pin and a control circuit of the USB interface; the control circuit is used for: and after the USB interface is determined to be connected to the main equipment end of the USB movable OTG line, controlling the pull-up circuit to provide a first voltage for the DM pin, wherein the first voltage is used for indicating the USB interface to be a charging downstream port CDP.

After the master device and the slave device are connected through the USB OTG line, the DM pin of the USB interface of the master device may be coupled with the DM pin of the USB interface of the slave device through the USB OTG line, and the DP pin of the USB interface of the master device may be coupled with the DP pin of the USB interface of the slave device through the USB OTG line. The slave device may execute the BC1.2 protocol, and recognize the type of the USB interface of the master device through a voltage change of the DM pin and a voltage change of the DP pin of its USB interface. Specifically, the slave device applies a DP voltage to a DP pin in its USB interface, and if the voltage of a DM pin in its USB interface is not pulled up, the slave device may determine that the USB interface of the master device is an SDP interface. On the contrary, if the voltage of the DM pin in the USB interface of the slave device is pulled up along with the DM pin, the slave device may apply the DM voltage to the DM pin, and if the voltage of the DP pin of the slave device is pulled up along with the DM pin, the slave device may determine that the USB interface of the master device is the DCP port, whereas if the DP pin in the USB interface of the slave device is not pulled up along with the DP pin, the slave device may determine that the USB interface of the master device is the CDP port.

In the embodiment of the application, the control circuit controls the pull-up circuit to provide the first voltage to the DM pin after determining that the host device terminal of the USB OTG line is connected. The slave device end of the USB OTG line is connected with the USB interface of the slave device, and the voltage of the DM pin of the slave device is pulled up along with the first voltage applied to the DM pin of the master device. Furthermore, when the slave device recognizes the USB interface of the master device, the slave device can detect that the voltage of the DM pin of the USB interface is pulled up after applying the DP voltage to the DP pin, and thus the slave device does not recognize the USB interface of the master device as the SDP port. The slave device applies the DM voltage to the DM pin, and since the USB interface of the electronic device is actually the SDP port, the voltage of the DP pin of the slave device is not pulled up, so that the slave device can recognize the USB interface of the master device as the CDP port, and then the large-current reverse charging can be realized based on the CDP protocol.

In this embodiment of the present application, the control circuit may determine whether the USB interface is connected to the main device end of the USB OTG line in at least the following two ways:

in one possible implementation, the electronic device further includes a power management circuit, the power management circuit being coupled to a trigger pin of a USB interface of the electronic device; the power management circuit can send a first detection signal to the control circuit after detecting that the voltage of the trigger pin is lower than a first threshold voltage; the control circuit may determine that the USB interface is connected to the main device end of the USB OTG line after receiving the first detection signal.

The trigger pin of the USB interface is determined by the specific type of the USB interface. For example, the trigger pin in the USB 2.0 interface may be an Identification (ID) pin, and for example, the trigger pin in the USB Type-C interface may be a Configuration Channel (CC) pin.

In another possible implementation manner, the control circuit is further coupled with a trigger pin of the USB interface; the control circuit can also determine that the USB interface is connected to the main equipment end of the USB OTG line after detecting that the voltage of the trigger pin is lower than the first threshold voltage.

In one possible implementation, the electronic device further includes a charging management circuit, the charging management circuit being coupled to the VBUS pin of the USB interface; the control circuit can also control the charging management circuit to output charging voltage to a VBUS pin of the USB interface after determining that the USB interface is connected to the main equipment end of the USB OTG line. The charging management circuit is controlled to output charging voltage to the VBUS pin of the USB interface, so that the voltage of the VBUS pin of the slave device can be pulled up, and the slave device can be identified to the slave device end connected with the USB OTG line.

In the embodiment of the application, the control circuit can more accurately control the time when the pull-up circuit outputs the first voltage at least in the following two ways:

in one possible implementation manner, the control circuit may turn on the DP comparator for executing the BC1.2 protocol after controlling the time when the charging management circuit outputs the charging voltage to the VBUS pin of the USB interface to reach the first time delay; and after receiving a third detection signal provided by the DP comparator, controlling a pull-up circuit to provide a first voltage to the DM pin.

Specifically, in the process of identifying the type of the USB interface of the master device, the slave device applies a DP voltage to a DP pin of the slave device, and identifies the type of the USB interface of the master device through a voltage change of a DM pin of the slave device. In this embodiment, after receiving the third detection signal provided by the DP comparator, the control circuit indicates that the voltage of the DP pin of the electronic device (master device) is pulled up, and at this time, the pull-up circuit is turned on to provide the first voltage to the DM pin of the master device, so that the slave device can detect that the voltage of the DM pin of the slave device is pulled up, which not only can prevent the slave device from recognizing the USB interface of the master device as an SDP port, but also can more accurately control the time for the pull-up circuit to output the first voltage.

In another possible implementation manner, the control circuit may detect a voltage of a digital positive DP pin of the USB interface after determining that the USB interface is connected to the main device end of the USB OTG line; and controlling a pull-up circuit to provide the first voltage to the DM pin after detecting that the voltage of the DP pin is more than a third threshold voltage.

In one possible implementation, the control circuit may further control the pull-up circuit to stop providing the first voltage to the DM pin after controlling the pull-up circuit to provide the first voltage to the DM pin for a second time delay. In the embodiment of the present application, the duration of the second delay may be determined according to a BC1.2 protocol. For example, after the slave applies the DP voltage to the DP pin, the DM voltage is applied to the DM pin after an interval of 40ms, so the second delay is not less than 40ms in this embodiment, so as to ensure that the slave can detect that the voltage of the DM pin of the slave is pulled up after applying the DP voltage to the DP pin.

In the embodiment of the present application, there are many possible implementations of the pull-up circuit, which are exemplary:

in one possible implementation, the pull-up circuit includes a first switch tube and a first resistor; the control electrode of the first switching tube is coupled with the control circuit, the first electrode of the first switching tube is coupled with one end of a first resistor, the second electrode of the first switching tube is coupled with the DM pin, and the other end of the first resistor is used for receiving a basic voltage; the control circuit can conduct the first switch tube after determining that the USB interface is connected to the main equipment end of the USB OTG line.

For example, the pull-up circuit may further include a second resistor, one end of the second resistor is coupled to the control circuit, and the other end of the second resistor is coupled to the control electrode of the first switching tube.

Illustratively, the first switch tube may be a bipolar transistor or a field effect transistor.

Illustratively, the base voltage may be a voltage provided by the control circuit or the power management circuit for the pull-up circuit.

In another possible implementation, the pull-up circuit includes a third resistor; one end of the third resistor is coupled with the control circuit, and the other end of the third resistor is coupled with the DM pin; the control circuit can determine that the USB interface is connected to the main equipment end of the USB OTG line, and then outputs the basic voltage to the third resistor.

In a second aspect, an embodiment of the present application provides a reverse charging method, which may be applied to a control circuit, where the control circuit is coupled to a pull-up circuit, the pull-up circuit is coupled to a digital negative DM pin of a USB interface, and the USB interface is of a standard downlink port SDP; the reverse charging method provided by the embodiment of the application comprises the following steps: and after the USB interface is determined to be connected to the main equipment end of the USB movable OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin, wherein the first voltage is used for indicating that the USB interface is a charging downstream port CDP.

In one possible implementation, the control circuit is further coupled to a power management circuit, and the power management circuit is coupled to a trigger pin of the USB interface; the power management circuit is used for sending a first detection signal to the control circuit after detecting that the voltage of the trigger pin is lower than a first threshold voltage; the reverse charging method provided by the embodiment of the application further comprises the following steps: and after receiving the first detection signal, determining that the USB interface is accessed to the main equipment end of the USB OTG line.

In one possible implementation, the control circuit is further coupled to a trigger pin of the USB interface; the reverse charging method provided by the embodiment of the application further comprises the following steps: and after detecting that the trigger pin is lower than the first threshold voltage, determining that the USB interface is connected to a main equipment end of the USB OTG line.

In one possible implementation, the control circuit is further coupled with a charging management circuit, and the charging management circuit is coupled with a VBUS pin of the USB interface; after determining that the USB interface is connected to the main device end of the USB OTG line, the method further includes: and controlling the charging management circuit to output charging voltage to a VBUS pin of the USB interface.

In one possible implementation manner, after determining that the USB interface is connected to the master device end of the USB movable OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin, where the first voltage is used to indicate that the USB interface is the charging downstream port CDP, includes: after the time for controlling the charging management circuit to output the charging voltage to the VBUS pin of the USB interface reaches a first time delay, starting a DP comparator for executing a BC1.2 protocol; and controlling the pull-up circuit to provide the first voltage to the DM pin after receiving the third detection signal provided by the DP comparator.

In a possible implementation manner, after determining that the USB interface is connected to the primary device end of the USB OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin, where the first voltage is used to instruct the USB interface to be the charging downstream port CDP, includes: after the USB interface is determined to be connected to a main equipment end of a USB OTG line, detecting the voltage of a digital positive DP pin of the USB interface; and controlling the pull-up circuit to provide the first voltage to the DM pin after detecting that the voltage of the DP pin is greater than the third threshold voltage.

In one possible implementation manner, after controlling the pull-up circuit to provide the first voltage to the DM pin, the method further includes: and after the time for controlling the pull-up circuit to provide the first voltage to the DM pin reaches a second time delay, controlling the pull-up circuit to stop providing the first voltage to the DM pin.

In one possible implementation, the pull-up circuit includes a first switch tube and a first resistor; a control electrode of the first switching tube is coupled with the control circuit, a first electrode of the first switching tube is coupled with one end of a first resistor, a second electrode of the first switching tube is coupled with the DM pin, and the other end of the first resistor is used for receiving a basic voltage; after determining that the USB interface is connected to the host device end of the USB OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin includes: and after the USB interface is determined to be connected to the main equipment end of the USB OTG line, the first switch tube is conducted.

In one possible implementation manner, the pull-up circuit further includes a second resistor, one end of the second resistor is coupled to the control circuit, and the other end of the second resistor is coupled to the control electrode of the first switching tube.

In one possible implementation, the first switch transistor is a bipolar transistor or a field effect transistor.

In one possible implementation, the base voltage is a voltage provided by a control circuit or a power management circuit for the pull-up circuit.

In one possible implementation, the pull-up circuit includes a third resistor; one end of the third resistor is coupled with the control circuit, and the other end of the third resistor is coupled with the DM pin; after determining that the USB interface is connected to the host device end of the USB OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin includes: and after the USB interface is determined to be connected to the main equipment end of the USB OTG line, outputting the basic voltage to the third resistor.

These and other aspects of the present application will be more readily apparent from the following description of the embodiments.

Drawings

Fig. 1 is a schematic diagram of a reverse charging method according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of an electronic device suitable for use in the embodiment of the present application;

FIG. 3 is a flow chart illustrating a slave device recognizing a USB interface of a master device;

fig. 4 is a schematic diagram of a pull-up circuit according to an embodiment of the present disclosure;

fig. 5 is a schematic diagram of a pull-up circuit according to an embodiment of the present disclosure;

fig. 6 is a schematic diagram of a pull-up circuit according to an embodiment of the present disclosure;

fig. 7 is a schematic flowchart of a reverse charging method according to an embodiment of the present disclosure.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application.

In order to make the objects, technical solutions and advantages of the present application more clear, the present application will be further described in detail with reference to the accompanying drawings. The particular methods of operation in the method embodiments may also be applied to apparatus embodiments or system embodiments. It is to be noted that "at least one" in the description of the present application means one or more, where a plurality means two or more. In view of this, the "plurality" may also be understood as "at least two" in the embodiments of the present invention. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" generally indicates that the preceding and following related objects are in an "or" relationship, unless otherwise specified. In addition, it is to be understood that the terms first, second, etc. in the description of the present application are used for distinguishing between the descriptions and not necessarily for describing a sequential or chronological order.

It should be noted that "coupled" in the embodiments of the present application refers to an energy transfer relationship, for example, a is coupled with B, and refers to that energy can be transferred between a and B, wherein there are many possibilities for specific forms of energy, such as electric energy, magnetic field potential energy, and the like. When electric energy can be transmitted between A and B, the A and B can be directly electrically connected or indirectly electrically connected through other conductors or circuit elements in a circuit connection relationship.

It should be noted that "access" in this embodiment of the present application means that coupling connection is implemented between two interfaces, and pins corresponding to each other in the two interfaces are coupled one by one, but this embodiment of the present application does not limit how to specifically couple and connect the two interfaces. For example, the coupling connection may be a plug-in, a butt-joint, or the like. Taking the insertion as an example, the interface 1 is connected to the interface 2, and the interface 1 may be inserted into the interface 2, or the interface 2 may be inserted into the interface 1.

Currently, the application of reverse charging technology in electronic devices is becoming mature. The reverse charging means that the electronic device can charge another electronic device by using the electric energy stored in its own battery. Generally, the current reverse charging is mostly wired, that is, the reverse charging is realized by means of a USB mobile (on the go, OTG) line. Illustratively, as shown in FIG. 1, the USB OTG line 300 mainly includes an A terminal and a B terminal. Before performing reverse charging, the user may connect the a terminal of the USB OTG line 300 with the USB interface 101 of the electronic device 100, and connect the B terminal of the USB OTG line 300 with the USB interface 201 of the electronic device 200. The electronic device 100 can output power from the USB interface 101 to the terminal a of the USB OTG line, and the power received by the terminal a of the USB OTG line is transmitted to the terminal B of the USB OTG line and is input to the electronic device 200 through the USB interface 201. The electronic device 200 may further operate or be charged with power input from the USB interface 201.

It should be noted that the shape of the USB OTG line 300 in the embodiment of the present application may be a linear shape, or may be a nonlinear shape such as a square shape and a circular shape, and the shape of the USB OTG line 300 in the embodiment of the present application is not limited to many.

For convenience of description, the electronic device 100 is taken as an example, and the electronic device to which the embodiments of the present application are applied is further described below. Fig. 2 illustrates an electronic device structure to which the embodiment of the present application is applicable, where the electronic device may be an electronic device such as a smartphone and a tablet computer that supports reverse charging. As shown in fig. 2, the electronic apparatus 100 mainly includes a universal serial bus USB interface 101, a control circuit 102, a power management circuit 103, a battery 104, and a charge management circuit 106.

It is to be understood that the illustrated structure of the embodiment of the present application does not specifically limit the electronic device 100. In other embodiments of the present application, electronic device 100 may include more or fewer components than shown in FIG. 2, or some components may be combined, some components may be split, or a different arrangement of components. The components shown in fig. 2 may be implemented in hardware, software, or a combination of software and hardware. For example, the electronic device 100 may further include a central processing unit, an external memory interface, an internal memory, an antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a receiver, a microphone, an earphone interface, a sensor module, a button, a motor, an indicator, a camera, a display screen, and a Subscriber Identity Module (SIM) card interface, etc. Wherein, the sensor module may include a pressure sensor, a gyroscope sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a distance sensor, a proximity light sensor, a fingerprint sensor, a temperature sensor, a touch sensor, an ambient light sensor, a bone conduction sensor, and the like.

The control circuit 102 may include one or more processing units, and may be a Central Processing Unit (CPU) of the electronic device 100 or a System On Chip (SOC) of the electronic device 100. The following are exemplary: the control circuit 102 may include an Application Processor (AP), a controller, a memory, a Digital Signal Processor (DSP), and the like. The different processing units may be separate devices or may be integrated into one or more processors.

The controller may be, among other things, a neural center and a command center of the electronic device 100. The controller may generate the control signal based on the command opcode and the timing signal. For example, in the embodiment of the present application, the controller in the control circuit 102 may generate a control signal, and the control circuit 102 may control the operations of the power management circuit 103 and the USB interface 101 through the control signal.

A memory may also be provided in the control circuit 102 for storing instructions and data. In some embodiments, the memory in control circuit 102 is a cache memory. The memory may hold instructions or data that have just been used or recycled by the control circuit 102. If the control circuit 102 needs to reuse the instruction or data, it can be called directly from the memory. Avoiding repeated accesses reduces the latency of the processor 110, thereby increasing the efficiency of the system.

In some embodiments, the control circuit 102 may include one or more interfaces. The interface may include a control bus interface, a general-purpose input/output (GPIO) interface, and the like.

The control bus interface may be an integrated circuit (I2C) interface, a Serial Peripheral Interface (SPI), a System Power Management Interface (SPMI), and the like, which is not limited in this embodiment. In this embodiment, the control circuit 102 may couple the power management circuit 103 and the charging management circuit 106 through a control bus interface to implement a reverse charging function of the electronic device 100.

The GPIO interface may be configured by software. The GPIO interface may be configured as a control signal interface, as well as a data signal interface, and as a power interface. In some embodiments, a GPIO interface may be used to connect the control circuit 102 with other circuit structures in the electronic device 100, with the GPIO interface being flexibly configured depending on the type of circuit structure connected.

The power management circuit 103 may be a Power Management Unit (PMU) or a Power Management IC (PMIC). The power management circuit 103 may receive power from the battery 104 and/or the charge management circuit 106 to power the control circuit 102 and other circuit structures in the electronic device. The power management circuit 103 may also be used to monitor parameters such as battery capacity, battery cycle count, battery state of health (leakage, impedance), etc. In addition, the power management circuit 103 may detect voltages of the respective pins in the USB interface and send a detection signal to the control circuit 102 when the voltage states of the respective pins change. In other embodiments, the power management circuit 103 may be integrated with the control circuit 102 in the same chip.

The charging management circuit (charger IC)106 may receive charging power through the USB interface 101 and store the received charging power in the battery 104. While the charge management circuit 106 is charging the battery 104, power may also be supplied to the power management circuit 103, so that the power management circuit 103 may simultaneously supply power to other circuit structures in the electronic device. When the electronic device is used as a master device in wireless charging, the control circuit 102 may control the charging management circuit 106 to output a charging voltage to the USB interface 101, where the charging voltage is typically 5V.

The USB interface 101 is an interface conforming to the USB standard specification, and may specifically be a Micro USB interface, a USB Type C interface, or the like. The USB interface 101 may be used to connect a charger to charge the electronic device 100, or may be used to connect the electronic device 100 and the a terminal of the USB OTG cable 300, so that the electronic device 100 may charge other electronic devices.

Illustratively, the USB interface 101 mainly includes a Ground (GND) pin, a trigger pin, a Data Positive (DP) pin, a data negative (DM) pin, and a power supply bus (VBUS) pin. The DP pin may also be referred to as a D + pin, and the DM pin may also be referred to as a D-pin. The trigger pin may trigger the control circuit 102 to determine that the USB interface 101 is connected to the host device end of the USB OTG line 300 (end a of the USB OTG line 300). For example, in a conventional USB interface such as a Micro USB interface or a USB Type C interface, the trigger pin may be an Identification (ID) pin of the Micro USB interface, and for the USB Type C interface, the trigger pin may be a control (CC) pin. The specific implementation of the trigger pin is determined by the specific type of the USB interface 101 and the specific identification logic inside the control circuit 102, which is not limited in this embodiment. For the convenience of understanding, the embodiments of the present application will be further described with reference to the ID pin as the trigger pin.

In the USB interface 101, the GND pin is coupled to the ground circuit and is held in a 0 potential state. The ID pin is applied with a stable pull-up voltage by the power management circuit 103, and the voltage value of the pull-up voltage is generally 1.8V.

The VBUS pin is coupled to the power management circuit 103. During the charging process, the VBUS pin may receive charging power input by a charger or other electronic device, and provide the received charging power to the charging management circuit 106. During the reverse charging process, the VBUS pin may receive and output the power provided by the charging management circuit 106.

In the USB interface 101, the ID pin may be used to trigger the control circuit 102 to determine that the USB interface 101 accesses the host device end of the USB OTG line 300 (end a of the USB OTG line 300). Specifically, the method comprises the following steps:

the a terminal and the B terminal of the USB OTG line 300 can be understood as different types of USB interfaces, and the a terminal and the B terminal of the USB OTG line 300 respectively have pins adapted to the USB interface 101 of the electronic device 100. Specifically, after the a end of the USB OTG line 300 is connected to the USB interface 101, the GND pin of the a end is coupled to the GND pin of the USB interface 101, the ID pin of the a end is coupled to the ID pin of the USB interface 101, the DP pin of the a end is coupled to the DP pin of the USB interface 101, the DM pin of the a end is coupled to the DM pin of the USB interface 101, and the VBUS pin of the a end is coupled to the VBUS pin of the USB interface. The same process is applied to the B terminal, which is not described again.

The difference between terminals a and B in the USB OTG line 300 is that the ID pin in terminal a is coupled to the ground circuit, while the ID pin in terminal B is floating. When the a terminal of the USB OTG line 300 is connected to the USB interface 101 of the electronic device 100, the ID pin of the USB interface 101 is grounded through the ID pin of the a terminal of the USB OTG line 300, so that the voltage of the ID pin of the USB interface 101 is pulled down accordingly. In an embodiment of the present application, when the voltage of the ID pin in the USB interface 101 is pulled down to be less than the first threshold voltage, it can be considered that the USB interface 101 is connected to the a terminal of the USB OTG line 300, and usually, the voltage of the ID pin of the USB interface 101 is pulled down to 0V.

When the B terminal of the USB OTG line 300 is connected to the USB interface 101 of the electronic device 100, the ID pin of the USB interface 101 is coupled to the ID pin of the B terminal. Since the ID pin of the B terminal is floating, the voltage of the ID pin in the USB interface 101 can still be maintained at 1.8V.

In view of this, in the embodiment of the present application, the control circuit 102 may determine that the USB interface 101 accesses the a end of the USB OTG line 300 through at least the following two possible implementation manners:

the first method is as follows: the power management circuit 103 may detect a voltage of the ID pin in the USB interface 101, and when the voltage of the ID pin is detected to be pulled down, that is, the voltage of the ID pin is detected to be lower than a first threshold voltage, the power management circuit 103 sends a first detection signal to the control circuit 102. For example, the power management circuit 103 may send a first detection signal to the control circuit 102 through the control bus, where the first detection signal may indicate to the control circuit 102 that the USB interface 101 is connected to the a terminal of the USB OTG line 300. After receiving the first detection signal, the control circuit 102 may determine that the USB interface 101 has access to the a end of the USB OTG line 300 according to the first detection signal, and further may determine that the electronic device is a master device, and continue to execute a battery charging specification (BC) 1.2 protocol, and complete handshaking with the slave device.

The second method comprises the following steps: the control circuit 102 is coupled to the ID pin, and the control circuit 102 may detect the voltage of the ID pin. When it is detected that the voltage of the ID pin is pulled down, that is, the voltage of the ID pin is lower than the first threshold voltage, the control circuit 102 may determine that the USB interface 101 is connected to the a terminal of the USB OTG line 300, and the control circuit 102 may further determine that the electronic device is a master device, and continue to execute the 1.2 protocol, and complete handshaking with the slave device.

In the charging scenario shown in fig. 1, the electronic device 100 is connected to the a end of the USB OTG line 300, so the electronic device 100 is a master device, and the electronic device 200 is connected to the B end of the USB OTG line 300, so the electronic device 200 is a slave device. It should be noted that the electronic device 200 has a structure similar to that of the electronic device 100, the electronic device 200 includes a USB interface 201, a control circuit 202, a power management circuit 203, and a battery 204, and the connection relationship among the circuit structures can be referred to as shown in fig. 2, which is not illustrated in this embodiment. For convenience of illustration, in the embodiment of the present application, the pins in the USB interface 101 are represented by GND pin 1, ID pin 1, DP pin 1, DM pin 1, and VBUS pin 1, and the pins in the USB interface 201 are represented by GND pin 2, ID pin 2, DP pin 2, DM pin 2, and VBUS pin 2.

In the electronic device 100, after determining that the USB interface 101 is connected to the a end of the USB OTG line 300, the control circuit 102 may send a first control signal to the charging management circuit 106, and after receiving the first control signal, the charging management circuit 106 outputs a charging voltage to the VBUS pin 1 of the USB interface 101.

In the electronic device 200, the VBUS pin 2 of the USB interface 201 is coupled to the VBUS pin 1 of the USB interface 101 through the USB OTG line 300, so that when the charging management circuit 106 outputs the charging voltage to the VBUS pin 1, the voltage of the VBUS pin 2 is pulled up accordingly. In one possible implementation, the power management circuit 203 may detect the voltage of the VBUS pin 2, and may send a second detection signal to the control circuit 202 when it is detected that the voltage of the VBUS pin 2 is pulled up, that is, the voltage of the VBUS pin 2 is greater than the second threshold voltage. Specifically, the power management circuit 203 may send a second detection signal to the control circuit 202 via the control bus, where the second detection signal may indicate to the control circuit 202 that the USB interface 202 is connected to the USB interface. After receiving the second detection signal, the control circuit 202 may determine that the USB interface 202 is accessed to the USB interface according to the second detection signal, and the control circuit 202 may further determine that the electronic device is a slave device, and continue to execute the 1.2 protocol, and complete handshaking with the master device.

In another possible implementation, the control circuit 202 is coupled to the VBUS pin 2. The control circuit 202 may detect the voltage of the VBUS pin 2, and when it is detected that the voltage of the VBUS pin 2 is pulled up, that is, the voltage of the VBUS pin 2 is greater than the second threshold voltage, the control circuit 202 may determine that the USB interface 202 is connected to the USB interface, and the control circuit 202 may further determine that the electronic device is a slave device, and continue to execute the BC1.2 protocol, and complete handshaking with the master device.

It should be noted that the B end of the USB OTG line 300 is similar to a conventional USB interface, that is, after the B end of the USB OTG line 300 is connected to the electronic device 200, the control circuit 202 may only recognize that other USB interfaces are connected to the USB interface 201, the electronic device to which the control circuit 202 belongs is a slave device by default, and the control circuit 202 may not recognize which USB interface of the specific device is connected to the USB interface 201. That is to say, during the period that the electronic device 200 is used as a slave device, the electronic device may receive the power through the USB OTG line 300, or may receive the power through other USB data lines, which is similar to an application scenario of a USB interface in an existing electronic device, and thus, details thereof are not repeated.

The handshake process between the electronic device 100 and the electronic device 200 based on the BC1.2 protocol is mainly implemented by the DP pin 1 and the DM pin 1 in the USB interface 101, and the DP pin 2 and the DM pin 2 in the USB interface 201. Through the handshake process based on the BC1.2 protocol, the electronic device 200 may identify the type of the USB interface 101 of the electronic device 100.

Currently, according to the BC1.2 protocol, the USB interface mainly exists in the following three types: a Standard Downstream Port (SDP), a Dedicated Charging Port (DCP), and a Charging Downstream Port (CDP). Currently, USB interfaces of most electronic devices (such as smart phones and tablet computers) are SDP ports, and the SDP protocol specifies that the maximum charging current is 500mA, so the SDP ports cannot be used for large-current charging. The DCP port can provide larger charging current, and the DCP port is generally used for special chargers such as wall charging and the like. The CDP port also supports large current charging, but the CDP port can be mainly used as a port of a computer, a HUB (HUB) and other equipment, and is not applied in a large scale at present.

It is noted that the interface type of the B terminal of the USB OTG line 300 is equivalent to the interface type of the USB interface 101. That is to say, the USB OTG line 300 does not change the interface type of the USB interface 101, and the electronic device 200 can recognize the interface type of the USB interface 101 through the USB OTG line 300. For ease of description, the embodiments of the present application are summarized directly with the interface type identifying the USB interface 101.

Next, taking fig. 3 as an example, a process of the electronic device 200 recognizing the USB interface 101 will be further described. As shown in fig. 3, the method mainly comprises the following steps:

s301: the control circuit 202 turns on the DP voltage source and the DM current source in the power management circuit 203.

Illustratively, the power management circuit 203 includes a DP current source, a DP voltage source, a DM current source, and a DM voltage source. The DP current source may limit the current transmitted by the DP pin 2 not to exceed the DP threshold current, the DP voltage source may output a constant DP voltage to the DP pin 2, the DM current source may limit the current transmitted by the DM pin 2 not to exceed the DM threshold current, and the DM voltage source may output a constant DM voltage to the DM pin 2. Generally, the DP voltage and the DM voltage are both 0.6V.

The control circuit 202 may send a control command to the power management circuit 203 via a control bus with the power management circuit 203, thereby turning on the DP voltage source and the DM current source in the power management circuit 203. It will be appreciated that during S301, the DM voltage source and DP current source are turned off by default.

S302: the control circuit 202 detects the voltage of the DM pin 2. As shown in fig. 2, the control circuit 202 is coupled to the DP pin 2 and the DM pin 2, and the control circuit 202 can directly detect the voltages of the DP pin 2 and the DM pin 2.

S303: if the voltage of the DM pin 2 is smaller than the fourth threshold voltage, S305 is executed to determine that the USB interface 101 is the SDP port, otherwise, S304 is executed. Wherein the fourth threshold voltage is not greater than the output voltage of the DP voltage source and the DM voltage source, and the fourth threshold voltage may be 0.35V in general.

The judgment principle is briefly described as follows:

as shown in fig. 2, in the SDP port (USB interface 101), DP pin 1 is coupled to the ground circuit through pull-down resistor RP, DM pin 1 is coupled to the ground circuit through pull-down resistor RM, and DP pin 1 and DM pin 1 are disconnected from each other. When the power management circuit 203 applies the DP voltage to the DP pin 2, the voltage on the DP pin 1 is pulled up accordingly. However, since the DP pin 1 and the DM pin 1 are disconnected, the DM pin 1 is still in a pull-down state, and the voltage of the DM pin 2 is not pulled up (generally, the voltage of the DM pin 2 is kept at 0V), so that the control circuit 202 can detect that the voltage of the DM pin 2 is smaller than the fourth threshold voltage.

Assuming that the USB interface 101 is a DCP port, the DP pin 1 and the DM pin 1 are shorted, and when the power management circuit 203 applies a DP voltage to the DP pin 2, the voltage of the DP pin 1 is pulled up accordingly. Since the DP pin 1 and the DM pin 1 are shorted, the voltage of the DM pin 1 is pulled up, and further the voltage of the DM pin 2 is pulled up, so that the control circuit 202 can detect that the voltage of the DM pin 2 is not less than the fourth threshold voltage.

Assuming that the USB interface 101 is a CDP port, the power management circuit 103 can detect the voltage of the DP pin 1. When the power management circuit 203 applies the DP voltage to the DP pin 2, the voltage on the DP pin 1 is pulled up accordingly. When the power management circuit 103 detects that the voltage of the DP pin 1 is greater than the reference voltage, the power management circuit 1 turns on the DM voltage source, so as to apply the DM voltage to the DM pin 1, and the voltage of the DM pin 2 is pulled up, so that the control circuit 202 can detect that the voltage of the DM pin 2 is not less than the fourth threshold voltage.

It can be seen that, only when the USB interface 101 is the SDP port, the control circuit 202 may detect that the voltage of the DM pin 2 is smaller than the fourth threshold voltage after the DP voltage source and the DM current source in the power management circuit 203 are turned on, and therefore, in S303, if the voltage of the DM pin 2 is smaller than the fourth threshold voltage, it may be determined that the USB interface 101 is the SDP port. In the case that the USB interface 101 is a CDP port or a DCP port, after the DP voltage source and the DM current source in the power management circuit 203 are turned on, the control circuit 202 will detect that the voltage of the DM pin 2 is not less than the fourth threshold voltage. Therefore, in S303, if the voltage of the DM pin 2 is not less than the fourth voltage threshold, S304 is further executed to further determine whether the USB interface 101 is a CDP port or a DCP port.

S304: the control circuit 202 turns on the DM voltage source and the DP current source in the power management circuit 203. It is understood that turning off the DP voltage source and the DM current source in the power management circuit 203 is also included.

S306: the control circuit 202 detects the voltage of the DP pin 2.

S307: if the voltage of the DP pin 2 is less than the fifth threshold voltage, S309 is executed, and if the USB interface 101 is determined to be the CDP port, S310 is executed, and the USB interface 101 is determined to be the DCP port.

Specifically, assuming that the USB interface 101 is a DCP port, the DP pin 1 and the DM pin 1 are shorted, so when the power management circuit 203 applies the DM voltage to the DM pin 2, the voltages of the DP pin 1, the DM pin 1, and the DP pin 2 are pulled up, so that the control circuit 202 can detect that the voltage of the DP pin 2 is not less than the fifth threshold voltage, generally, the fifth threshold voltage may be the same as the fourth threshold voltage, for example, both of them are 0.35V.

Assuming that the USB interface 101 is a CDP port, the DM pin 1 is grounded through the pull-down resistor RM, the DP pin 1 is grounded through the pull-down resistor RP, and the DM pin 1 and the DP pin 1 are mutually disconnected. Therefore, when the power management circuit 203 applies the DM voltage to the DM pin 2, the voltages of the DP pin 1 and the DP pin 2 are not pulled up, so that the control circuit 202 can detect that the voltage of the DP pin 2 is less than the fifth threshold voltage.

Therefore, when the USB interface 101 is not the SDP port, after the DM voltage source and the DP current source in the power management circuit 203 are turned on, if the voltage of the DP pin 2 is less than the fifth threshold voltage, the USB interface 101 is determined as the CDP interface, and if the voltage of the DP pin 2 is not less than the fifth threshold voltage, the USB interface 101 is determined as the DCP interface.

Currently, in most electronic devices supporting the reverse charging function, the USB interface is an SDP port. Therefore, when the slave device executes S303, the slave device generally recognizes the USB interface of the master device as the SDP port, and charges the slave device according to the SDP protocol. However, the SDP protocol specifies that the magnitude of the charging current cannot exceed 500mA, resulting in a slow reverse charging speed. In view of this, the embodiment of the present application improves the master device (the electronic device 100), and the pull-up circuit 105 is added to the electronic device 100, so that the slave device (the electronic device 200) can identify the USB interface 101 of the electronic device 100 as a CDP port according to the BC1.2 protocol, and the charging current specified in the CDP protocol may be 1.5-5A.

As shown in fig. 2, a pull-up circuit 105 is also included in the electronic device 100. A control terminal of pull-up circuit 105 is coupled to control circuit 102 and an output terminal of pull-up circuit 105 is coupled to power management circuit 103. The control circuit 102 may control the pull-up circuit 105 to provide a first voltage to the DM pin after determining to access the a terminal of the USB OTG line 300, for example, the first voltage may be 0.6V in this application. The pull-up circuit 105 may be provided in the electronic device 100 as an independent circuit configuration, for example, be formed on a main board of the electronic device 100. The pull-up circuit 105 may also be integrated with the control circuit 101 in the same chip, which is not limited in this embodiment.

Specifically, the control circuit 102 may control the pull-up circuit 105 to output the first voltage to the DP pin 1 through at least any one of three possible implementations:

in a first possible implementation manner, the control circuit 102 may control the pull-up circuit 105 to provide the first voltage to the DM pin immediately after determining that the USB interface 101 is connected to the a terminal of the USB OTG line 300.

In a second possible implementation manner, the control circuit 102 may detect the voltage of the DP pin 1 of the USB interface 101 after determining that the USB interface 101 is connected to the a end of the USB OTG line 300. After the control circuit 202 performs S301 to turn on the DP voltage source in the power management circuit 203, the DP voltage is applied to the DP pin 2, and the voltage of the DP pin 1 is pulled up accordingly. In turn, the control circuit 102 may detect that the voltage of DP pin 1 is greater than the third threshold voltage. The control circuit 102 may turn on the pull-up circuit 105 after detecting that the voltage of the DP pin 1 is greater than the third threshold voltage. The control circuit 202 can still detect that the voltage of the DM pin 2 is pulled up and proceed to S304.

In a third possible implementation manner, the control circuit 102 turns on the DP comparator in the electronic device 100 for executing the BC1.2 protocol after controlling the charging management circuit 106 to output the charging voltage to the VBUS pin 1 of the USB interface 101 for a first time delay.

During the first time delay, the VBUS pin 1 of the USB interface 101 is applied with a continuous charging voltage. During this period, the electronic device 200 may recognize that the external USB interface is connected to the USB interface 201, and generally, the first delay is related to the performance of the electronic device 200, and may be obtained through experiments, statistics, estimation, and the like, which is not limited in this embodiment.

The DP comparator for executing the BC1.2 protocol may be located in the power management circuit 103 or the charge management circuit 106, which is not limited in this embodiment. The first input terminal of the DP comparator is coupled to the DP pin, the second input terminal of the DP comparator is maintained at the third threshold voltage, the output terminal of the DP comparator is coupled to the control circuit 102, and the DP comparator may send the third detection signal to the control circuit 102 when the voltage of the DP pin 1 is greater than the third threshold voltage. Specifically, the DP comparator may send a third detection signal to the control circuit 102 via the control bus, which may indicate to the control circuit 102 that the voltage of DP pin 1 is pulled up. After receiving the third detection signal provided by the DP comparator, the control circuit 102 may determine that the voltage of the DP pin 1 is pulled up according to the third detection signal. The control circuit 102 may in turn control the pull-up circuit 105 to provide the first voltage to the DM pin 1. After the time that the pull-up circuit 105 continues to supply the first voltage to the DM pin 1 reaches the second delay, the control circuit 102 controls the pull-up circuit 105 to stop supplying the first voltage to the DM pin 1.

During the second time delay, the electronic device 200 may complete the steps of DM pin 2 voltage detection, turning on the DM voltage source and the DP current source. According to the specification of the BC1.2 protocol, the interval between the time point when the electronic device 200 turns on the DP voltage source and the time point when the DM voltage source is turned on is 40ms, and therefore the second delay is not less than 40ms in the embodiment of the present application. After waiting for the second time delay, the control circuit 102 may control the pull-up circuit 105 to stop supplying the first voltage to the DM pin 1.

In the embodiment of the present application, since the DM pin 1 of the USB interface 101 is applied with the first voltage by the pull-up circuit 105, and the DM pin 1 of the USB interface 101 can be coupled to the DM pin 2 of the USB interface 201 through the USB OTG line 300, the voltage of the DM pin 2 of the USB interface 201 is pulled up accordingly, and when the electronic device 200 executes S303, the control circuit 202 detects that the voltage of the DM pin 2 of the USB interface 201 is not less than the fourth threshold voltage, and can further execute S304 continuously. It is avoided that the electronic device 200 recognizes the USB interface 101 as an SDP port.

In the embodiment of the present application, the USB interface 101 may actually be an SDP port, as shown in fig. 2. Therefore, when the electronic device 200 executes S307 and after the DM voltage source and the DP current source in the power management circuit 203 are turned on, the voltages of the DP pin 1 and the DP pin 2 are not pulled up, so that the control circuit 202 can detect that the voltage of the DP pin 2 is less than the fifth threshold voltage, and further the electronic device 200 can recognize the SDP port (the USB interface 101) as the CDP port.

After that, the electronic device 200 may enumerate and charge with the electronic device 100 according to the CDP protocol, and since the CDP protocol specifies that the charging current may reach 1.5 to 5A, the electronic device 100 may perform reverse charging with a larger charging current (up to 5A), which is beneficial to increasing the speed of reverse charging.

In a possible implementation manner, after determining that the USB interface 101 of the electronic device 100 is a CDP port, the electronic device 200 may further turn on a DP voltage source in the power management circuit 203, so as to apply a DP voltage to the DP pin 2 of the USB interface 201. DP pin 1 in USB interface 101 is pulled up accordingly. In a possible implementation manner, after determining that the USB interface 101 is connected to the a end of the USB OTG line 300, the control circuit 101 may further detect a voltage of the DP pin 1. When the voltage of the DP pin 1 is greater than the third threshold voltage for the first time, it indicates that the control circuit 202 is executing S301, and when the voltage of the DP pin 1 is greater than the third threshold voltage for the second time, it indicates that the control circuit 202 has completed identifying the type of the USB interface 101. The control circuit 102 may then proceed with the enumeration process, and the reverse charging process following the enumeration process. Generally, the third threshold voltage and the fourth threshold voltage are the same, for example, both of them may be 0.35V. The enumeration process and the reverse charging process may be implemented with reference to the existing protocol specification, which is not described herein again.

In summary, the embodiment of the present application provides an electronic device, in which a pull-up circuit is disposed in the electronic device to apply a pull-up voltage to a DM pin of a USB interface in a master device, so that the slave device recognizes the USB interface of the master device as a CDP interface, thereby increasing a reverse charging speed.

Next, the pull-up circuit 105 in the embodiment of the present application is further described with reference to the following specific embodiment. In the embodiment of the present application, there are at least the following two possible implementations of the pull-up circuit 105:

implementation mode one

Fig. 4 schematically shows one of the implementation structures of the pull-up circuit 105 in the embodiment of the present application. As shown in fig. 4, the pull-up circuit 105 includes a first switch transistor S1 and a first resistor R1. A control electrode of the first switch tube S1 is coupled to the control circuit 102, a first electrode of the first switch tube S1 is coupled to one end of the first resistor R1, a second electrode of the first switch tube S1 is coupled to the DM pin 1, and the other end of the first resistor R1 is configured to receive a base voltage.

The base voltage may be a voltage supplied to conventional components in the electronic device, and is typically 1.8V. In the embodiment of the present application, as shown by the dotted line in fig. 2, the control circuit 102 may provide the base voltage for the pull-up circuit 105, or the power management circuit 103 may provide the base voltage for the pull-up circuit 105, which is not limited in the embodiment of the present application.

In order to simulate the voltage state of the DM pin of the CDP port during the USB interface identification process, in the embodiment of the present application, the pull-up circuit 105 may divide the basic voltage to obtain the first voltage, so that the first voltage applied to the DM pin 1 approaches the DM voltage output by the DM voltage source.

Illustratively, one GPIO port in the control circuit 102 may be configured as a control port, and the GPIO port controls the first switch tube S1 to be turned on or off, so as to control the operation of the pull-up circuit 105. The first switch transistor S1 may be a bipolar transistor as shown in fig. 4, or a field effect transistor as shown in fig. 5, which is not limited in this embodiment.

Specifically, the control circuit 102 may turn on the first switch tube S1 after receiving the first detection signal. After the first switch tube S1 is turned on, the first resistor R1, the first switch tube S1 and the ground resistor RM of the DM pin 1 form a voltage divider circuit, and the base voltage is divided by the first resistor R1 and the ground resistor RM to obtain a first voltage. Wherein, the first voltage satisfies the following formula one:

wherein, V₁R1 is the resistance of the first resistor R1, rM is the resistance of the ground resistor RM, V₀Is the voltage value of the base voltage.

The control circuit 102 turns off the first switch transistor S1, and controls the pull-up circuit 105 to stop applying the first voltage to the DM pin.

In one possible implementation, a second resistor R2 may also be included in pull-up circuit 105. As shown in fig. 4, one end of the second resistor R2 is coupled to the control circuit 102, and the other end of the second resistor R2 is coupled to the control electrode of the first switch tube S1. In the case that the first switch tube S1 is a bipolar transistor, the second resistor R2 can reduce the current input to the control electrode (base) of the first switch tube S1, and the resistance of the first resistor R1 can be determined by the base current, so that the first resistor R1 can be configured more conveniently.

For example, assuming that the current input to the control electrode of the first switch tube S1 is 1mA, and the amplification factor of the first switch tube S1 is 2, the current passing through the first resistor R1 can be obtained as 2 mA. Assuming that the base voltage is 1.8V, the first voltage is 0.6V, and the voltage drop between the first electrode and the second electrode in the first switching tube S1 is 0.3V when the current of the control electrode is 1mA, it can be calculated that the first resistor R1 needs to generate 0.9V voltage drop, and further, the resistance value of the first resistor R1 should be configured to 150 Ω according to the 2mA current passing through the first resistor R1.

Implementation mode two

Fig. 6 illustrates another implementation structure of the pull-up circuit 105 in the embodiment of the present application. As shown in fig. 6, the pull-up circuit 105 includes a third resistor R3, one end of the third resistor R3 is coupled to the control circuit 102, and the other end of the third resistor R3 is coupled to the DM pin 1. The control circuit 102, upon receiving the first detection signal, outputs the base voltage to the third resistor R3. After the control circuit 102 stops outputting the base voltage to the third resistor R3, the third resistor R3 stops applying the first voltage to the DP pin 1.

In this implementation, the third resistor R3 and the ground resistor RM of the DM pin 1 may form a voltage divider circuit, and when the control circuit 102 outputs the basic voltage to the third resistor R3, the basic voltage is divided by the third resistor R3 and the ground resistor RM to obtain a first voltage, where the first voltage satisfies the first formula, which is not described again.

In summary, the embodiments of the present application add a pull-up circuit to the master device, where the pull-up circuit may apply a first voltage to the DM pin of the master device, so that the slave device may recognize the USB interface of the master device as the CDP port. In the embodiment of the application, the pull-up circuit is simple in structure and easy to implement, and can be compatible with the existing USB 2.0 protocol and the BC1.2 protocol.

Based on the same technical concept, the embodiment of the application also provides a reverse charging method. The method may be applied to the control circuit 102 shown in fig. 2. Fig. 7 exemplarily shows a schematic flowchart of a reverse charging method provided by an embodiment of the present application, and as shown in fig. 7, the method mainly includes:

s701: after determining that the USB interface 101 is connected to the master device end of the removable USB OTG line 300, the pull-up circuit 105 is controlled to provide a first voltage to the DM pin 1, where the first voltage is used to instruct the USB interface to charge the downstream port CDP. For a specific implementation manner, reference may be made to the steps executed by the control circuit 101 in the foregoing embodiment, which are not described again.

The control circuit 102 may determine whether the USB interface 101 is connected to the host device end of the USB OTG line 300 at least in the following two ways:

in a possible implementation manner, the electronic device further includes a power management circuit 103, where the power management circuit 103 is coupled to a trigger pin of the USB interface 101 of the electronic device; the power management circuit 103 may send a first detection signal to the control circuit 102 after detecting that the voltage of the trigger pin is lower than a first threshold voltage; the control circuit 102 may determine that the USB interface 101 is connected to the host device end of the USB OTG line 300 after receiving the first detection signal.

The trigger pin of the USB interface 101 is determined by the specific type of the USB interface 101. For example, the trigger pin in the Micro USB interface may be an ID pin, and the trigger pin in the USB Type-C interface may be a CC pin.

In another possible implementation, the control circuit 102 is further coupled to a trigger pin of the USB interface 101; the control circuit 102 may further determine that the USB interface 101 is connected to the host device end of the USB OTG line 300 after detecting that the voltage of the trigger pin is lower than the first threshold voltage.

In one possible implementation, the electronic device further includes a charging management circuit 106, where the charging management circuit 106 is coupled to the VBUS pin of the USB interface 101; the control circuit 102 may further control the charging management circuit 106 to output the charging voltage to the VBUS pin of the USB interface 101 after determining that the USB interface 101 is connected to the master device end of the USB OTG line 300.

In the embodiment of the present application, the control circuit 102 can control the time when the pull-up circuit 105 outputs the first voltage more accurately in at least two ways:

in one possible implementation, the control circuit 102 may turn on the DP comparator for executing the BC1.2 protocol after controlling the charging management circuit 106 to output the charging voltage to the VBUS pin of the USB interface 101 for a first time delay; and after receiving the third detection signal provided by the DP comparator, the pull-up circuit 105 is controlled to provide the first voltage to the DM pin.

In another possible implementation manner, the control circuit 102 may detect the voltage of the digital positive DP pin of the USB interface 101 after determining that the USB interface 101 is connected to the host device end of the USB OTG line 300; and controlling the pull-up circuit 105 to supply the first voltage to the DM pin after detecting that the voltage of the DP pin is greater than the third threshold voltage.

In the embodiment of the present application, there are many possible implementations of the pull-up circuit 105, which are exemplary:

in one possible implementation, the pull-up circuit 105 includes a first switch tube and a first resistor; a control electrode of the first switching tube is coupled with the control circuit 102, a first electrode of the first switching tube is coupled with one end of a first resistor, a second electrode of the first switching tube is coupled with the DM pin, and the other end of the first resistor is used for receiving a basic voltage; the control circuit 102 may turn on the first switch tube after determining that the USB interface 101 is connected to the main device end of the USB OTG line 300.

Illustratively, the pull-up circuit 105 may further include a second resistor, one end of the second resistor is coupled to the control circuit 102, and the other end of the second resistor is coupled to the control electrode of the first switch tube.

Illustratively, the base voltage may be a voltage provided by the control circuit 102 or the power management circuit 103 for the pull-up circuit 105.

In another possible implementation, pull-up circuit 105 includes a third resistor; one end of the third resistor is coupled with the control circuit 102, and the other end of the third resistor is coupled with the DM pin; the control circuit 102 may determine that the USB interface 101 is connected to the host device end of the USB OTG line 300, and then output a base voltage to the third resistor.

It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.

Claims

1. An electronic device, comprising: the USB interface is a standard downlink port SDP;

wherein the pull-up circuit is respectively coupled with the digital negative DM pin of the USB interface and the control circuit;

the control circuit is configured to:

after the USB interface is determined to be connected to a master device end of a USB movable OTG line, detecting the voltage of a digital positive DP pin of the USB interface, and after the voltage of the DP pin is detected to be greater than a third threshold voltage, controlling the pull-up circuit to provide a first voltage to the DM pin, wherein the first voltage is used for indicating a slave device connected to a slave device end of the OTG line to identify the USB interface as a charging downstream port CDP.

2. The electronic device of claim 1, further comprising a power management circuit coupled with a trigger pin of the USB interface;

the power management circuit is configured to: after detecting that the voltage of the trigger pin is lower than a first threshold voltage, sending a first detection signal to the control circuit;

the control circuit is further configured to: and after receiving the first detection signal, determining that the USB interface is accessed to a main equipment end of the USB OTG line.

3. The electronic device of claim 1, wherein the control circuit is further coupled with a trigger pin of the USB interface;

the control circuit is further configured to: and after detecting that the voltage of the trigger pin is lower than a first threshold voltage, determining that the USB interface is accessed to a main equipment end of a USB OTG line.

4. The electronic device of any of claims 1-3, further comprising a charge management circuit coupled with a VBUS pin of the USB interface;

the control circuit is further configured to: and after the USB interface is determined to be connected to a main equipment end of a USB OTG line, controlling the charging management circuit to output charging voltage to a VBUS pin of the USB interface.

5. The electronic device of claim 4, wherein the control circuit is specifically configured to:

after the time for controlling the charging management circuit to output the charging voltage to the VBUS pin of the USB interface reaches a first time delay, starting a DP comparator for executing a BC1.2 protocol;

and after receiving a third detection signal provided by the DP comparator, controlling the pull-up circuit to provide a first voltage to the DM pin.

6. The electronic device of claim 5, wherein the control circuit is further configured to:

and after the time for controlling the pull-up circuit to provide the first voltage to the DM pin reaches a second time delay, controlling the pull-up circuit to stop providing the first voltage to the DM pin.

7. The electronic device of any one of claims 1-3, wherein the pull-up circuit comprises a first switch tube and a first resistor;

a control electrode of the first switching tube is coupled with the control circuit, a first electrode of the first switching tube is coupled with one end of the first resistor, a second electrode of the first switching tube is coupled with the DM pin, and the other end of the first resistor is used for receiving a basic voltage;

the control circuit is specifically configured to:

and after the USB interface is determined to be connected to the main equipment end of the USB OTG line, the first switch tube is conducted.

8. The electronic device of claim 7, wherein the pull-up circuit further comprises a second resistor, one end of the second resistor is coupled to the control circuit, and the other end of the second resistor is coupled to the control electrode of the first switch tube.

9. The electronic device of claim 7, wherein the first switch transistor is a bipolar transistor or a field effect transistor.

10. The electronic device of claim 7, wherein the base voltage is a voltage provided by the control circuit or a power management circuit for the pull-up circuit.

11. The electronic device of any of claims 1-3, wherein the pull-up circuit comprises a third resistor;

one end of the third resistor is coupled with the control circuit, and the other end of the third resistor is coupled with the DM pin;

the control circuit is specifically configured to:

and after the USB interface is determined to be connected to the main equipment end of the USB OTG line, outputting a basic voltage to the third resistor.

12. The reverse charging method is applied to a control circuit, the control circuit is coupled with a pull-up circuit, the pull-up circuit is coupled with a digital negative DM pin of a Universal Serial Bus (USB) interface, and the USB interface is a standard downlink port SDP;

the method comprises the following steps:

13. The method of claim 12, wherein the control circuit is further coupled to a power management circuit, the power management circuit being coupled to a trigger pin of the USB interface; the power management circuit is used for sending a first detection signal to the control circuit after detecting that the voltage of the trigger pin is lower than a first threshold voltage;

the method further comprises the following steps: and after receiving the first detection signal, determining that the USB interface is accessed to a main equipment end of the USB OTG line.

14. The method of claim 12, wherein the control circuit is further coupled to a trigger pin of the USB interface;

the method further comprises the following steps: and after detecting that the voltage of the trigger pin is lower than a first threshold voltage, determining that the USB interface is accessed to a main equipment end of a USB OTG line.

15. The method of any of claims 12 to 14, wherein the control circuit is further coupled with a charge management circuit coupled with a VBUS pin of the USB interface;

after determining that the USB interface is connected to the main device end of the USB OTG line, the method further includes: and controlling the charging management circuit to output charging voltage to a VBUS pin of the USB interface.

16. The method of claim 15, wherein after determining that the USB interface is connected to the primary device end of the USB OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin, the first voltage indicating that the USB interface is the charging downstream port CDP comprises:

17. The method of claim 16, wherein after controlling the pull-up circuit to provide the first voltage to the DM pin, further comprising:

18. The method of any one of claims 12 to 14, wherein the pull-up circuit comprises a first switching tube and a first resistor;

after determining that the USB interface is connected to the host device end of the USB OTG line, controlling the pull-up circuit to provide a first voltage to the DM pin includes:

19. The method of claim 18, wherein the pull-up circuit further comprises a second resistor, one end of the second resistor being coupled to the control circuit, the other end of the second resistor being coupled to the control electrode of the first switching tube.

20. The method of claim 18, wherein the first switch transistor is a bipolar transistor or a field effect transistor.

21. The method of claim 18, wherein the base voltage is a voltage provided by the control circuit or a power management circuit for the pull-up circuit.

22. The method of any of claims 12 to 14, wherein the pull-up circuit comprises a third resistor;