CN110828314A - Based on Al2O3/SiNxDiamond field effect transistor with double-layer gate dielectric and preparation method thereof - Google Patents
Based on Al2O3/SiNxDiamond field effect transistor with double-layer gate dielectric and preparation method thereof Download PDFInfo
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- 230000005669 field effect Effects 0.000 title claims abstract description 35
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 title claims abstract description 28
- 229910052593 corundum Inorganic materials 0.000 title claims abstract description 28
- 229910001845 yogo sapphire Inorganic materials 0.000 title claims abstract description 28
- 238000002360 preparation method Methods 0.000 title claims abstract description 25
- 239000001257 hydrogen Substances 0.000 claims abstract description 91
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 91
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 90
- 229910003460 diamond Inorganic materials 0.000 claims abstract description 88
- 239000010432 diamond Substances 0.000 claims abstract description 88
- 238000001179 sorption measurement Methods 0.000 claims abstract description 60
- 229910004205 SiNX Inorganic materials 0.000 claims abstract description 52
- 239000000758 substrate Substances 0.000 claims abstract description 45
- 239000000463 material Substances 0.000 claims abstract description 21
- 238000000151 deposition Methods 0.000 claims abstract description 16
- 238000000034 method Methods 0.000 claims description 50
- 229920002120 photoresistant polymer Polymers 0.000 claims description 39
- 239000002184 metal Substances 0.000 claims description 17
- 238000000231 atomic layer deposition Methods 0.000 claims description 15
- 239000013078 crystal Substances 0.000 claims description 14
- 238000005530 etching Methods 0.000 claims description 12
- 238000001259 photo etching Methods 0.000 claims description 12
- 238000004528 spin coating Methods 0.000 claims description 12
- 238000005229 chemical vapour deposition Methods 0.000 claims description 7
- 238000001883 metal evaporation Methods 0.000 claims description 6
- 239000013543 active substance Substances 0.000 claims description 3
- 238000003486 chemical etching Methods 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims description 3
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims 1
- 238000002161 passivation Methods 0.000 abstract description 5
- 239000003054 catalyst Substances 0.000 abstract 1
- 238000006243 chemical reaction Methods 0.000 description 22
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 11
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 11
- 239000000956 alloy Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 6
- 238000005566 electron beam evaporation Methods 0.000 description 6
- 238000010926 purge Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 229910045601 alloy Inorganic materials 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 239000011149 active material Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 3
- 238000001459 lithography Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000004047 hole gas Substances 0.000 description 2
- 229920006395 saturated elastomer Polymers 0.000 description 2
- 238000000137 annealing Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
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- H01L29/51—Insulating materials associated therewith
- H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
Abstract
The invention relates to a catalyst based on Al2O3The diamond field effect transistor of the/SiNx double-layer gate medium and the preparation method thereof comprise the following steps: selecting a diamond substrate; growing a hydrogen terminal adsorption layer on the upper surface of the diamond substrate; growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer; growing Al on the upper surfaces of the source electrode, the drain electrode, and the hydrogen termination adsorption layer between the source electrode and the drain electrode2O3A material forming a first dielectric layer; growing SiN on the upper surface of the first dielectric layerxMaterial forming a second dielectric layer(ii) a And growing a gate electrode on the upper surface of the second dielectric layer. The invention adopts Al2O3/SiNxThe double-layer structure is used as a gate dielectric, and Al is arranged on a thin layer2O3Depositing a layer of SiN on the mediumxThe medium can reduce the capacitance of the grid electrode, improve the frequency characteristic of the device, simultaneously play a role in passivation and obviously enhance the stability of the device.
Description
Technical Field
The invention belongs to the technical field of microelectronic devices, and particularly relates to an Al-based semiconductor device2O3A diamond field effect transistor of/SiNx double-layer gate medium and a preparation method thereof.
Background
Diamond is a wide bandgap semiconductor material with a large bandgap width (5.47eV) and high thermal conductivity (>20W/(cm. K)), high breakdown electric field and high carrier mobility (3800 cm for holes)2/(V.s), electron 4500cm2V · s), which determines the diamond device can work under high temperature, high pressure, high radiation environment, and has great application potential under high pressure, high power and extreme environment.
The mainstream structure of diamond electronic device is field effect transistor, in order to overcome the limitation of immature diamond doping technology on the application of diamond electronic device, people propose to prepare the device on the hydrogenated diamond surface, namely hydrogen terminal, the hydrogen terminal surface adsorbs active molecules or atomic groups in the air, two-dimensional cavity gas can be induced, and the cavity surface density can reach 1 x 1012-2×1013cm-2The mobility is 1-150cm2Between V · s, diamond hydrogen termination has been widely used for preparing surface channel field effect transistor, but the hydrogen termination device in the prior art has unstable characteristics and is easily affected by external environment.
In 2018, Zeyang Ren et Al used Al2O3As a gate dielectric and passivation layer, inThe metal-insulating medium-semiconductor field effect transistor is prepared on the surface of the Hydrogen terminal, and larger device output current density is obtained, see the literature' Hydrogen-terminated polycrystalline diamond MOSFETs with Al2O3passivant layers grow by atomic layer deposition at differential temperature, aipadvances.8,065026(2018) ". Although the method uses low-temperature grown Al2O3The medium protects the surface of the hydrogen terminal diamond, realizes large current, but the Al grows at low temperature2O3The poor quality of the dielectric makes the gate electrode of the device have low withstand voltage, limiting the characteristics and stability of diamond electronic devices.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides an Al-based alloy2O3A diamond field effect transistor of/SiNx double-layer gate medium and a preparation method thereof. The technical problem to be solved by the invention is realized by the following technical scheme:
one aspect of the present invention provides an Al-based alloy2O3/SiNxThe preparation method of the diamond field effect transistor with the double-layer gate dielectric comprises the following steps:
s1: selecting a diamond substrate;
s2: growing a hydrogen terminal adsorption layer on the upper surface of the diamond substrate;
s3: growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer;
s4: growing Al on the upper surfaces of the source electrode, the drain electrode, and the hydrogen termination adsorption layer between the source electrode and the drain electrode2O3A material forming a first dielectric layer;
s5: growing SiN on the upper surface of the first dielectric layerxForming a second dielectric layer of material;
s6: growing a gate electrode on the upper surface of the second dielectric layer to form an Al-based layer2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
In an embodiment of the present invention, the S1 includes:
0.3-1mm of single crystal or polycrystalline diamond is selected as the substrate.
In an embodiment of the present invention, the S2 includes:
s21: treating the diamond substrate in hydrogen plasma for 5-30min at the temperature range of 700-;
s22: cooling the diamond substrate after plasma treatment to room temperature in a hydrogen environment, and forming a hydrogen terminal surface on the surface of the diamond substrate;
s23: and adsorbing active substances or atomic groups in the air on the hydrogen terminal surface to form a hydrogen terminal adsorption layer.
In an embodiment of the present invention, the S3 includes:
s31: depositing an Au film with the thickness of 80-180nm on the surface of the hydrogen terminal adsorption layer, wherein the Au film and the hydrogen terminal adsorption layer form ohmic contact;
s32: spin-coating a photoresist on the upper surface of the Au film;
s33: forming a source electrode pattern and a drain electrode pattern on the Au film coated with the photoresist by using a photolithography process using a first mask;
s34: etching off the Au film which is not coated with the photoresist by using a chemical etching method;
s35: and removing the residual photoresist at the positions of the source electrode and the drain electrode to form the source electrode and the drain electrode.
In an embodiment of the present invention, the S4 includes:
growing a layer of 5-20nm Al on the upper surface of the source electrode, the upper surface of the drain electrode and the upper surface of the hydrogen terminal adsorption layer between the source electrode and the drain electrode by utilizing an atomic layer deposition process within the temperature range of 150-2O3And forming a first dielectric layer by using the material.
In an embodiment of the present invention, the S5 includes:
forming a first dielectric layer on the substrate by plasma CVD at a temperature in the range of 50-100 deg.CA layer of SiN with the thickness of 5-40nm is grown on the upper surfacexAnd forming a second dielectric layer.
In an embodiment of the present invention, the S6 includes:
s61: spin-coating photoresist on the upper surface of the second dielectric layer;
s62: making a gate metal window on the upper surface of the second dielectric layer by using a second mask and a photoetching process;
s63: growing an Al film with the thickness of 50-200nm in the gate metal window by adopting a metal evaporation process;
s64: removing the residual photoresist on the second dielectric layer to form a gate electrode, thereby forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
Another aspect of the present invention provides an Al-based alloy2O3/SiNxThe diamond field effect transistor with double-layer gate dielectric comprises a diamond substrate, a hydrogen terminal adsorption layer, an electrode layer and Al from top to bottom2O3Dielectric layer, SiNxA dielectric layer, and a gate electrode, wherein,
the electrode layer comprises a source electrode and a drain electrode which are arranged in parallel and respectively positioned on two sides of the upper surface of the hydrogen terminal adsorption layer;
the Al is2O3The dielectric layer covers the upper surface of the source electrode, the upper surface of the drain electrode and the upper surface of the hydrogen terminal adsorption layer between the source electrode and the drain electrode;
the gate electrode is disposed on the SiNxThe middle part of the upper surface of the dielectric layer is parallel to the source electrode and the drain electrode.
In one embodiment of the present invention, the source electrode and the drain electrode are made of Au metal; the gate electrode is made of Al metal.
In one embodiment of the present invention, the diamond substrate has a thickness of 0.3 to 1mm, the source electrode and the drain electrode each have a thickness of 80 to 180nm, and the Al is2O3The thickness of the dielectric layer is 5-20nm, and the SiNxThe thickness of the dielectric layer is 5-40nm, and the thickness of the gate electrode is 50-200 nm.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention is based on Al2O3/SiNxThe preparation method of the diamond field effect transistor with double-layer gate dielectric adopts Al2O3/SiNxThe double-layer structure is used as a gate dielectric, the thickness of the gate dielectric layer is reduced, and the thin layer of high-quality Al2O3The trap quantity in the medium is well controlled, and the gate medium covers the whole channel and passes through Al2O3The dielectric layer improves the concentration and stability of two-dimensional hole gas in the channel, reduces the on-resistance of the device, and improves the output current and transconductance; in the invention, the thin layer Al2O3Depositing a layer of SiN on the mediumxMedium through SiNxThe dielectric layer reduces the gate leakage, improves the breakdown voltage of the device, and the whole Al2O3/SiNxThe double-layer structure reduces the capacitance of the grid electrode, improves the frequency characteristic of the device, and meanwhile, the double-layer grid medium plays a role in passivation, so that the stability of the device is obviously enhanced.
2. The preparation method does not carry out annealing treatment on the surface of the hydrogen terminal before depositing the gate dielectric layer, thereby not only reducing the preparation process steps, but also having low on-resistance of the prepared device, large output current and large linear range of transconductance peak value.
3. The double-layer gate dielectric prepared by the preparation method disclosed by the invention adopts a low-temperature growth mode, so that the hydrogen terminal of the diamond and the adsorption layer on the surface of the hydrogen terminal of the diamond can not be damaged, and a channel region can be ensured to have higher carrier concentration, thereby obtaining higher saturated output current and improving the characteristics of devices.
Drawings
FIG. 1 shows an Al-based alloy according to an embodiment of the present invention2O3/SiNxA flow chart of a preparation method of the diamond field effect transistor with double-layer gate dielectric;
FIGS. 2 a-2 f illustrate an Al-based alloy according to an embodiment of the present invention2O3/SiNxThe preparation process of the diamond field effect transistor with the double-layer gate medium is schematically shown;
fig. 3 is a schematic structural diagram of a first mask according to an embodiment of the present invention;
FIG. 4 is a schematic structural diagram of a second mask according to an embodiment of the present invention;
FIG. 5 shows an Al-based alloy according to an embodiment of the present invention2O3/SiNxThe structure schematic diagram of the diamond field effect transistor with double-layer gate dielectric;
fig. 6 is a sectional view taken along line a-a of fig. 5.
Description of reference numerals:
1-a diamond substrate; 2-hydrogen termination adsorption layer; 3-a source electrode; 4-a drain electrode; 5-Al2O3A dielectric layer; 6-SiNxA dielectric layer; 7-a gate electrode; 8-Au film.
Detailed Description
The present disclosure is further described below with reference to specific examples, but the embodiments of the present disclosure are not limited thereto.
Example one
Referring to fig. 1, fig. 1 shows an Al-based semiconductor device according to an embodiment of the present invention2O3/SiNxA flow chart of a preparation method of a diamond field effect transistor with double-layer gate dielectric. The preparation method of this example includes:
s1: selecting a diamond substrate;
s2: growing a hydrogen terminal adsorption layer on the upper surface of the diamond substrate;
s3: growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer;
s4: growing Al on the upper surfaces of the source electrode, the drain electrode, and the hydrogen termination adsorption layer between the source electrode and the drain electrode2O3A material forming a first dielectric layer;
s5: growing SiN on the upper surface of the first dielectric layerxForming a second dielectric layer of material;
s6: on the second dielectric layerGrowing a gate electrode on the upper surface to finally form the Al-based layer2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
Further, the S1 includes:
0.3-1mm of single crystal or polycrystalline diamond is selected as the substrate.
Further, the S2 includes:
s21: treating the diamond substrate in hydrogen plasma for 5-30min at the temperature range of 700-;
s22: cooling the diamond substrate after plasma treatment to room temperature in a hydrogen environment, and forming a hydrogen terminal surface on the surface of the diamond substrate;
s23: and adsorbing active substances or atomic groups in the air on the hydrogen terminal surface to form a hydrogen terminal adsorption layer.
Further, the S3 includes:
s31: depositing an Au film with the thickness of 80-180nm on the surface of the hydrogen terminal adsorption layer, wherein the Au film and the hydrogen terminal adsorption layer form ohmic contact;
s32: spin-coating a photoresist on the upper surface of the Au film;
s33: forming a source electrode pattern and a drain electrode pattern on the Au film coated with the photoresist by using a photolithography process using a first mask;
s34: etching off the Au film which is not coated with the photoresist by using a chemical etching method;
s35: and removing the residual photoresist at the positions of the source electrode and the drain electrode to form the source electrode and the drain electrode.
Further, the S4 includes:
growing a layer of 5-20nm Al on the upper surface of the source electrode, the upper surface of the drain electrode and the upper surface of the hydrogen terminal adsorption layer between the source electrode and the drain electrode by utilizing an atomic layer deposition process within the temperature range of 150-2O3And forming a first dielectric layer by using the material.
Further, the S5 includes:
at a temperature of 50-100 deg.CIn the enclosure, a layer of SiN with the thickness of 5-40nm is grown on the upper surface of the first dielectric layer by utilizing a plasma chemical vapor deposition processxAnd forming a second dielectric layer.
Further, the S6 includes:
s61: spin-coating photoresist on the upper surface of the second dielectric layer;
s62: making a gate metal window on the upper surface of the second dielectric layer by using a second mask and a photoetching process;
s63: growing an Al film with the thickness of 50-200nm in the gate metal window by adopting a metal evaporation process;
s64: removing the residual photoresist on the second dielectric layer to form a gate electrode, thereby forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
The present example is based on Al2O3/SiNxDiamond field effect transistor with double-layer gate dielectric and preparation method thereof adopt Al2O3/SiNxThe double-layer structure is used as a gate dielectric, the thickness of the gate dielectric layer is reduced, and the thin layer of high-quality Al2O3The trap number in the medium is well controlled, and the medium covers the whole channel and passes through Al2O3The dielectric layer improves the concentration and stability of two-dimensional hole gas in the channel, reduces the on-resistance of the device, and improves the output current and transconductance; while in a thin layer of Al2O3Depositing a layer of SiN on the mediumxMedium through SiNxThe dielectric layer reduces the gate leakage, improves the breakdown voltage of the device, and the whole Al2O3/SiNxThe double-layer structure reduces the capacitance of the grid electrode, improves the frequency characteristic of the device, and meanwhile, the double-layer grid medium plays a role in passivation, so that the stability of the device is obviously enhanced.
Example two
On the basis of the above-described embodiment, the present embodiment is to fabricate a substrate of single crystal diamond, Al2O3/SiNxThe diamond field effect transistor with the double-layer gate dielectric thickness of 30nm is taken as an example, and the invention is implementedThe preparation of the examples is described in detail. Referring to fig. 2 a-2 f and fig. 3 and 4, fig. 2 a-2 f are diagrams of an Al-based semiconductor device according to an embodiment of the present invention2O3/SiNxFig. 3 is a schematic structural diagram of a first mask provided in an embodiment of the present invention; fig. 4 is a schematic structural diagram of a second mask according to an embodiment of the present invention.
The preparation method of this example includes:
step 1: a single crystal diamond substrate 1 was selected.
The single crystal diamond with the thickness of 0.5mm is selected as the substrate.
Step 2: a hydrogen termination adsorption layer 2 is formed on the upper surface of the diamond substrate 1.
Specifically, the single crystal diamond substrate 1 is placed in a reaction chamber of Microwave Plasma Chemical Vapor Deposition (MPCVD), and hydrogen with the flow rate of 850sccm is introduced to form hydrogen plasma; treating the single crystal diamond substrate 1 in hydrogen plasma for 10min under the conditions that the pressure in a reaction chamber is 100mbar, the reaction temperature is 850 ℃ and the microwave power is 2kW to obtain a hydrogen terminal surface; the hydrogen-terminated surfaces adsorb active materials in the air to form hydrogen-terminated adsorption layers 2, as shown in fig. 2 a.
And step 3: and growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer.
Specifically, the step 3 includes:
step 31: depositing an Au film 8 with the thickness of 80nm on the surface of the hydrogen terminal adsorption layer 2 by adopting an electron beam evaporation process to protect the hydrogen terminal adsorption layer 2 and form ohmic contact with the hydrogen terminal adsorption layer 2, as shown in figure 2b, wherein the working current of the electron beam evaporation equipment is 200mA, and the voltage is 7.5 KV;
step 32: using the first mask shown in fig. 3, spin-coating a photoresist on the upper surface of the Au film 8, exposing using a lithography machine, and then developing to form a source electrode pattern and a drain electrode pattern;
step 33: using KI/I2Etching the Au film 8 uncovered by the photoresist by the solution for 40 s;
step 33: the remaining photoresist is removed and finally a source electrode 3 and a drain electrode 4 are formed on the respective sides of the upper surface of the hydrogen termination adsorption layer, as shown in fig. 2 c.
And 4, step 4: al is grown on the upper surface of the source electrode 3, the upper surface of the drain electrode 4, and the upper surface of the hydrogen termination adsorption layer 2 between the source electrode 3 and the drain electrode 42O3And forming a first dielectric layer by using the material.
The specific operation process is as follows: placing the unformed device formed in step 3 of the present example into an Atomic Layer Deposition (ALD) reaction chamber; introducing trimethylaluminum into the ALD reaction chamber to serve as an Al source, and introducing water to serve as an O source, wherein the flow rate of the trimethylaluminum is 50sccm, and the flow rate of the water is 60 sccm; depositing a layer of 10nm thick Al by atomic layer deposition under the conditions of 150 ℃ of temperature, 0.1s of feed time and 4s and 6s of purging time of trimethylaluminum and water respectively2O3The source feeding time refers to the time for introducing trimethylaluminum and water into the atomic layer deposition reaction chamber every time, and the purging time refers to the time for purging the trimethylaluminum and the water onto the surface of an unformed device every time; in the Al2O3Photoresist is spin-coated on the dielectric layer, and the Al is coated on the dielectric layer by a photoetching process2O3Making a pattern of a first gate dielectric layer on the dielectric layer, and etching Al except the pattern of the first gate dielectric layer by a hydrochloric acid wet method2O3The material is removed and the remaining photoresist is removed to obtain the first gate dielectric layer 5, as shown in fig. 2 d.
And 5: SiN is grown on the upper surface of the first gate dielectric layer 5xAnd forming a second dielectric layer.
The specific operation process is as follows: placing the unformed device formed in step 4 of this example into a plasma chemical vapor deposition (ICP-CVD) reaction chamber; with SiH4As a source of Si, with N2Introducing into ICP-CVD reaction chamber as nitrogen source, wherein SiH4And N2The volume ratio of (A) to (B) is 1 to 1.5; depositing a layer of SiN with the thickness of 20nm on the upper surface of the first gate dielectric layer 5 by using a plasma chemical vapor deposition technology at the temperature of 50 ℃ and the pressure of 0.1mbarxA dielectric layer; in the above-mentionedSiNxPhotoresist is spin-coated on the dielectric layer, and the SiN is subjected to a photoetching processxPatterning a second gate dielectric layer on the dielectric layer, and etching off SiN outside the second gate dielectric layer by dry methodxThe material is removed, and then the remaining photoresist is removed, resulting in the second gate dielectric layer 6, as shown in fig. 2 e.
Step 6: and growing a gate electrode on the upper surface of the second gate dielectric layer 6.
Specifically, spin-coating photoresist on the upper surface of the second gate dielectric layer 6; making a gate metal window on the upper surface of the second gate dielectric layer 6 by using a second mask shown in fig. 4 and adopting a photoetching process; growing an Al film with the thickness of 100nm in the gate metal window by adopting a metal evaporation process; removing the residual photoresist on the second gate dielectric layer 6 to form a gate electrode, and finally forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with a double-layer gate dielectric as shown in figure 2 f.
According to the preparation method, the surface of the hydrogen terminal is not annealed before the gate dielectric layer is deposited, so that the preparation process steps are reduced, and the prepared device is low in on-resistance, large in output current and large in linear range of transconductance peak value.
EXAMPLE III
On the basis of the above embodiments, the present embodiment uses the substrate as polycrystalline diamond, Al2O3/SiNxThe preparation method of the embodiment of the invention is described in detail by taking a diamond field effect transistor with a total thickness of the double-layer gate dielectric of 50nm as an example.
Referring again to fig. 2a to 2f, the preparation method of the present embodiment includes:
step 1: a polycrystalline diamond substrate 1 is selected.
Polycrystalline diamond with a thickness of 1mm was selected as the substrate.
Step 2: a hydrogen termination adsorption layer 2 is formed on the upper surface of the diamond substrate 1.
Specifically, the single crystal diamond 1 substrate is placed in a reaction chamber of MPCVD, and hydrogen with the flow rate of 800sccm is introduced to form hydrogen plasma; treating the single crystal diamond substrate 1 in hydrogen plasma for 15min under the conditions that the pressure in a reaction chamber is 800mbar, the reaction temperature is 950 ℃ and the microwave power is 1.5kW to obtain a hydrogen terminal surface; the hydrogen-terminated surfaces adsorb active materials in the air to form hydrogen-terminated adsorption layers 2, as shown in fig. 2 a.
And step 3: and growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer.
Specifically, the step 3 includes:
step 31: depositing an Au film 8 with the thickness of 120nm on the surface of the hydrogen terminal adsorption layer 2 by adopting an electron beam evaporation process to protect the hydrogen terminal adsorption layer 2 and form ohmic contact with the hydrogen terminal adsorption layer 2, as shown in figure 2b, wherein the current of electron beam evaporation is 200mA, and the voltage is 7.5 KV;
step 32: using the first mask shown in fig. 3, spin-coating a photoresist on the upper surface of the Au film 8, exposing using a lithography machine, and then developing to form a source electrode pattern and a drain electrode pattern;
step 33: using KI/I2Etching the Au film 8 uncovered by the photoresist by the solution for 40 s;
step 33: the remaining photoresist is removed and finally a source electrode 3 and a drain electrode 4 are formed on the respective sides of the upper surface of the hydrogen termination adsorption layer, as shown in fig. 2 c.
And 4, step 4: al is grown on the upper surface of the source electrode 3, the upper surface of the drain electrode 4, and the upper surface of the hydrogen termination adsorption layer 2 between the source electrode 3 and the drain electrode 42O3And forming a first dielectric layer by using the material.
The specific operation process is as follows: placing the unformed device formed in step 3 of this example into an ALD reaction chamber; introducing trimethylaluminum into the ALD reaction chamber to serve as an Al source, and introducing water to serve as an O source, wherein the flow rate of the trimethylaluminum is 50sccm, and the flow rate of the water is 60 sccm; depositing a layer of 10nm thick Al by atomic layer deposition under the conditions of 200 ℃ of temperature, 0.1s of feed time and 4s and 6s of purging time of trimethylaluminum and water respectively2O3A dielectric layer; in the Al2O3Photoresist is spin-coated on the dielectric layer, and the Al is coated on the dielectric layer by a photoetching process2O3Making a pattern of a first gate dielectric layer on the dielectric layer, and etching Al except the pattern of the first gate dielectric layer by a hydrochloric acid wet method2O3The material is removed and the remaining photoresist is removed to obtain the first gate dielectric layer 5, as shown in fig. 2 d.
And 5: SiN is grown on the upper surface of the first gate dielectric layer 5xAnd forming a second dielectric layer.
The specific operation process is as follows: placing the unformed device formed in step 4 of this example into an ICP-CVD reaction chamber; with SiH4As a source of Si, with N2Introducing into ICP-CVD reaction chamber as nitrogen source, wherein SiH4And N2The volume ratio of (A) to (B) is 1 to 1.5; depositing a layer of SiN with the thickness of 40nm on the upper surface of the first gate dielectric layer 5 by using a plasma chemical vapor deposition technology at the temperature of 75 ℃ and the pressure of 0.1mbarxA dielectric layer; in the SiNxPhotoresist is spin-coated on the dielectric layer, and the SiN is subjected to a photoetching processxPatterning a second gate dielectric layer on the dielectric layer, and etching off SiN outside the second gate dielectric layer by dry methodxThe material is removed, and then the remaining photoresist is removed, resulting in the second gate dielectric layer 6, as shown in fig. 2 e.
Step 6: and growing a gate electrode on the upper surface of the second gate dielectric layer 6.
Specifically, spin-coating photoresist on the upper surface of the second gate dielectric layer 6; making a gate metal window on the upper surface of the second gate dielectric layer 6 by using a second mask shown in fig. 4 and adopting a photoetching process; growing a layer of Al film with the thickness of 50nm in the gate metal window by adopting a metal evaporation process; removing the residual photoresist on the second gate dielectric layer 6 to form a gate electrode, and finally forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with a double-layer gate dielectric as shown in figure 2 f.
Example four
On the basis of the above-described embodiment, the present embodiment is to fabricate a substrate of single crystal diamond, Al2O3/SiNxThe preparation method of the embodiment of the invention is described in detail by taking a diamond field effect transistor with a total thickness of the double-layer gate dielectric of 20nm as an example.
Referring again to fig. 2a to 2f, the preparation method of the present embodiment includes:
step 1: a single crystal diamond substrate 1 was selected.
The single crystal diamond with the thickness of 0.8mm is selected as the substrate.
Step 2: a hydrogen termination adsorption layer 2 is formed on the upper surface of the diamond substrate 1.
Specifically, the single crystal diamond 1 substrate is placed in a reaction chamber of MPCVD, and hydrogen with the flow rate of 1000sccm is introduced to form hydrogen plasma; treating in hydrogen plasma for 30min under the conditions that the pressure in the reaction chamber is 150mbar, the reaction temperature is 950 ℃ and the microwave power is 2.5kW to obtain a hydrogen terminal surface; the hydrogen-terminated surfaces adsorb active materials in the air to form hydrogen-terminated adsorption layers 2, as shown in fig. 2 a.
And step 3: and growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer.
Specifically, the step 3 includes:
step 31: depositing an Au film 8 with the thickness of 180nm on the surface of the hydrogen terminal adsorption layer 2 by adopting an electron beam evaporation process to protect the hydrogen terminal adsorption layer 2 and form ohmic contact with the hydrogen terminal adsorption layer 2, as shown in figure 2b, wherein the current of electron beam evaporation is 200mA, and the voltage is 7.5 KV;
step 32: using the first mask shown in fig. 3, spin-coating a photoresist on the upper surface of the Au film 8, exposing using a lithography machine, and then developing to form a source electrode pattern and a drain electrode pattern;
step 33: using KI/I2Etching the Au film 8 uncovered by the photoresist by the solution for 40 s;
step 33: the remaining photoresist is removed and finally a source electrode 3 and a drain electrode 4 are formed on the respective sides of the upper surface of the hydrogen termination adsorption layer, as shown in fig. 2 c.
And 4, step 4: al is grown on the upper surface of the source electrode 3, the upper surface of the drain electrode 4, and the upper surface of the hydrogen termination adsorption layer 2 between the source electrode 3 and the drain electrode 42O3And forming a first dielectric layer by using the material.
Specific operation processComprises the following steps: placing the unformed device formed in step 3 of this example into an ALD reaction chamber; introducing trimethylaluminum into the ALD reaction chamber to serve as an Al source, and introducing water to serve as an O source, wherein the flow rate of the trimethylaluminum is 50sccm, and the flow rate of the water is 60 sccm; depositing a layer of 10nm thick Al by using an atomic layer deposition technique under the conditions that the temperature is 250 ℃, the feed time is 0.1s and the purging time of trimethylaluminum and water is 4s and 6s respectively2O3A dielectric layer; in the Al2O3Photoresist is spin-coated on the dielectric layer, and the Al is coated on the dielectric layer by a photoetching process2O3Making a pattern of a first gate dielectric layer on the dielectric layer, and etching Al except the pattern of the first gate dielectric layer by a hydrochloric acid wet method2O3The material is removed and the remaining photoresist is removed to obtain the first gate dielectric layer 5, as shown in fig. 2 d.
And 5: SiN is grown on the upper surface of the first gate dielectric layer 5xAnd forming a second dielectric layer.
The specific operation process is as follows: placing the unformed device formed in step 4 of this example into an ICP-CVD reaction chamber; with SiH4As a source of Si, with N2Introducing into ICP-CVD reaction chamber as nitrogen source, wherein SiH4And N2The volume ratio of (A) to (B) is 1 to 1.5; depositing a layer of SiN with the thickness of 10nm on the upper surface of the first gate dielectric layer 5 by using a plasma chemical vapor deposition technology under the conditions of the temperature of 100 ℃ and the pressure of 0.1mbarxA dielectric layer; in the SiNxPhotoresist is spin-coated on the dielectric layer, and the SiN is subjected to a photoetching processxPatterning a second gate dielectric layer on the dielectric layer, and etching off SiN outside the second gate dielectric layer by dry methodxThe material is removed, and then the remaining photoresist is removed, resulting in the second gate dielectric layer 6, as shown in fig. 2 e.
Step 6: and growing a gate electrode on the upper surface of the second gate dielectric layer 6.
Specifically, spin-coating photoresist on the upper surface of the second gate dielectric layer 6; making a gate metal window on the upper surface of the second gate dielectric layer 6 by using a second mask shown in fig. 4 and adopting a photoetching process; growing a layer of Al film with the thickness of 200nm in the gate metal window by adopting a metal evaporation process; removing the secondForming a gate electrode by using the residual photoresist on the gate dielectric layer 6, and finally forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with a double-layer gate dielectric as shown in figure 2 f.
The double-layer gate dielectric prepared by the preparation method of the embodiment adopts a low-temperature growth mode, so that the diamond hydrogen terminal and the adsorption layer on the surface of the diamond hydrogen terminal can not be damaged, and a channel region can have higher carrier concentration, so that higher saturated output current is obtained, and the characteristics of a device are improved.
EXAMPLE five
Referring to fig. 5 and 6, fig. 5 is a schematic diagram of an Al-based film according to an embodiment of the present invention2O3/SiNxThe structure schematic diagram of the diamond field effect transistor with double-layer gate dielectric; fig. 6 is a sectional view taken along line a-a of fig. 5. The present example provides an Al-based alloy2O3/SiNxThe diamond field effect transistor with double-layer gate dielectric comprises a diamond substrate 1, a hydrogen terminal adsorption layer 2, an electrode layer and Al from top to bottom2O3Dielectric layer 5, SiNxA dielectric layer 6 and a gate electrode 7, wherein the electrode layer comprises a source electrode 3 and a drain electrode 4 which are arranged in parallel and respectively positioned on two sides of the upper surface of the hydrogen terminal adsorption layer 2; al (Al)2O3The dielectric layer 5 covers the upper surface of the source electrode 3, the upper surface of the drain electrode 4 and the upper surface of the hydrogen terminal adsorption layer 2 between the source electrode 3 and the drain electrode 4; the gate electrode 7 is arranged in SiNxThe middle of the upper surface of the dielectric layer 6 and parallel to the source electrode 3 and the drain electrode 4. In the present embodiment, the source electrode 3 and the drain electrode 4 are made of Au metal; the gate electrode 7 is made of Al metal.
Further, in the present embodiment, the thickness of the diamond substrate 1 is 0.3 to 1mm, the thickness of each of the source electrode 3 and the drain electrode 4 is 80 to 180nm, and Al is2O3The dielectric layer 5 is 5-20nm thick and is composed of SiNxThe thickness of the dielectric layer 6 is 5-40nm, and the thickness of the gate electrode 7 is 50-200 nm.
Al-based alloy of the present example2O3/SiNxThe diamond field effect transistor with double-layer gate dielectric adopts Al2O3/SiNxA double-layer structure asThe gate dielectric improves the frequency characteristic of the device, and the double-layer gate dielectric also plays a role in passivation, so that the stability of the device is obviously enhanced.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. Based on Al2O3/SiNxThe preparation method of the diamond field effect transistor with the double-layer gate medium is characterized by comprising the following steps:
s1: selecting a diamond substrate;
s2: growing a hydrogen terminal adsorption layer on the upper surface of the diamond substrate;
s3: growing a source electrode and a drain electrode on the upper surface of the hydrogen termination adsorption layer;
s4: growing Al on the upper surfaces of the source electrode, the drain electrode, and the hydrogen termination adsorption layer between the source electrode and the drain electrode2O3A material forming a first dielectric layer;
s5: growing SiN on the upper surface of the first dielectric layerxForming a second dielectric layer of material;
s6: growing a gate electrode on the upper surface of the second dielectric layer to form an Al-based layer2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
2. The method according to claim 1, wherein the S1 includes:
0.3-1mm of single crystal or polycrystalline diamond is selected as the substrate.
3. The method according to claim 1, wherein the S2 includes:
s21: treating the diamond substrate in hydrogen plasma for 5-30min at the temperature range of 700-;
s22: cooling the diamond substrate after plasma treatment to room temperature in a hydrogen environment, and forming a hydrogen terminal surface on the surface of the diamond substrate;
s23: and adsorbing active substances or atomic groups in the air on the hydrogen terminal surface to form a hydrogen terminal adsorption layer.
4. The method according to claim 1, wherein the S3 includes:
s31: depositing an Au film with the thickness of 80-180nm on the surface of the hydrogen terminal adsorption layer, wherein the Au film and the hydrogen terminal adsorption layer form ohmic contact;
s32: spin-coating a photoresist on the upper surface of the Au film;
s33: forming a source electrode pattern and a drain electrode pattern on the Au film coated with the photoresist by using a photolithography process using a first mask;
s34: etching off the Au film which is not coated with the photoresist by using a chemical etching method;
s35: and removing the residual photoresist at the positions of the source electrode and the drain electrode to form the source electrode and the drain electrode.
5. The method according to claim 1, wherein the S4 includes:
growing a layer of 5-20nm Al on the upper surface of the source electrode, the upper surface of the drain electrode and the upper surface of the hydrogen terminal adsorption layer between the source electrode and the drain electrode by utilizing an atomic layer deposition process within the temperature range of 150-2O3And forming a first dielectric layer by using the material.
6. The method according to claim 5, wherein the S5 includes:
growing a layer of 5-40nm Si on the upper surface of the first dielectric layer by using a plasma chemical vapor deposition process at the temperature of 50-100 DEG CNxAnd forming a second dielectric layer.
7. The production method according to any one of claims 1 to 6, wherein the S6 includes:
s61: spin-coating photoresist on the upper surface of the second dielectric layer;
s62: making a gate metal window on the upper surface of the second dielectric layer by using a second mask and a photoetching process;
s63: growing an Al film with the thickness of 50-200nm in the gate metal window by adopting a metal evaporation process;
s64: removing the residual photoresist on the second dielectric layer to form a gate electrode, thereby forming the Al-based gate electrode2O3/SiNxA diamond field effect transistor with double-layer gate dielectric.
8. Based on Al2O3/SiNxThe diamond field effect transistor with double-layer gate dielectric is characterized by comprising a diamond substrate (1), a hydrogen terminal adsorption layer (2), an electrode layer and Al from top to bottom2O3Dielectric layer (5), SiNxA dielectric layer (6) and a gate electrode (7), wherein,
the electrode layer comprises a source electrode (3) and a drain electrode (4) which are arranged in parallel and respectively positioned on two sides of the upper surface of the hydrogen terminal adsorption layer (2);
the Al is2O3The dielectric layer (5) covers the upper surface of the source electrode (3), the upper surface of the drain electrode (4) and the upper surface of the hydrogen terminal adsorption layer (2) between the source electrode (3) and the drain electrode (4) at the same time;
the gate electrode (7) is arranged on the SiNxThe middle part of the upper surface of the dielectric layer (6) is parallel to the source electrode (3) and the drain electrode (4).
9. Al-based according to claim 82O3/SiNxThe diamond field effect transistor with double-layer gate medium is characterized in that the source electrode (3) and the drain electrode (4) are made of Au metalForming; the gate electrode (7) is made of Al metal.
10. Al-based according to claim 8 or 92O3/SiNxThe diamond field effect transistor with double-layer gate dielectric is characterized in that the thickness of the diamond substrate (1) is 0.3-1mm, the thickness of the source electrode (3) and the thickness of the drain electrode (4) are both 80-180nm, and the Al is2O3The thickness of the dielectric layer (5) is 5-20nm, and the SiNxThe thickness of the dielectric layer (6) is 5-40nm, and the thickness of the gate electrode (7) is 50-200 nm.
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