CN110827742A

CN110827742A - Panel control circuit

Info

Publication number: CN110827742A
Application number: CN201911180252.6A
Authority: CN
Inventors: 罗敬凯; 贾浩
Original assignee: Fujian Huajiacai Co Ltd
Current assignee: Fujian Huajiacai Co Ltd
Priority date: 2019-11-27
Filing date: 2019-11-27
Publication date: 2020-02-21

Abstract

A panel control circuit comprises a thin film transistor T_A1、T_A2、T_A3、T_B1、T_B2、T_C1、T_C2、T_D1、T_D2(ii) a The T is_A1、T_A2The gate of which is connected to a select voltage; t is_A1The source electrode of the first transistor is connected with the upper two-stage scanning signal, the drain electrode is connected with the T_A2Source electrode and T_A3Drain electrode connection of, T_A2Drain electrode of and T_A3The gate of (1) is connected; the T is_A3Source of the capacitor C3 and one terminal of the capacitor T_B1Source connection of T_A3And also with the other end of the capacitance C3 and T_B1Of said gate electrode, T_B1Drain electrode of and T_B2Is connected to the source of (a). The above technical solution provides a new control structure for performing function complementation with the conventional GIP circuit, so that the GIP can be manufactured to have a waveform for detection function in addition to the waveform transmission function for light emission. The functions of the panel control circuit are enriched, and the practicability of the panel control circuit is improved.

Description

Panel control circuit

Technical Field

The present invention relates to a panel control circuit design, and more particularly, to a control circuit capable of detecting GIP waveforms.

Background

The requirement of cost saving has been a very important issue in panels developed from the past to the present, wherein the GIP circuit is becoming popular, because the GIP circuit has the main advantages of saving the cost of the GateIC and reducing the panel frame, so the GIP circuit is used in the panel.

In the circuit design of the existing panel, no matter single drive or double drive, only waveform signals for light emission are generated to help the gates to be turned on one by one, so that light emission data are written one by one, and the light emission data are maintained until the same-row gates are turned on again to update the light emission data.

However, with the increasing possibility of the panel requirements in the future, if the waveform generated by the GIP circuit can be used to process the waveform signal for controlling the light emission and also can generate another waveform signal, the waveform signal can be used to detect the output of the GIP circuit, so that the function of the GIP circuit can be increased more, and the panel quality can be improved more.

Disclosure of Invention

Therefore, it is desirable to provide a new panel control circuit to expand the function of the GIP circuit.

To achieve the above object, the inventors provide a panel control circuit including a thin film transistor T_A1、T_A2、T_A3、T_B1、T_B2、T_C1、T_C2、T_D1、T_D2(ii) a The T is_A1、T_A2The gate of which is connected to a select voltage; t is_A1The source electrode of the first transistor is connected with the upper two-stage scanning signal, the drain electrode is connected with the T_A2Source electrode and T_A3Drain electrode connection of, T_A2Drain electrode of and T_A3The gate of (1) is connected; the T is_A3Source of the capacitor C3 and one terminal of the capacitor T_B1Source connection of T_A3And also with the other end of the capacitance C3 and T_B1Of said gate electrode, T_B1Drain electrode of and T_B2Is connected to the source of (a); the T is_B2Is connected with the detection signal, and the drain is connected with T_C1Of said T_C1And also T_C2Source connection of T_C1And T_C2The gate of the first transistor is connected with a reset signal; the T is_A2And also T_D2Of the grid connection, T_D2Source and T of_D1Of the drain electrode of, the T_D1The gate of the detector is connected with the detection signal.

In particular, the T_A3Is used for being connected with FW signal, T_B2Is used for being connected with the scanning signal of the current stage through a capacitor, and the T_C2For connection to a VGL voltage; the T is_D2For connection to the VGL voltage, the T_D1The source of (a) is used to connect with the clock signal CK through a capacitor.

Different from the prior art, the technical scheme provides a new control structure which is used for performing function complementation with the traditional GIP circuit, so that the GIP can also be manufactured to be used as a detection function besides a waveform transmission function for light emission. The functions of the panel control circuit are enriched, and the practicability of the panel control circuit is improved.

Drawings

FIG. 1 is a diagram of a panel detection circuit according to an embodiment;

FIG. 2 is a diagram of a conventional GIP circuit according to an embodiment;

FIG. 3 is a waveform diagram illustrating light emission and detection according to an embodiment;

FIG. 4 is a timing diagram illustrating a detection mode according to an embodiment.

Detailed Description

To explain technical contents, structural features, and objects and effects of the technical solutions in detail, the following detailed description is given with reference to the accompanying drawings in conjunction with the embodiments.

The present invention relates to a panel control circuit, which comprises a thin film transistor T in FIG. 1_A1、T_A2、T_A3、T_B1、T_B2、T_C1、T_C2、T_D1、T_D2(ii) a The T is_A1、T_A2The gate of which is connected to a select voltage; t is_A1The source electrode of the first transistor is connected with the upper two-stage scanning signal, the drain electrode is connected with the T_A2Source electrode and T_A3Drain electrode connection of, T_A2Drain electrode of and T_A3The gate of (1) is connected; the T is_A3Source of the capacitor C3 and one terminal of the capacitor T_B1Source connection of T_A3And also with the other end of the capacitance C3 and T_B1Of said gate electrode, T_B1Drain electrode of and T_B2Is connected to the source of (a); the T is_B2Is connected with the detection signal, and the drain is connected with T_C1Of said T_C1And also T_C2Source connection of T_C1And T_C2The gate of the first transistor is connected with a reset signal; the T is_A2And also T_D2Of the grid connection, T_D2Source and T of_D1Of the drain electrode of, the T_D1The gate of the detector is connected with the detection signal. The dotted line frame shown in fig. 1 has been the main concept of the present design, and the present invention provides a new panel control circuit structure, which can expand the functions of the existing GIP circuit only by connecting the structures in the dotted line frame in the manner shown in the figure. Fig. 2 shows the design of the prior GIP circuit, and the matching relationship between the design in fig. 1 and the design in fig. 2 can be more intuitively seen. In a specific practical example, the T_A3The source of (2) is used for being connected with an FW signal, wherein FW is a direct current high voltage; the T is_B2Is used for being connected with the scanning signal of the current stage through a capacitor, and the T_C2For connection to a VGL voltage; the T is_D2For connection to the VGL voltage, the T_D1The source of (a) is used to connect with the clock signal CK through a capacitor. With the above-described design, the new circuit can output not only the light emission waveform signal but also the detection waveform signal, as shown in fig. 3.

As shown in FIG. 3, the display mode is divided into two modes, i.e., normal display mode and arbitrary waveform generating mode, in which FW DC high voltage, BW DC low voltage, and two clock signals with CK and CKB opposite to each other

Normal display mode:

(1) the high voltage of G (n-2) signal turns on T1 and T2 simultaneously, FW high voltage write charges Q to H, T2 turns on to keep P low, ensuring T3 and T6 turn off

(2) The CK signal goes high, the Q point voltage is charged to 2 times H through C2, and the CK signal outputs the Scan signal through T4

(3) The high voltage of the G (n +2) signal turns on T7 to write BW low, Q is pulled low, CK and CKB alternately keep Q low, where CKB pulls Q low through T5, CK pulls P high through C1 turns on T3 and T6 to pull Q low.

Generating an arbitrary level waveform pattern:

in the normal display mode, the GIP continuously works to output the scan signal, the G-Select can Select any stage of output waveform, and the T is increased when the G-Selcet is increased_A1And T_A2Turn on M point to charge high, T_A2And T_A3Acting together to reduce leakage current while capacitor C3 is used to maintain point M at a high voltage, and when G-Sense is raised, point Q is charged to a high voltage, T_D1Opening to keep the point P at a low voltage; the detected GIP signal waveform is sent out through CK and T4, and finally when G-Reset and G-Select are turned on, the whole GIP circuit is Reset, as shown in FIG. 4, which is a timing diagram of the GIP circuit, wherein the Q point is the Q point of the detection stage GIP, the G-Select selects a certain stage signal to be stored through the M point, and when G-Sense is raised, the detection waveform is output.

It should be noted that, although the above embodiments have been described herein, the invention is not limited thereto. Therefore, based on the innovative concepts of the present invention, the technical solutions of the present invention can be directly or indirectly applied to other related technical fields by making changes and modifications to the embodiments described herein, or by using equivalent structures or equivalent processes performed in the content of the present specification and the attached drawings, which are included in the scope of the present invention.

Claims

1. A panel control circuit comprises a thin film transistor T_A1、T_A2、T_A3、T_B1、T_B2、T_C1、T_C2、T_D1、T_D2(ii) a The T is_A1、T_A2The gate of which is connected to a select voltage; t is_A1The source electrode of the first transistor is connected with the upper two-stage scanning signal, the drain electrode is connected with the T_A2Source electrode and T_A3Drain electrode connection of, T_A2Drain electrode of and T_A3The gate of (1) is connected; the T is_A3Source of the capacitor C3 and one terminal of the capacitor T_B1Source connection of T_A3And also with the other end of the capacitance C3 and T_B1Of said gate electrode, T_B1Of the drain electrodeAnd T_B2Is connected to the source of (a); the T is_B2Is connected with the detection signal, and the drain is connected with T_C1Of said T_C1And also T_C2Source connection of T_C1And T_C2The gate of the first transistor is connected with a reset signal; the T is_A2And also T_D2Of the grid connection, T_D2Source and T of_D1Of the drain electrode of, the T_D1The gate of the detector is connected with the detection signal.

2. The panel control circuit of claim 1, wherein T is_A3Is used for being connected with FW signal, T_B2Is used for being connected with the scanning signal of the current stage through a capacitor, and the T_C2For connection to a VGL voltage; the T is_D2For connection to the VGL voltage, the T_D1The source of (a) is used to connect with the clock signal CK through a capacitor.