CN110826294B - Memristor circuit super-multi-stability reconstruction method based on Wei Kuyu - Google Patents
Memristor circuit super-multi-stability reconstruction method based on Wei Kuyu Download PDFInfo
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Abstract
The invention provides a memristor circuit super multi-stability reconstruction method based on Wei Kuyu. According to the method, incremental integral transformation is carried out on a memristor circuit volt-ampere domain circuit equation, voltage and current state variables of a volt-ampere domain are converted into incremental magnetic flux and incremental charge state variables of Wei Kuyu, a Wei Kujiang-dimensional model for explicitly expressing the state initial value of a memristor circuit dynamic element is obtained, and the ultra-multi-stability sensitive to the initial value in the volt-ampere domain is reconstructed into complex dynamic behaviors depending on system parameters in a Wei Ku domain. Thus, stable observation of the super-multi-stability phenomenon is realized in the hardware circuit. The method solves the problem that the ideal memristor circuit cannot realize super multi-stability mechanism analysis and stable hardware test in the volt-ampere domain.
Description
Technical Field
The invention relates to the field of electrical theory and new technology, in particular to a memristor circuit super-multi-stability reconstruction method based on Wei Kuyu.
Background
Memristive circuits with infinite balance points have dynamics that are extremely dependent on the state onset of the memristive elements. The system parameters are kept unchanged, the state initial value of the dynamic element is changed, the circuit running track can asymptotically trend to different stable states, and the characteristic super multi-stability phenomenon of the memristor circuit is shown. These co-existing super-multistable modes can provide more flexibility for engineering applications of memristive circuits, while also presenting new challenges to traditional dynamics analysis and super-multistable control strategies. In the prior art, the super multi-stability is usually researched by only carrying out numerical simulation or circuit simulation, or by repeatedly switching a circuit in a hardware circuit to enable a dynamic element to randomly sense a state initial value, so as to capture the coexistence behavior of multiple attractors. The experimental test method has uncertainty, and can not realize the accurate control of coexisting multiple attractors and the point-to-point experimental test.
There have been some literature reports on Wei Kujiang-dimensional modeling methods using charge and magnetic flux as state variables, where memristions are described as non-dynamic elements to reduce the dimensionality of mathematical models and simplify the difficulty of kinetic analysis. However, the influence of the state initial value is not considered in the literature, so that the constructed Wei Ku model cannot accurately describe the multi-stability or super-multi-stability of the original memristor circuit depending on the state initial value.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the memristor circuit super-stability dimension-reduction reconstruction method with the incremental charge and the incremental magnetic flux as state variables is provided to overcome the defects in the existing super-stability analysis and test technology, and realizes the mechanism analysis and accurate test of the memristor circuit super-stability.
The technical scheme adopted for solving the technical problems is as follows: a memristor circuit super multi-stability reconstruction method based on Wei Kuyu comprises the following steps:
step 1: the method comprises the steps of adopting incremental magnetic flux and incremental charge as state variables, constructing a dimension reduction model of the super multi-stability memristor circuit at Wei Kuyu through incremental integral transformation based on a volt-ampere domain circuit model of the memristor circuit;
step 2: the state initial value of each dynamic element in the original volt-ampere domain circuit model is explicitly expressed by adopting a constant system parameter, and a Wei Kujiang-dimensional model for explicitly expressing the state initial value of the memristor circuit is obtained;
step 3: based on a Wei Kujiang-dimensional model normalization system equation, a state-controllable super multi-stability hardware test circuit is constructed, and an external direct-current voltage source is used for representing constant system parameters related to initial values; the running state of the circuit is controlled by adjusting an externally-added direct current control signal, so that point-to-point observation of super-stability in the original volt-ampere model is realized.
A voltage-current domain circuit model of a Chua's memristor circuit based on two memristors is expressed as:
wherein V is 1 (t)、V 2 (t)、V 3 (t) is the node voltage of the memristive Chua's circuit, V 4 (t) and V 5 (t) internal state variables for two memristors, k=r 3 /R 2 ,C 1 、C 2 、C 3 、R、R 1 、R 2 、R 3 As main circuit element parameter, C 4 、C 5 、R a 、R c 、R b 、R d 、R e 、R f And g 1 、g 2 Is a circuit element parameter of two memristor simulators;
integrating the volt-ampere domain circuit model of the formula (1) in the [0, t ] time period to obtain a corresponding third-order Wei Kujiang-dimensional model:
wherein, memristor simulator W 4 At [0, t]The incremental charge over the time period is:
memristor simulator W 5 At [0, t]The incremental charge over the time period is:
in the formulas (4), (5) and (7),is V (V) i (t) is in the range of [0, t]An incremental magnetic flux integrated over a period of time, and +.> V i (0) Five state variables V of formula (1) i (t) an initial value (i=1 to 5) at time t=0;
three new variables are introduced to scale the circuit parameters in dimensionless form:
the formula (7) is rewritten as:
wherein:
based on the normalized system models of the formulas (9) and (10), an equivalent realization circuit of a Wei Kujiang-dimensional model is designed: three differential equations in the formula (9) are realized by three integrating channels formed by a proportional operation circuit and an integrating circuit based on an operational amplifier; the nonlinear operation in the formula (10) is realized by a multiplier and a proportional operation circuit based on an operational amplifier;
the corresponding circuit equation can be expressed as:
wherein:
in an equivalent implementation circuit of a Wei Kujiang-dimensional modelAdopts five externally-added direct current power supplies V D1 、V D2 、V D3 、V D4 And V D5 Accurately assigning the initial value correlation constant system parameters; the operating state of the circuit is controlled by adjusting an externally-added direct current control signal, so that point-to-point observation of super-stability in the original volt-ampere model is realized.
The beneficial effects of the invention are as follows: the initial state parameters hidden in the memristor circuit volt-ampere model are explicitly expressed in the Wei Kujiang-dimensional model in the form of constant system parameters by an incremental Wei Kujiang-dimensional modeling method, so that the initial sensitive super-multi-stability in the volt-ampere model is reconstructed into relatively stable complex dynamic behaviors depending on the system parameters in the Wei Kujiang-dimensional model, and the quantitative analysis and the point-to-point experimental test of the super-multi-stability are facilitated.
Drawings
The invention is further described below with reference to the drawings and examples.
FIG. 1 is a flow chart of a memristor circuit super-multi-stability reconstruction method based on Wei Kuyu in the present invention;
FIG. 2 is a block diagram of an exemplary double memristive Chua's circuit in accordance with the present invention, wherein FIG. (a) is a double memristive Chua's circuit with super multi-stability; FIG. (b) is a memristor simulator W 4 The method comprises the steps of carrying out a first treatment on the surface of the FIG. (c) is a memristor simulator W 5 ;
FIG. 3 is a super multi-stability hardware test circuit constructed based on a normalized Wei Kujiang dimensional model; wherein, the diagram (a) is a main circuit; FIG. (b) is an equivalent implementation circuit of memristive normalized nonlinear charge-magnetic flux relationship;
FIG. 4 shows simulation and test results of the co-periodic attractor, wherein FIG. (a) is c 1 =10 -9 ,c 2 =c 3 A numerical simulation plot on the x-z plane at =η=0, μ= ±2.1; FIG. (b) shows the applied current V D4 = ±2.1V, other currents select V D1 =10 -9 V≈0V,V D2 =V D3 =V D5 When=0v, V x -v z The coexisting attractors on the plane verify the results;
FIG. 5 is a coexistenceSimulation and test results of chaotic attractor, wherein the graph (a) is c 1 =10 -9 ,c 2 =c 3 An x-z plane numerical simulation plot at =η=0, μ= ±1.9; FIG. (b) shows the applied current V D4 = ±1.9V, other currents select V D1 =10 -9 V≈0V,V D2 =V D3 =V D5 When=0v, V x -v z The coexisting attractors on the plane verify the results;
FIG. 6 shows simulation and test results of an asymmetric coexistence attractor, wherein FIG. (a) is c 1 =10 -9 ,c 2 =c 3 An x-z plane numerical simulation plot at =η=0, μ= ±0.9; FIG. (b) shows the applied current V D4 = ±0.9V, other currents select V D1 =10 -9 V≈0V,V D2 =V D3 =V D5 When=0v, V x -v z The co-existence attractor on the plane verifies the results.
Detailed Description
The present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 is a flow chart of a method for super-multi-stability reconstruction of a memristive circuit based on Wei Kuyu in the present disclosure, which is merely illustrative of the basic flow of the proposed method of the present disclosure, and thus only shows the structures related to the present disclosure.
As shown in fig. 1, the present invention provides a memristor circuit super multi-stability reconstruction method based on Wei Kuyu, which is characterized in that: the method comprises the following steps:
step 1: the method comprises the steps of adopting incremental magnetic flux and incremental charge as state variables, constructing a dimension reduction model of the super multi-stability memristor circuit at Wei Kuyu through incremental integral transformation based on a volt-ampere domain circuit model of the memristor circuit;
step 2: the state initial value of each dynamic element in the original volt-ampere domain circuit model is explicitly expressed by adopting a constant system parameter, and a Wei Kujiang-dimensional model for explicitly expressing the state initial value of the memristor circuit is obtained;
step 3: based on a Wei Kujiang-dimensional model normalization system equation, a state-controllable super multi-stability hardware test circuit is constructed, and an external direct-current voltage source is used for representing constant system parameters related to initial values; the operating state of the circuit is controlled by adjusting an externally-added direct current control signal, so that point-to-point observation of super-stability in the original volt-ampere model is realized.
Establishing a memristor circuit volt-ampere domain circuit model, converting voltage and current state variables of a volt-ampere domain into Wei Kuyu incremental magnetic flux and incremental charge state variables by performing incremental integral transformation on the memristor circuit volt-ampere domain circuit model, constructing a Wei Kujiang-dimensional model for explicitly expressing the state initial value of a memristor circuit dynamic element, and explicitly expressing the state initial value implied by the volt-ampere domain circuit model as an initial value related constant system parameter; the initial sensitive super-stability in the voltammetric domain is reconstructed into a relatively stable complex dynamic behavior in the Wei Ku domain that depends on the system parameters. Then, normalizing the state variables and the circuit parameters in the Wei Kujiang-dimensional model, and establishing a normalized system model of the Wei Kujiang-dimensional model; adopting an analog multiplier, and equivalently realizing a normalized Wei Kujiang-dimensional model by a proportional operation circuit and an integral circuit based on an operational amplifier; in the hardware circuit, an external direct current voltage source is adopted to carry out accurate assignment on the initial value related constant system parameters, so that the hardware test of super multi-stability is realized.
As shown in the diagram (a) of FIG. 2, the double memristive Chua's circuit with super multi-stability comprises an operational amplifier U and two ideal memristor simulators W 4 And W is 5 Resistor R, R 1 、R 2 And R is 3 Capacitance C 1 、C 2 And C 3 The inverting input of the operational amplifier U passes through the resistor R 3 Rear ground, resistance R 1 One end is connected with the positive input end of the operational amplifier U, the other end is connected with the output end of the operational amplifier U, and the resistor R 2 One end is connected with the reverse input end of the operational amplifier U, the other end is connected with the output end of the operational amplifier U, and the voltage of the output end of the operational amplifier U is V 3 Capacitance C 1 Ideal memristor simulator W 4 After being connected in parallel, one common end is grounded, the other common end is connected in series with a resistor R, and the other end of the resistor R is connected in series with a capacitor C 3 Then is connected to the output end of the operational amplifier U, and an ideal memristor simulator W 5 One end is connected with a capacitor C 3 And the common end of the resistor R, the other end is grounded, and the capacitor C 2 One end is connected with the positive input end of the operational amplifier U, and the other end is connected with the capacitor C 3 And the common terminal of resistor R. The voltage at the two ends of the resistor R is V 1 And V 2 Flow-through ideal memristor simulator W 4 And W is 5 The current of (2) is i respectively 4 And i 5 。
As shown in FIG. 2 (b), an ideal memristor simulator W 4 Equivalent implementation circuit comprising an operational amplifier U 1 、U 2 And U 3 Two analog multipliers M 1 And M 2 Resistance R a 、R b 、R e And R is f Capacitance C 4 ,g 1 For two analogue multipliers M 1 And M 2 Is a gain factor of (2); operational amplifier U 1 Is connected with memristor W at the non-inverting input end 4 An input terminal positive electrode of (a); operational amplifier U 1 Is connected to the inverting input terminal of the operational amplifier U 1 An output terminal of (a); resistor R a One end connected with operational amplifier U 1 The other end is connected with the operational amplifier U 2 Is provided; resistor R b Terminating in an analog multiplier M 2 The other end is connected with the operational amplifier U 3 Is provided; resistor R e One end connected with operational amplifier U 3 The other end is connected with the operational amplifier U 3 An output terminal of (a); resistor R f One end connected with operational amplifier U 3 The other end is connected with the operational amplifier U 3 An output terminal of (a); capacitor C 4 One end connected with operational amplifier U 2 The other end is connected with the operational amplifier U 2 An output terminal of (a); analog multiplier M 1 Is connected to the operational amplifier U 2 An output terminal of (a); analog multiplier M 2 Is connected with an analog multiplier M 1 The other input end is connected with memristor W 4 An input terminal positive electrode of (a); operational amplifier U 2 Is grounded; operational amplifier U 3 Is connected with memristor W at the non-inverting input end 4 Is connected with the positive electrode of the input terminal.
As in fig. 2(c) The diagram shows an ideal memristor simulator W 5 Equivalent implementation circuit comprising an operational amplifier U 4 And U 5 Two analog multipliers M 3 And M 4 Resistance R c And R is d Capacitance C 5 ,g 2 For two analogue multipliers M 3 And M 4 Is a gain factor of (2); operational amplifier U 4 Is connected with memristor W at the non-inverting input end 5 An input terminal positive electrode of (a); operational amplifier U 4 Is connected to the inverting input terminal of the operational amplifier U 4 An output terminal of (a); resistor R c One end connected with operational amplifier U 4 The other end is connected with the operational amplifier U 5 Is provided; resistor R d Terminating in an analog multiplier M 4 The other end is connected with memristor W 5 An input terminal positive electrode of (a); capacitor C 5 One end connected with operational amplifier U 5 The other end is connected with the operational amplifier U 5 An output terminal of (a); analog multiplier M 3 Is connected to the operational amplifier U 5 An output terminal of (a); analog multiplier M 4 Is connected with an analog multiplier M 3 The other input end is connected with memristor W 5 An input terminal positive electrode of (a); operational amplifier U 5 Is grounded.
The voltammetric domain circuit model of the double memristive Chua's circuit is as follows:
wherein V is 1 (t)、V 2 (t)、V 3 (t) is the node voltage of the memristive Chua's circuit, V 4 (t) and V 5 (t) internal state variables for two memristors, k=r 3 /R 2 . The main circuit parameter is set to C 1 =5nF、C 2 =C 3 =100nF、R=1.5kΩ、R 1 =10kΩ、R 2 =1kΩ and R 3 =50Ω, and the parameters of the two memristive simulators are fixed to C 4 =C 5 =5nF、R a =R c =10kΩ、R b =1.4kΩ、R d =100Ω、R e =R f =2kΩ and g 1 =g 2 =0.1。
First, an accurate Wei Ku model of the memristor simulator is constructed: based on V 1 dτ=-R a C 4 dV 4 Memristor simulator W 4 At [0, t]The incremental charge over the time period is:
as a result of the fact that,
formula (2) is rewritable:
similarly, memristor simulator W 5 At [0, t]The incremental charge over the time period is:
V 4 (0) And V 5 (0) Representing memristor simulator W 4 And W is 5 State initial value of (2).
Further, wei Kujiang-dimensional modeling was performed on memristive zeiss circuits: is provided with
Integrating the first three equations of the memristive Chua's circuit volt-ampere domain circuit model (1) in the [0, t ] time period to obtain a third-order Wei Kujiang-dimensional model:
in the method, in the process of the invention,and->Is V (V) 1 (t)、V 2 (t) and V 3 (t) is in the range of [0, t]An incremental magnetic flux integrated over a period of time, and +.>V 1 (0)、V 2 (0)、V 3 (0)、V 4 (0) And V 5 (0) The initial values of five state variables of the original volt-ampere domain circuit model are obtained.
Substituting equation (4) and equation (5) into equation (7) while introducing three new variables to scale circuit parameters in dimensionless form
The model described by equation (7) can be rewritten as:
wherein:
selecting a typical parameter c 1 =10 -9 And c 2 =c 3 Study was performed with η=0, and (a) in fig. 4, (a) in fig. 5, and (a) in fig. 6 give a coexisting attractor phase rail plot from MATLAB simulation at μ= ±2.1, μ= ±1.9, and μ= ±0.9, respectively, which is consistent with the kinetic behavior of the double memristive zeiss circuit voltammetric model.
In particular, after Wei Kujiang dimensions, the product is in the original positionThe plane balance points of the model are converted into certain balance points, and the system parameters c can be related with initial values by analyzing the certain balance points 1 、c 2 、c 3 The change characteristics of mu and eta deduce the action mechanism of the state initial value of each dynamic element in the memristor circuit on super multi-stability.
Performing super-multi-stability circuit reconstruction and testing based on a (10) Wei Kujiang-dimensional model normalization system equation of formula (9): constructing an equivalent implementation circuit of (10) of the formula (9), the main circuit in the diagram (a) of fig. 3 implements three differential equations in the formula (9), and the sub-module in the diagram (b) of fig. 3 is used to implement the nonlinear relationship defined in the formula (10). The circuit equation for an equivalently implemented circuit can be described as:
wherein:
the parameters of the circuit element are set as R 0 =7R/150、R 1 =R/20、R 2 =R、R 3 =20R、R 4 =70R/11、R 5 =20R/21、R 6 =10R/3、R 7 =R、R a1 =3.33R ref 、R a2 =10R ref 、R a3 =15R ref 、R b1 =0.22R ref 、R b2 =0.67R ref 、R b3 =R ref /16. Wherein the time constant of the integrating circuit is set to rc=21kΩ×100nf=2.1 ms, r ref Is set to 10k omega. Using five additional dc voltage sources V D1 =c 1 V、V D2 =c 2 V、V D3 =c 3 V、V D4 =μV、V D5 =ηv implementation stageAnd (3) assigning values of system parameters of the value correlation constant, and controlling the operation mode of the equivalent implementation circuit.
Set V D1 =10 -9 V≈0V,V D2 =V D3 =V D5 =0v, measure V respectively D4 =±2.1V、V D4 =±1.9V、V D4 Coexisting attractors at = ±0.9v. During testing, the capacitor needs to be fully discharged, so that the equivalent realization circuit is forced to start vibrating under the initial value of all-zero state. The phase track diagrams of the experiment are shown in fig. 4 (b), fig. 5 (b) and fig. 6 (b), respectively. The circuit test result is matched with the numerical simulation result. Further, the measured phase rail diagram can be inversely converted by Wei Kuyu into a volt-ampere domain by adopting a differential circuit to obtain a coexisting attractor which is completely consistent with the original circuit topology,
while the foregoing is directed to the preferred embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow. The technical scope of the present invention is not limited to the description, but must be determined according to the scope of claims.
Claims (4)
1. A memristor circuit super multi-stability reconstruction method based on Wei Kuyu is characterized in that: the method comprises the following steps:
step 1: the method comprises the steps of adopting incremental magnetic flux and incremental charge as state variables, constructing a dimension reduction model of the super multi-stability memristor circuit at Wei Kuyu through incremental integral transformation based on a volt-ampere domain circuit model of the memristor circuit;
step 2: the state initial value of each dynamic element in the original volt-ampere domain circuit model is explicitly expressed by adopting a constant system parameter, and a Wei Kujiang-dimensional model for explicitly expressing the state initial value of the memristor circuit is obtained;
step 3: based on a Wei Kujiang-dimensional model normalization system equation, a state-controllable super multi-stability hardware test circuit is constructed, and an external direct-current voltage source is used for representing constant system parameters related to initial values; the running state of the circuit is controlled by adjusting an externally-added direct current control signal, so that point-to-point observation of super-multi-stability in the original volt-ampere model is realized;
a voltage-current domain circuit model of a Chua's memristor circuit based on two memristors is expressed as:
wherein V is 1 (t)、V 2 (t)、V 3 (t) is the node voltage of the memristive Chua's circuit, V 4 (t) and V 5 (t) internal state variables for two memristors, k=r 3 /R 2 ,C 1 、C 2 、C 3 、R、R 1 、R 2 、R 3 As main circuit element parameter, C 4 、C 5 、R a 、R c 、R b 、R d 、R e 、R f And g 1 、g 2 Is a circuit element parameter of two memristor simulators;
integrating the volt-ampere domain circuit model of the formula (1) in the [0, t ] time period to obtain a corresponding third-order Wei Kujiang-dimensional model:
wherein, memristor simulator W 4 At [0, t]The incremental charge over the time period is:
memristor simulator W 5 At [0, t]The incremental charge over the time period is:
in the formulas (4), (5) and (7),is V (V) i (t) is in the range of [0, t]An incremental magnetic flux integrated over a period of time, and +.>=0(i=1、2、3),V i (0) Five state variables V of formula (1) i (t) an initial value (i=1 to 5) at time t=0;
three new variables are introduced to scale the circuit parameters in dimensionless form:
c 1 =V 1 (0),c 2 =V 2 (0),c 3 =V 3 (0),μ=V 4 (0),η=V 5 (0)
the formula (7) is rewritten as:
wherein:
based on the normalized system models of the formulas (9) and (10), an equivalent realization circuit of a Wei Kujiang-dimensional model is designed: three differential equations in the formula (9) are realized by three integrating channels formed by a proportional operation circuit and an integrating circuit based on an operational amplifier; the nonlinear operation in the formula (10) is realized by a multiplier and a proportional operation circuit based on an operational amplifier;
the corresponding circuit equation is expressed as:
wherein:
in the equivalent implementation circuit of the Wei Kujiang D model, five externally applied DC voltage power supplies V are adopted D1 、V D2 、V D3 、V D4 And V D5 Accurately assigning the initial value correlation constant system parameters; the operating state of the circuit is controlled by adjusting an externally-added direct current control signal, so that point-to-point observation of super-stability in the original volt-ampere model is realized.
2. The memristor circuit super-multi-stability reconstruction method based on Wei Kuyu of claim 1, wherein: the double memristor Chua's circuit comprises an operational amplifier U and two ideal memristor simulators W 4 And W is 5 Resistor R, R 1 、R 2 And R is 3 Capacitance C 1 、C 2 And C 3 The inverting input terminal of the operational amplifier U passes through the resistor R 3 Rear ground, resistance R 1 One end is connected with the non-inverting input end of the operational amplifier U, the other end is connected with the output end of the operational amplifier U, and the resistor R 2 One end of the capacitor C is connected with the inverting input end of the operational amplifier U, and the other end of the capacitor C is connected with the output end of the operational amplifier U 1 Ideal memristor simulator W 4 After being connected in parallel, one common end is grounded, the other common end is connected in series with a resistor R, and the other end of the resistor R is connected in series with a capacitor C 3 Then is connected to the output end of the operational amplifier U, and an ideal memristor simulator W 5 One end is connected with a capacitor C 3 And the common end of the resistor R, the other end is grounded, and the capacitor C 2 One end is connected with the non-inverting input end of the operational amplifier U, and the other end is connected with the capacitor C 3 And the common terminal of resistor R.
3. The memristor circuit super-multi-stability reconstruction method based on Wei Kuyu as claimed in claim 2, wherein: ideal memristor simulator W 4 The equivalent implementation circuit comprises an operational amplifier U 1 、U 2 And U 3 Two analog multipliers M 1 And M 2 Resistance R a 、R b 、R e And R is f Capacitance C 4 ,g 1 For two analogue multipliers M 1 And M 2 Is a gain factor of (2); operational amplifier U 1 Is connected with memristor W at the non-inverting input end 4 An input terminal positive electrode of (a); operational amplifier U 1 Is connected to the inverting input terminal of the operational amplifier U 1 An output terminal of (a); resistor R a One end connected with operational amplifier U 1 The other end is connected with the operational amplifier U 2 Is provided; resistor R b Terminating in an analog multiplier M 2 The other end is connected with the operational amplifier U 3 Is provided; resistor R e One end connected with operational amplifier U 3 The other end is connected with the operational amplifier U 3 An output terminal of (a); resistor R f One end connected with operational amplifier U 3 The other end is connected with the operational amplifier U 3 An output terminal of (a); capacitor C 4 One end connected with operational amplifier U 2 The other end is connected with the operational amplifier U 2 An output terminal of (a); analog multiplier M 1 Is connected to the operational amplifier U 2 An output terminal of (a); analog multiplier M 2 Is connected with an analog multiplier M 1 The other input end is connected with memristor W 4 An input terminal positive electrode of (a); operational amplifier U 2 Is grounded; operational amplifier U 3 Is connected with memristor W at the non-inverting input end 4 Is connected with the positive electrode of the input terminal.
4. The memristor circuit super-multi-stability reconstruction method based on Wei Kuyu as claimed in claim 2, wherein: ideal memristor simulator W 5 The equivalent implementation circuit comprises an operational amplifier U 4 And U 5 Two analog multiplicationsFrench utensil M 3 And M 4 Resistance R c And R is d Capacitance C 5 ,g 2 For two analogue multipliers M 3 And M 4 Is a gain factor of (2); operational amplifier U 4 Is connected with memristor W at the non-inverting input end 5 An input terminal positive electrode of (a); operational amplifier U 4 Is connected to the inverting input terminal of the operational amplifier U 4 An output terminal of (a); resistor R c One end connected with operational amplifier U 4 The other end is connected with the operational amplifier U 5 Is provided; resistor R d Terminating in an analog multiplier M 4 The other end is connected with memristor W 5 An input terminal positive electrode of (a); capacitor C 5 One end connected with operational amplifier U 5 The other end is connected with the operational amplifier U 5 An output terminal of (a); analog multiplier M 3 Is connected to the operational amplifier U 5 An output terminal of (a); analog multiplier M 4 Is connected with an analog multiplier M 3 The other input end is connected with memristor W 5 An input terminal positive electrode of (a); operational amplifier U 5 Is grounded.
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