CN110825528A - Resource management method, device and equipment - Google Patents

Resource management method, device and equipment Download PDF

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Publication number
CN110825528A
CN110825528A CN201911094449.8A CN201911094449A CN110825528A CN 110825528 A CN110825528 A CN 110825528A CN 201911094449 A CN201911094449 A CN 201911094449A CN 110825528 A CN110825528 A CN 110825528A
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core
processes
physical
matching
bound
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CN110825528B (en
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矫恒浩
吴连朋
夏章抓
张宏波
李希伟
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Qingdao Hisense Media Network Technology Co Ltd
Juhaokan Technology Co Ltd
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Qingdao Hisense Media Network Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/50Indexing scheme relating to G06F9/50
    • G06F2209/5018Thread allocation

Abstract

The embodiment of the invention provides a resource management method, a device and equipment, wherein the method comprises the following steps: determining a first time period corresponding to each process in a plurality of processes, wherein the CPU occupancy rate of the process in the corresponding first time period is greater than or equal to a first threshold value; binding each process with a corresponding logic core in a CPU chip according to a first time interval corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core comprises at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap. The resource utilization rate of the CPU chip is improved.

Description

Resource management method, device and equipment
Technical Field
The embodiment of the invention relates to the technical field of computers, in particular to a resource management method, a resource management device and resource management equipment.
Background
A Central Processing Unit (CPU) chip of an electronic device typically includes a plurality of physical cores, and each physical core may include two logical cores. The electronic device also includes a plurality of processes, which may be run in the logical core.
In the process of running the process, in order to avoid switching the process among different logical cores, the process and the logical core may be bound, so that the process runs in the bound logical core. At present, a process and a logic core are generally bound randomly, which may cause that the process in the electronic device cannot reasonably use the resource of the CPU chip, resulting in a low resource utilization rate of the CPU chip.
Disclosure of Invention
The embodiment of the invention provides a resource management method, a resource management device and resource management equipment, which improve the resource utilization rate of a CPU chip.
In a first aspect, an embodiment of the present invention provides a resource management method, including:
determining a first time period corresponding to each process in a plurality of processes, wherein the CPU occupancy rate of the process in the corresponding first time period is greater than or equal to a first threshold value;
binding each process with a corresponding logic core in a CPU chip according to a first time interval corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core comprises at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap.
In one possible implementation, the at least two logical cores include a first logical core and a second logical core, for a first process of the plurality of processes; according to the first time interval corresponding to each process, the first process is bound with the corresponding logic core in the CPU chip, and the method comprises the following steps:
judging whether a matching process corresponding to the first process exists in the plurality of processes, wherein a first time period corresponding to the matching process does not overlap with a first time period corresponding to the first process;
if so, binding the first process and the first logic core, and binding the matching process and the second logic core;
if not, the first process is bound with a logic core in a second physical core, and the second physical core is not bound with other processes except the first process.
In a possible implementation manner, determining whether a matching process corresponding to the first process exists in the plurality of processes further includes:
acquiring the duration of a first time period corresponding to each matching process;
sequencing a plurality of processes according to the sequence of the duration of a corresponding first time interval from high to low to obtain a first process set, wherein the processes in the first process set are not bound with a logic core;
determining a first process of the first set of processes as the first process.
In a possible implementation manner, the determining whether a matching process corresponding to the first process exists in the plurality of processes includes:
and judging whether a matching process corresponding to the first process exists in the first process set.
In a possible implementation manner, the determining whether a matching process corresponding to the first process exists in the first process set includes:
performing a determination step, the determination step comprising: judging whether the ith process in the first process set is a matching process corresponding to the first process, wherein initially, i is 2;
if yes, determining the ith process as a matching process corresponding to the first process; and if not, adding 1 to the i, and executing the judging step until the matching process corresponding to the first process is determined to be obtained, or the i is larger than the number of processes in the first process set.
In one possible implementation, after binding the first process with a first logical core of a first physical core and binding the matching process with a second logical core of the first physical core, the method further includes:
deleting the first process and the matching process in the first set of processes.
In one possible implementation, after the binding the first process with the logical core in the second physical core, the method further includes:
deleting the first process in the first set of processes.
In a second aspect, an embodiment of the present invention provides a resource management apparatus, including a first determining module and a binding module, wherein,
the first determining module is used for determining a first time period corresponding to each process in a plurality of processes, and the CPU occupancy rate of the process in the corresponding first time period is greater than or equal to a first threshold value;
the binding module is used for binding each process with the corresponding logic core in the CPU chip according to the first time interval corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core comprises at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap.
In one possible implementation, the at least two logical cores include a first logical core and a second logical core, for a first process of the plurality of processes; the binding module is specifically configured to:
judging whether a matching process corresponding to the first process exists in the plurality of processes, wherein a first time period corresponding to the matching process does not overlap with a first time period corresponding to the first process;
if so, binding the first process with a first logic core in a first physical core, and binding the matching process with a second logic core in the first physical core;
if not, the first process is bound with a logic core in a second physical core, and the second physical core is not bound with other processes except the first process.
In one possible implementation, the apparatus further includes an obtaining module, a sorting module, and a second determining module, wherein,
the obtaining module is configured to obtain a duration of a first time period corresponding to each matching process before the binding module determines whether the matching process corresponding to the first process exists in the multiple processes;
the sequencing module is used for sequencing a plurality of processes according to the sequence of the duration of the corresponding first time interval from high to low to obtain a first process set, wherein the processes in the first process set are not bound with the logic cores;
the second determining module is configured to determine a first process in the first process set as the first process.
In a possible implementation manner, the binding module is specifically configured to:
and judging whether a matching process corresponding to the first process exists in the first process set.
In a possible implementation manner, the binding module is specifically configured to:
performing a determination step, the determination step comprising: judging whether the ith process in the first process set is a matching process corresponding to the first process, wherein initially, i is 2;
if yes, determining the ith process as a matching process corresponding to the first process; and if not, adding 1 to the i, and executing the judging step until the matching process corresponding to the first process is determined to be obtained, or the i is larger than the number of processes in the first process set.
In a possible embodiment, the apparatus further comprises a deletion module, wherein,
the deleting module is configured to delete the first process and the matching process from the first process set after the binding module binds the first process with a first logical core in a first physical core and binds the matching process with a second logical core in the first physical core.
In a possible implementation manner, the deleting module is further configured to delete the first process in the first process set after the binding module binds the first process with a logical core in a second physical core.
In a third aspect, an embodiment of the present invention provides a resource management apparatus, including at least one processor and at least one memory, where instructions are stored in the memory, and the processor is configured to execute the instructions in the memory to implement the method according to any one of the first aspect.
In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium, where computer-executable instructions are stored, and when a processor executes the computer-executable instructions, the method according to any one of the first aspect is implemented.
According to the resource management method, the resource management device and the resource management equipment provided by the embodiment of the invention, when the processes are bound with the logic cores, the first time period corresponding to the processes in the electronic equipment can be obtained, and the processes in the electronic equipment are bound with the corresponding logic cores according to the first time period corresponding to each process, so that the first time periods corresponding to different processes bound with different logic cores in the same physical core are not overlapped. Therefore, different processes which are not overlapped in the corresponding first time period can be bound with different logic cores in the same physical core, and the resource utilization rate of the CPU chip is high.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic view of an application scenario of a process control method according to an embodiment of the present invention;
fig. 2 is a resource management method according to an embodiment of the present invention;
fig. 3A is a schematic diagram of a binding relationship according to an embodiment of the present invention;
fig. 3B is a schematic diagram of another binding relationship provided in the embodiment of the present invention;
fig. 3C is a schematic diagram of another binding relationship provided in the embodiment of the present invention;
fig. 4 is a flowchart illustrating another resource management method according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a first time period provided by an embodiment of the present invention;
FIG. 6 is a diagram illustrating a binding relationship according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a resource management apparatus according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of another resource management apparatus according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a hardware structure of a resource management device according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic view of an application scenario of a process control method according to an embodiment of the present invention. Referring to fig. 1, the process control method may be applied to an electronic device, where the electronic device includes n physical cores, and n is an integer greater than 1. Each physical core includes at least two logical cores, it should be noted that in the embodiment of the present invention, the physical core includes two logical cores as an example for description, and of course, the number of logical cores included in one physical core may be other, for example, one physical core may include 3 or 4 logical cores. M processes can also run in the electronic equipment, wherein m is an integer larger than 1. The logical core may be bound to the process such that the process runs on the logical core to which it is bound.
Referring to fig. 1, different processes may be bound to different logical cores in the same physical core, i.e., different processes share the same physical core, e.g., process 1 may be bound to logical core 11 in physical core 1 and logical core 21 in physical core 2, and process 2 may be bound to logical core 12 in physical core 1 and logical core 22 in physical core 2. In this binding manner, the running times of the process 1 and the process 2 may be different, for example, the process 1 may run in the time interval 1, and the process 1 may run in the time interval 2, so that if only one of the process 1 and the process 2 runs in one time interval, the running process may monopolize all resources (e.g., computing resources, memory resources, etc.) in the physical core 1 and the physical core 2, so that the quantity of resources available to the running process is large, and the resource utilization rate of the CPU chip is high.
Referring to fig. 1, a process may also be bound to a logical core in a physical core, i.e., a process is exclusive to a physical core, e.g., process m may be bound to logical core n1 and logical core n2 in physical core n. In the binding mode, one process can monopolize one physical core, so that the process can monopolize all resources in the physical core, the isolation degree of the process and other processes is higher, resource conflict between the process and other processes is avoided, and the running stability of the process is higher.
In the application, when a process is bound to a logical core, a first time period corresponding to the process in the electronic device may be acquired (the CPU occupancy of the process in the corresponding first time period is greater than or equal to a first threshold), and the process in the electronic device is bound to the corresponding logical core according to the first time period corresponding to each process. Wherein there is no overlap between the first time periods corresponding to different processes bound to different logical cores in the same physical core. Therefore, different processes which are not overlapped in the corresponding first time period can be bound with different logic cores in the same physical core, and the resource utilization rate of the CPU chip is high.
The technical means shown in the present application will be described in detail below with reference to specific examples. It should be noted that the following embodiments may be combined with each other, and the description of the same or similar contents in different embodiments is not repeated.
Fig. 2 is a resource management method according to an embodiment of the present invention, please refer to fig. 2, where the method may include:
s201, determining a first time period corresponding to each process in the plurality of processes, wherein the CPU occupancy rate of the process in the corresponding first time period is larger than or equal to a first threshold value.
The execution subject of the embodiment of the present invention may be an electronic device, and may also be a resource management apparatus provided in the electronic device. For example, the electronic device may be a mobile phone, a computer, or the like. The resource management device may be implemented by software, or may be implemented by a combination of software and hardware.
The plurality of processes are processes running in the electronic device, the electronic device comprises a CPU chip, the CPU chip comprises a plurality of physical cores, the physical cores comprise at least two logic cores, and the plurality of processes are all run on the logic cores in the electronic device.
Optionally, the first time period corresponding to each process in the multiple processes may be determined according to the CPU occupancy of each process in the historical time period. The historical period may be a period of a preset duration before the current time, for example, the historical period may be a day, a week, a month, etc. before the current time. In an actual application process, the history period may be set according to actual needs, and this is not specifically limited in the embodiment of the present invention.
Optionally, the duration of the first period is greater than the preset duration. For example, the preset time period may be 5 minutes, 10 minutes, 1 hour, or the like. The preset duration can be set according to actual needs.
For example, for any process in the plurality of processes, the CPU occupancy of the process in each day in the historical period may be counted, and if the counted CPU occupancy of the process in each day between 8 points-10 points and 20 points-22 points is greater than a first threshold, the first period corresponding to the process may be determined to be 8 points-10 points and 20 points-22 points in each day.
S202, binding each process with a corresponding logic core in the CPU chip according to the first time interval corresponding to each process.
Wherein there is no overlap between the first time periods corresponding to different processes bound to different logical cores in the same physical core.
Optionally, for any first process in the multiple processes, the first process may be bound to the corresponding logic core in the CPU chip in the following manner:
judging whether a matching process corresponding to a first process exists in the plurality of processes, wherein no overlap exists between a first time period corresponding to the matching process and a first time period corresponding to the first process; if so, binding the first process with a first logic core in the first physical core, and binding the matching process with a second logic core in the first physical core; if not, the first process is bound with a logic core in the second physical core, and the second physical core does not bind other processes except the first process.
The number of the first physical cores may be 1 or more, and for example, the number of the first physical cores may be 2 or 3. The number of the first physical cores can be set according to actual needs.
Next, with reference to fig. 3A to 3C, a description is given of a binding relationship between a logical core and a process when the number of first physical cores is different.
Fig. 3A is a schematic diagram of a binding relationship according to an embodiment of the present invention. Referring to fig. 3A, the number of the first physical cores is 1, which is denoted as physical core 1, the first process is process 1, the matching process corresponding to the first process is process 2, the process 1 is bound to the logical core 11 in the physical core 1, and the process 2 is bound to the logical core 12 in the physical core 1.
Fig. 3B is a schematic diagram of another binding relationship provided in the embodiment of the present invention. Referring to fig. 3B, the number of the first physical cores is 2, which are respectively denoted as a physical core 1 and a physical core 2, the first process is a process 1, the matching process corresponding to the first process is a process 2, the process 1 is bound to the logical core 11 in the physical core 1 and the logical core 21 in the physical core 2, and the process 2 is bound to the logical core 12 in the physical core 1 and the logical core 22 in the physical core 2.
Fig. 3C is a schematic diagram of another binding relationship provided in the embodiment of the present invention. Referring to fig. 3C, the number of the first physical cores is 3, which are respectively denoted as physical core 1, physical core 2, and physical core 3, the first process is process 1, the matching process corresponding to the first process is process 2, the process 1 is bound to the logical core 11 in the physical core 1, the logical core 21 in the physical core 2, and the logical core 31 in the physical core 3, and the process 2 is bound to the logical core 12 in the physical core 1, the logical core 22 in the physical core 2, and the logical core 32 in the physical core 3.
When it is determined that a matching process corresponding to a first process exists in the multiple processes, if the number of the matching processes corresponding to the first process is 1, the matching process is bound to a second logical core in the first physical core, and if the number of the matching processes corresponding to the first process is greater than 1, one matching process can be selected from the multiple matching processes and bound to the second logical core in the first physical core. For example, one matching process may be randomly selected from the plurality of matching processes, or one matching process with the longest duration of the corresponding first period may be selected from the plurality of matching processes.
When the matching process corresponding to the first process does not exist in the plurality of processes, the first process is bound with the logic core in the second physical core, and the second physical core is not bound with other processes except the first process, so that the second physical core is only bound with the first process, and the running stability of the processes is high. The number of the second physical cores may be 1 or more.
It should be noted that, in the embodiment of the present invention, binding the process and the logic core may refer to generating a configuration file, where the configuration file includes a corresponding relationship between the process and the logic core, and the configuration file may be a configuration file corresponding to the process or a configuration file corresponding to the logic core. Accordingly, when the process starts to run, the process may determine its corresponding (bound) logical core according to the configuration file and run in the corresponding logical core.
According to the resource management method provided by the embodiment of the invention, when the processes are bound with the logic cores, the first time periods corresponding to the processes in the electronic equipment can be obtained, and the processes in the electronic equipment and the corresponding logic cores are bound according to the first time periods corresponding to the processes, so that the first time periods corresponding to different processes bound with different logic cores in the same physical core are not overlapped. Therefore, different processes which are not overlapped in the corresponding first time period can be bound with different logic cores in the same physical core, and the resource utilization rate of the CPU chip is high.
Based on any of the above embodiments, the resource management method is further described in detail below with reference to fig. 4.
Fig. 4 is a flowchart illustrating another resource management method according to an embodiment of the present invention. Referring to fig. 4, the method may include:
s401, determining a first time period corresponding to each process in a plurality of processes, wherein the CPU occupancy rate of the process in the corresponding first time period is larger than or equal to a first threshold value.
It should be noted that the execution process of S401 may refer to the execution process of S201, and is not described herein again.
S402, sequencing the processes according to the sequence of the duration of the corresponding first time interval from high to low to obtain a first process set.
The duration of the first time period corresponding to each process may be obtained first, and then the processes are sorted according to the order from high to low of the durations of the corresponding first time periods, so as to obtain a first process set.
S403, determining a first process in the first process set as a first process.
In the first process set, the duration of a first time interval corresponding to the first process is longest.
S404, judging whether a matching process corresponding to the first process exists in the first process set.
If yes, go to S405.
If not, go to S407.
And the first time interval corresponding to the matching process and the first time interval corresponding to the first process are not overlapped.
Optionally, whether the process in the first process set is the matching process corresponding to the first process may be sequentially determined according to the arrangement order of the processes in the first process set until the matching process corresponding to the first process is found in the first process set.
For example, whether a second process in the first process set is a matching process corresponding to the first process is determined, if yes, the second process is determined as the matching process corresponding to the first process, if not, whether a third process in the first process set is determined as the matching process corresponding to the first process is determined, and so on until the matching process corresponding to the first process is found in the first process set, or the processes in the first process set are found and the matching process corresponding to the first process is not found.
In the above process, according to the arrangement sequence of the processes in the first process set, the matching process corresponding to the first process is searched in the first process set, so that the duration of the first time period corresponding to the searched matching process is longer, and thus, after the first process and the corresponding matching process are bound with different logical cores in the first physical core, the utilization rate of resources in the first physical core is higher.
S405, binding the first process with a first logic core in the first physical core, and binding the matching process with a second logic core in the first physical core.
The first logical core may be any one of the first physical cores, and the second logical core is another one of the first physical cores other than the first logical core.
S406, deleting the first process and the matching process in the first process set.
Since the first process and the corresponding matching process have already been bound to the first physical core, the first process and the matching process may be deleted in the first set of processes. In this way, none of the processes in the first set of processes may be bound to the logical core.
After S406, S409 is executed.
And S407, binding the first process with a logic core in the second physical core, wherein the second physical core does not bind other processes except the first process.
The first process may be bound to all logical cores in the second physical core.
S408, deleting the first process in the first process set.
Since the first process has already been bound to the first physical core, the first process may be deleted in the first set of processes. In this way, none of the processes in the first set of processes may be bound to the logical core.
After S408, S409 is executed.
And S409, judging whether the first process set is empty or not.
If yes, go to S410.
If not, S403 is executed.
And S410, ending the process.
In the embodiment shown in fig. 4, when a process is bound to a logic core, a first time period corresponding to the process in the electronic device may be obtained, and the processes are sorted according to the sequence from high to low of the time periods of the corresponding first time period, so as to obtain a first process set. The method comprises the steps that a first process in a first process set is determined as a first process, and when a matching process corresponding to the first process exists in the first process set, the first process and the corresponding matching process can be bound with different logic cores in the same physical core, so that the resource utilization rate of a CPU chip is high; when the matching process corresponding to the first process does not exist in the first process set, the first process is bound with the logic core in the second physical core, and the second physical core does not bind other processes except the first process, so that the second physical core is only bound with the first process, and the running stability of the process is high.
On the basis of any of the above embodiments, the following describes the resource management method by using specific examples in conjunction with fig. 5 to 6.
For example, it is assumed that 5 physical cores, respectively denoted as physical core 1, physical core 2, … …, and physical core 5, are provided in the electronic device, and two logical cores are provided in each physical core. Assume that 5 processes, denoted as process 1, process 2, … …, and process 5, are set in the electronic device, and the first time interval corresponding to the 5 processes is as shown in fig. 5.
Fig. 5 is a schematic diagram of a first time period according to an embodiment of the present invention. Referring to fig. 5, the first time periods corresponding to the processes 1 to 5 are shown in table 1:
TABLE 1
Process A first period of time Duration of the first period
Process
1 0 point to 4 points, 12 points to 20 points 12 hours
Process
2 2 point-8 point, 18 point-22 point 10 hours
Process 3 6 points to 12 points, 20 points to 24 points 10 hours
Process
4 4 points-8 points, 16 points-20 points 8 hours
Process 5 10 points-12 points, 20 points-24 points 6 hours
The multiple processes in the electronic device may be sorted according to the duration of the first time period, and the sorting result is shown in table 1, and it is determined that the first process set includes the above 5 processes.
When the process and the logical core are bound, it is determined that the process 1 is the first process, and it is determined whether a matching process corresponding to the process 1 exists in the first process set, specifically, it may be determined whether the process 2 is the matching process of the process 1, and if the determination result is no, it is determined whether the process 3 is the matching process of the process 1, and since there is no overlap between the first time period corresponding to the process 3 and the first time period corresponding to the process 1, it is determined that the process 3 is the matching process corresponding to the process 1, and then the process 1 and the process 3 may be bound with different logical cores in the physical core 1 and the physical core 2, respectively. Specifically, please refer to fig. 6.
Fig. 6 is a schematic diagram of a binding relationship according to an embodiment of the present invention. Referring to fig. 6, process 1 may be bound to logical sum 11 in physical core 1 and logical core 21 in physical core 2, and process 3 may be bound to logical sum 12 in physical core 1 and logical core 22 in physical core 2.
After binding process 1 and process 3 with logical cores in physical core 1 and physical core 2, process 1 and process 3 are deleted in the first set of processes.
After the process 1 and the process 3 are deleted in the first process set, if the process 2 is the first process in the first process set, determining the process 2 as the first process, and determining whether a matching process corresponding to the process 2 exists in the first process set, specifically, determining whether the process 4 is the matching process of the process 2, if not, determining whether the process 5 is the matching process of the process 2, if not, determining that the matching process corresponding to the process 2 does not exist in the first process set, and binding the process 2 with all the logical cores in the physical core 3 in an exclusive manner.
Referring to fig. 6, the process 2 is bound to the logical core 31 and the logical core 32 in the physical core 3. After binding process 2 with a logical core in the physical core 3, process 2 is deleted in the first set of processes.
After the process 2 is deleted from the first process set, if the process 4 is a first process in the first process set, determining the process 4 as the first process, and determining whether a matching process corresponding to the process 4 exists in the first process set, specifically, determining whether the process 5 is a matching process corresponding to the process 4, and if the first time period corresponding to the process 5 does not overlap with the first time period corresponding to the process 4, determining that the process 5 is a matching process corresponding to the process 4, and then binding the process 4 and the process 5 with different logical cores in the physical core 4 and the physical core 5, respectively. Specifically, please refer to fig. 6.
Referring to fig. 6, process 4 may be bound to logical sum 41 in physical core 4 and logical core 51 in physical core 5, and process 5 may be bound to logical sum 42 in physical core 4 and logical core 52 in physical core 5.
After binding process 4 and process 5 with logical ones of physical core 4 and physical core 5, process 4 and process 5 may be deleted in the first set of processes. And after the process 4 and the process 5 are deleted in the first process set, if the first process set is empty, the binding of the process and the logic core is finished.
Fig. 7 is a schematic structural diagram of a resource management device according to an embodiment of the present invention. Referring to fig. 7, the resource management device 10 may include a first determining module 11 and a binding module 12, wherein,
the first determining module 11 is configured to determine a first time period corresponding to each process in a plurality of processes, where a CPU occupancy of the process in the corresponding first time period is greater than or equal to a first threshold;
the binding module 12 is configured to bind each process with a corresponding logic core in the CPU chip according to a first time period corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core comprises at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap.
The resource management device provided in the embodiment of the present invention may implement the technical solutions shown in the above method embodiments, and the implementation principles and beneficial effects thereof are similar, and are not described herein again.
In one possible implementation, the physical core includes a first logical core and a second logical core, for a first process of the plurality of processes; the binding module 12 is specifically configured to:
judging whether a matching process corresponding to the first process exists in the plurality of processes, wherein a first time period corresponding to the matching process does not overlap with a first time period corresponding to the first process;
if so, binding the first process with a first logic core in a first physical core, and binding the matching process with a second logic core in the first physical core;
if not, the first process is bound with a logic core in a second physical core, and the second physical core is not bound with other processes except the first process.
Fig. 8 is a schematic structural diagram of another resource management apparatus according to an embodiment of the present invention. On the basis of the embodiment shown in fig. 7, please refer to fig. 8, the resource management device 10 further includes an obtaining module 13, a sorting module 14, and a second determining module 15, wherein,
the obtaining module 13 is configured to obtain a duration of a first time period corresponding to each matching process before the binding module determines whether the matching process corresponding to the first process exists in the multiple processes;
the sequencing module 14 is configured to sequence the multiple processes according to a sequence from high to low of the duration of the corresponding first time period, so as to obtain a first process set, where a process in the first process set is not bound with a logic core;
the second determining module 15 is configured to determine a first process in the first process set as the first process.
In a possible implementation, the binding module 12 is specifically configured to:
and judging whether a matching process corresponding to the first process exists in the first process set.
In a possible implementation, the binding module 12 is specifically configured to:
performing a determination step, the determination step comprising: judging whether the ith process in the first process set is a matching process corresponding to the first process, wherein initially, i is 2;
if yes, determining the ith process as a matching process corresponding to the first process; and if not, adding 1 to the i, and executing the judging step until the matching process corresponding to the first process is determined to be obtained, or the i is larger than the number of processes in the first process set.
In a possible embodiment, the resource management device 10 further comprises a deletion module 16, wherein,
the deleting module 16 is configured to delete the first process and the matching process in the first process set after the binding module 12 binds the first process with a first logical core in a first physical core and binds the matching process with a second logical core in the first physical core.
In a possible implementation manner, the deleting module 12 is further configured to delete the first process in the first process set after the binding module binds the first process with a logical core in a second physical core.
The resource management device provided in the embodiment of the present invention may implement the technical solutions shown in the above method embodiments, and the implementation principles and beneficial effects thereof are similar, and are not described herein again.
Fig. 9 is a schematic diagram of a hardware structure of a resource management device according to an embodiment of the present invention. Referring to fig. 9, the resource management apparatus 20 may include at least one processor 21 and at least one memory 22, where the processor 21 and the memory 22 may be connected by a bus, the memory 22 has instructions stored therein, and the processor 21 is configured to execute the instructions in the memory 22 to implement the resource management method.
The embodiment of the invention also provides a computer-readable storage medium, wherein a computer execution instruction is stored in the computer-readable storage medium, and when a processor executes the computer execution instruction, the resource management method is realized.
All or a portion of the steps of implementing the above-described method embodiments may be performed by hardware associated with program instructions. The aforementioned program may be stored in a readable memory. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned memory (storage medium) includes: read-only memory (ROM), RAM, flash memory, hard disk, solid state disk, magnetic tape (magnetic tape), floppy disk (optical disk), and any combination thereof.
Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processing unit of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processing unit of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be apparent to those skilled in the art that various changes and modifications may be made in the embodiments of the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the embodiments of the present application fall within the scope of the claims of the present application and their equivalents, the present application is also intended to encompass such modifications and variations.
In the present application, the terms "include" and variations thereof may refer to non-limiting inclusions; the term "or" and variations thereof may mean "and/or". The terms "first," "second," and the like in this application are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. In the present application, "a plurality" means two or more. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

Claims (10)

1. A method for resource management, comprising:
determining a first time period corresponding to each process in a plurality of processes, wherein the CPU occupancy rate of the process in the corresponding first time period is greater than or equal to a first threshold value;
binding each process with a corresponding logic core in a CPU chip according to a first time interval corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core runs at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap.
2. The method of claim 1, wherein the at least two logical cores comprise a first logical core and a second logical core, for a first process of the plurality of processes; according to the first time interval corresponding to each process, the first process is bound with the corresponding logic core in the CPU chip, and the method comprises the following steps:
judging whether a matching process corresponding to the first process exists in the plurality of processes, wherein a first time period corresponding to the matching process does not overlap with a first time period corresponding to the first process;
if so, binding the first process and the first logic core, and binding the matching process and the second logic core;
if not, the first process is bound with a logic core in a second physical core, and the second physical core is not bound with other processes except the first process.
3. The method of claim 2, wherein before determining whether the matching process corresponding to the first process exists in the plurality of processes, further comprising:
acquiring the duration of a first time period corresponding to each matching process;
sequencing a plurality of processes according to the sequence of the duration of a corresponding first time interval from high to low to obtain a first process set, wherein the processes in the first process set are not bound with a logic core;
determining a first process of the first set of processes as the first process.
4. The method of claim 3, wherein determining whether a matching process corresponding to the first process exists in the plurality of processes comprises:
and judging whether a matching process corresponding to the first process exists in the first process set.
5. The method of claim 4, wherein determining whether a matching process corresponding to the first process exists in the first process set comprises:
performing a determination step, the determination step comprising: judging whether the ith process in the first process set is a matching process corresponding to the first process, wherein initially, i is 2;
if yes, determining the ith process as a matching process corresponding to the first process; and if not, adding 1 to the i, and executing the judging step until the matching process corresponding to the first process is determined to be obtained, or the i is larger than the number of processes in the first process set.
6. The method of any of claims 3-5, wherein after binding the first process to a first logical core of a first physical core and binding the matching process to a second logical core of the first physical core, further comprising:
deleting the first process and the matching process in the first set of processes.
7. The method of any of claims 3-5, wherein after binding the first process to a logical core in a second physical core, further comprising:
deleting the first process in the first set of processes.
8. A resource management apparatus includes a first determining module and a binding module, wherein,
the first determining module is used for determining a first time period corresponding to each process in a plurality of processes, and the CPU occupancy rate of the process in the corresponding first time period is greater than or equal to a first threshold value;
the binding module is used for binding each process with the corresponding logic core in the CPU chip according to the first time interval corresponding to each process; the CPU chip comprises a plurality of physical cores, each physical core comprises at least two logic cores, and first time periods corresponding to different processes bound with different logic cores in the same physical core do not overlap.
9. A resource management apparatus comprising at least one processor and at least one memory, the memory having instructions stored therein, the processor being configured to execute the instructions in the memory to implement the method of any one of claims 1-7.
10. A computer-readable storage medium having computer-executable instructions stored thereon which, when executed by a processor, implement the method of any one of claims 1-7.
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