CN110825501A - Processor core optimization method and device and storage medium - Google Patents
Processor core optimization method and device and storage medium Download PDFInfo
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Abstract
The embodiment of the invention provides a method, a device and a storage medium for optimizing a processor core, wherein the method comprises the following steps: obtaining a patch object for a current processor core; writing the patch object to source code of the current processor core; determining a plurality of objects in the current processor kernel by running source code written with the patch object; and configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode so as to improve the real-time performance of the current processor core.
Description
Technical Field
The present invention relates to the field of communications technologies, and in particular, to a processor core optimization method, a processor core optimization apparatus, and a storage medium.
Background
Since birth, Linux has been widely used in different fields, and Linux systems can be used in servers as large as embedded systems.
Since the Linux system is designed as a general operating system, the aim of the Linux system is to construct a complete and stable open-source operating system, shorten the average response time of the system as much as possible, improve the throughput, and pay attention to the overall functional requirements of the operating system so as to achieve better average performance. Therefore, fairness is mainly considered when designing the process scheduling algorithm of Linux. That is, the scheduler for resource scheduling allocates the available processor resources to all processes requiring processor resources as evenly as possible and ensures that each process can run. However, this design goal is contrary to the real-time process requirement, so that some applications requiring strong real-time performance cannot be well run under the Linux system.
Therefore, the current Linux system has the problem of poor real-time performance.
Disclosure of Invention
In view of the above problems, a processor core optimization method, a processor core optimization device, and a storage medium according to embodiments of the present invention are provided to solve the problem of poor real-time performance of a processor core based on a Linux platform.
In order to solve the above problem, an embodiment of the present invention discloses a processor core optimization method, including:
obtaining a patch object for a current processor core;
writing the patch object to source code of the current processor core;
determining a plurality of objects in the current processor kernel by running source code written with the patch object;
and configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
Optionally, the step of writing the patch object into the source code of the current processor core includes:
determining a storage directory of source code of the current processor core;
and writing the patch program object into the storage directory.
Optionally, the target volumes include a target area and/or a target object, and the step of configuring a mode corresponding to the plurality of target volumes from a non-preemptive mode to a preemptive mode includes:
replacing a spin lock in the current processor core with a mutex;
and based on the mutex, configuring the modes corresponding to the target areas and/or the target objects from a non-preemptive mode to a preemptive mode.
Optionally, the method further comprises:
when the interrupt is detected, acquiring an interrupt execution program;
threading the interrupt executive program to generate a corresponding interrupt thread, wherein the interrupt thread comprises a soft interrupt thread and/or a hard interrupt thread.
Optionally, the step of threading the interrupt executive program and generating a corresponding interrupt thread includes:
calling a preset function to create a soft interrupt thread and/or a hard interrupt thread;
and transferring the interrupt executive program to the soft interrupt thread and/or a hard interrupt thread.
Optionally, threading the interrupt execution program, and after generating a corresponding interrupt thread, further includes:
determining a priority of each interrupt thread in the current processor core;
and adjusting the priority of each interrupt thread.
Optionally, the method further comprises:
and configuring a clock management system for the current processor core, wherein the precision of the clock management system is nanosecond.
In order to solve the above problem, an embodiment of the present invention discloses a processor core optimization apparatus, including:
an obtaining module for obtaining a patch object for a current processor core;
a write module for writing the patch object into the source code of the current processor core;
a determining module, configured to determine a plurality of objects in the current processor kernel by running the source code written with the patch object;
and the configuration module is used for configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
Optionally, the writing module includes:
a storage directory determination submodule for determining a storage directory of the source code of the current processor core;
and the patch program object writing submodule is used for writing the patch program object into the storage directory.
Optionally, the target volume includes a target area and/or a target object, and the configuration module includes:
a replacement submodule for replacing a spin lock in the current processor core with a mutex;
and the configuration submodule is used for configuring the modes corresponding to the target areas and/or the target objects from the non-preemptive mode to the preemptive mode based on the mutex.
Optionally, the apparatus further comprises:
the interrupt executive program acquisition module is used for acquiring an interrupt executive program when the interrupt is detected;
and the interrupt thread generating module is used for threading the interrupt executive program and generating a corresponding interrupt thread, wherein the interrupt thread comprises a soft interrupt thread and/or a hard interrupt thread.
Optionally, the interrupt thread generation module includes:
the calling submodule is used for calling a preset function to create a soft interrupt thread and/or a hard interrupt thread;
and the transfer submodule is used for transferring the interrupt executive program to the soft interrupt thread and/or the hard interrupt thread.
Optionally, the apparatus further comprises:
a priority determination module, configured to determine a priority of each interrupt thread in the current processor core;
and the priority adjusting module is used for adjusting the priority of each interrupt thread.
Optionally, the apparatus further comprises:
and the clock management system configuration module is used for configuring a clock management system for the current processor core, and the precision of the clock management system is nanosecond.
In order to solve the above problem, an embodiment of the present invention discloses a storage medium, and when instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute one or more of the above processor core optimization methods.
Compared with the background art, the embodiment of the invention has the following advantages:
in the embodiment of the present invention, by acquiring the patch object for the current processor core, and writing the patch object into the source code of the current processor core, after determining a plurality of target entities in the current processor core by running the source code written with the patch object, the mode corresponding to the plurality of target entities may be configured from the non-preemptive mode to the preemptive mode, so as to improve the real-time performance of the current processor core. In the embodiment, the processor kernel in the Linux system is optimized in a way of patching the processor kernel, and the patch program object is written into the source code of the kernel, so that the modification of the processor kernel is realized. The patch object in this embodiment may be a patch applicable to various types of processor cores, and a real-time core does not need to be separately developed for each type of processor core, thereby saving development cost. After the kernel source code is modified by the patch program, the target body which cannot be preempted originally can be determined by running the modified kernel source code, and then the mode corresponding to the target body is configured into the preemptible mode from the non-preemptive mode, so that the target body which cannot be preempted originally can be preempted, the preemption performance of the Linux-based processor kernel is improved, and correspondingly, the real-time response capability of the processor kernel is improved.
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FIG. 1 is a flowchart illustrating steps of a method for optimizing a processor core according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating steps of another method for optimizing processor cores, in accordance with an embodiment of the present invention;
fig. 3 is a schematic block diagram of a processor core optimization apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
In the embodiment of the present invention, a Linux platform-based processor optimization scheme may be applied to MIPS (Microprocessor without interlocked pipeline stages) to describe a processor core optimization scheme.
Referring to fig. 1, a schematic flow chart illustrating steps of a method for optimizing a processor core according to an embodiment of the present invention is shown, which may specifically include the following steps:
it should be noted that the processor in the present embodiment may be a processor based on a Linux platform. The Linux system aims to achieve better average performance and ensure that each process can be operated, so that the real-time performance of the Linux system is poor. Similarly, the real-time performance of the processor developed based on the Linux platform is relatively poor. In order to improve the real-time performance of the processor based on the Linux platform, the real-time performance can be realized by modifying the kernel of the processor.
In this embodiment of the present invention, the patch object may be a real-time preemption patch object. The real-time preemption patch object is used for preempting an original non-preemptible target area/target object in the kernel, and can further reduce the preemption granularity and improve the real-time performance of the kernel of the processor on the basis of the prior Linux preemption characteristic.
in an embodiment of the invention, after obtaining the patch object, the patch object may be written into source code of the processor core.
In a specific implementation, a storage directory of the kernel source code may be determined first, then the obtained patch object is written into the storage directory, and then step 103 is performed to determine a plurality of target entities in the processor kernel by running the source code written with the patch object.
103, determining a plurality of target bodies in the current processor kernel by operating the source code written with the patch program object;
in the embodiment of the present invention, running the source code written with the patch object may be implemented by executing a specific program or command.
For example, if the patch object is patch-3.10.84-rt92.patch, the source code in which the patch object is written may be run by executing the following commands:
git apply patch-3.10.84-rt92.patch
by running the source code with the patch object written thereto, a plurality of objects in the current processor core may be identified, which may include target areas, and/or target objects, etc. In a normal case, each of the target entities is in a non-preemption mode, i.e., the target areas and the target objects cannot be preempted.
And 104, configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
In the embodiment of the present invention, in order to improve the real-time performance of the processor core, the pre-emption granularity may be implemented by reducing the pre-emption granularity based on the patch object, where the pre-emption granularity refers to the time precision of the timer of the processor core. For example, if the time precision of the timer is 10s, the preemption granularity of the corresponding processor core is 10 s; after the configuration is in the full preemption mode, if the precision of the timer is 1s, the preemption granularity of the corresponding processor core is 1s, so that the purpose of reducing the preemption granularity of the processor core is achieved.
In a specific implementation, the mode corresponding to the plurality of targets in the processor core may be configured from the non-preemptive mode to the preemptive mode. Wherein the target volume comprises a target area and/or a target object. In preemptible mode, target regions and/or target objects may include code sections that were previously not preempted, such as lock protected critical sections, interrupt routines, etc., may be preempted.
The target areas and/or the target objects which cannot be preempted in the prior art are configured to be in a preemptible mode, so that the target areas and/or the target objects can be preempted in the process of running the process, processor resources can be allocated to the process according to the real-time requirement of the process, the process with higher real-time requirement can be preferentially allocated to more processor resources in the running process, and the real-time performance of the processor kernel is effectively improved.
In the embodiment of the present invention, by obtaining a patch object for a current processor core, and writing the patch object into a source code of the current processor core, after determining a plurality of target entities in the current processor core by running the source code written with the patch object, a mode corresponding to the plurality of target entities may be configured from a non-preemptive mode to a preemptive mode, so as to improve the real-time performance of the current processor core. In the embodiment, the processor kernel in the Linux system is optimized in a way of patching the processor kernel, and the patch program object is written into the source code of the kernel, so that the modification of the processor kernel is realized. The patch object in this embodiment may be a patch applicable to various types of processor cores, and a real-time core does not need to be separately developed for each type of processor core, thereby saving development cost. After the kernel source code is modified by the patch program object, the target body which cannot be preempted originally can be determined by running the modified kernel source code, and then the mode corresponding to the target body is configured into a preemptible mode from a non-preemptible mode, so that the target body which cannot be preempted originally can be preempted, the preemption performance of the kernel of the Linux-based processor is improved, correspondingly, the real-time response capability of the kernel of the processor is improved, and the modified kernel of the processor can meet the requirements of various computer systems with higher requirements on real-time performance.
Referring to fig. 2, a schematic flow chart illustrating steps of a method for optimizing a processor core according to another embodiment of the present invention is shown, which may specifically include the following steps:
step 201, obtaining a patch object for a current processor kernel;
it should be noted that the current processor core may be a processor core based on a Linux platform. Because the real-time performance of the processor core of the Linux platform is poor, in order to expand the application range of the processor core and enable the processor core to meet the requirements of a computer system with high real-time performance requirements, it is necessary to improve the real-time performance of the processor core.
In the embodiment of the invention, in order to improve the real-time performance of the Linux kernel, the Linux kernel can be modified. For example, the Linux kernel may be patched.
In the embodiment of the present invention, the patch object may be a patch applicable to processor cores of different models, and is a universal real-time preemption patch, and the real-time preemption patch can further reduce preemption granularity and improve real-time performance of a processor core on the basis of the existing Linux preemption characteristics.
For example, if the current processor kernel is a Linux platform based a processor kernel with a kernel type number Linux-3.10.84, the real-time preemption patch object may be patch-3.10.84-rt92.
In addition, aiming at the Linux platform, the patch object comprises an improved part corresponding to the MIPS platform; the improvement part is mainly to modify the interrupt flag bit to match the MIPS platform.
Step 202, determining a storage directory of a source code of the current processor core;
in an embodiment of the invention, after obtaining the patch object, the patch object may be written into source code of the processor core.
In a particular implementation, a storage directory of kernel source code may be first determined. For example, a storage directory storing the Linux-3.10.84 source code described above.
Step 203, writing the patch object into the storage directory;
in a specific implementation, the patch object patch-3.10.84-rt92.patch can be preempted in real time and written into a storage directory storing the Linux-3.10.84 source code.
In embodiments of the present invention, the modification to the processor core is actually a modification to the source code of the processor core. Therefore, after the storage directory of the source code is determined, the patch object can be directly written into the storage directory, so that the source code can be modified.
Step 204, determining a plurality of target bodies in the current processor kernel by running the source code written with the patch object;
in the embodiment of the present invention, running the source code written with the real-time preemption patch object may be implemented by executing a specific program or command.
For example, for the real-time preemption patch object patch-3.10.84-rt92.patch, the source code in which the real-time preemption patch object is written may be executed by executing the following commands:
git apply patch-3.10.84-rt92.patch
in an embodiment of the present invention, by running the modified source code, a plurality of objects in the current processor core may be determined, where the objects may include a target area, and/or a target object, etc. These objects are normally in a non-preemptive mode, i.e., the target areas and target objects cannot be preempted.
In a specific implementation, the target object may be an interrupt program, a lock in Linux, such as spin lock _ t, or the like; the target region may be a region such as a critical section that is locked for protection.
Step 205, replacing the spin lock in the current processor core with a mutex;
in the embodiment of the invention, before the mode corresponding to the target area and the target object is configured to be the preemptive mode from the non-preemptive mode, the spinlock _ t can be replaced by the mutex, and the mutex is a synchronization mechanism under the Linux platform.
When the system calls spinlock _ t, since spinlock _ t is replaced by rtmutex, spinlock _ t may enter a sleep state so that a target region or target object protected by spinlock _ t may be preempted. The sleep state is a waiting state in which an executing process enters due to internal or external causes.
Step 206, based on the mutex, configuring the mode corresponding to the target areas and/or target objects from a non-preemptive mode to a preemptive mode;
in the embodiment of the present invention, after the rtimutex is used to replace the spinlock _ t in the kernel, the modes corresponding to the target areas and/or the target objects can be configured from the non-preemptive mode to the preemptive mode based on the rtmutex.
In the embodiment of the invention, the spin lock in the kernel is replaced by the mutex, so that the spin lock in the Linux can be interrupted, and the context switching in the kernel source code can be realized; because the lock can be broken, the corresponding critical area or object protected by the lock can be preempted, and the target area and the target object are configured to be in a preemptive mode from a non-preemptive mode. Under the preemptive mode, the system scheduling speed can be increased, and the real-time performance of the system is improved.
Step 207, when detecting that the interrupt occurs, acquiring an interrupt execution program;
in the embodiment of the invention, after the source code of the processor core is modified, the modified source code allows scheduling to occur when the interrupt returns, but the task cannot be scheduled in the period from the interrupt occurrence to the interrupt return. From the interrupt occurrence to the interrupt return, in addition to the register protection work at the hardware level, an interrupt processing routine, that is, an interrupt execution program, is included.
The hardware level of operation is essentially deterministic for a particular hardware platform, but the execution time of the interrupt handling routine is unpredictable. Any other task is interrupted whenever an interrupt occurs, so the interrupt has the highest priority, and if external I/O events occur frequently, other real-time tasks are difficult to schedule. In addition, when executing the interrupt processing routine, since the interrupt processing routine cannot be scheduled but a stack space for saving the interrupt context is limited, the interrupt is turned off during the execution period in order to prevent the cascade interrupt, which means that even if an external event is more urgent to occur, the interrupt cannot be processed.
Therefore, in order to solve the above problem, the patch object in this embodiment introduces threading of the interrupt handling routine, so that the interrupt handling routine becomes a schedulable entity, which not only can prioritize the interrupt handling according to the real-time requirement of the task, but also reduces the area for largely shutting down the interrupt, so that the scheduler can start up earlier.
In particular implementations, when an interrupt occurrence is detected, an interrupt handling routine may first be obtained.
Step 208, threading the interrupt executive program to generate a corresponding interrupt thread, wherein the interrupt thread comprises a soft interrupt thread and/or a hard interrupt thread;
in embodiments of the present invention, interrupt executive threading includes soft interrupt threading and hard interrupt threading. The hard interrupt is an interrupt caused by an external device, and the soft interrupt is an interrupt caused by a program and corresponds to different interrupt sources of an interrupt signal.
In specific implementation, a preset function can be called to create a soft interrupt thread, and the threading of the interrupt executive program is realized by transferring the interrupt executive program to a corresponding soft interrupt thread; similarly, a preset function may also be called to create a hard interrupt thread, and the above-mentioned interrupt executive program is transferred to the corresponding hard interrupt thread, so as to implement threading of the interrupt executive program.
Specifically, the threading of soft interrupts may be performed in a spawn _ ksofirqd () function, which is executed upon initialization of the kernel, and which creates a corresponding soft interrupt thread through a kthread () function call, and sets the priority of each soft interrupt thread, the priority of the soft interrupt thread being lower than that of the hard interrupt thread and higher than that of the user process. After threading the soft interrupt, all processing of the soft interrupt may be transferred to the soft interrupt thread.
On the other hand, the irq _ thread () function may be called by the kthread _ create () function to create a corresponding hard interrupt thread, and the scheduling policy of the hard interrupt thread is also a real-time scheduling policy, whose priority is higher than that of the soft interrupt thread.
Step 209, determining the priority of each interrupt thread in the current processor core;
generally, one situation that affects system real-time is the problem of priority rollover. The priority roll-over may be described as follows: assuming there are three processes A, B and C, with priority C > B > A in order, a process A with lower priority gets resources, e.g., gets locks, a process B with medium priority starts executing, preempting the resources that process A gets, when a process C with higher priority tries to get the lock held by A, but B preempts the lock of process A, C blocks, i.e., cannot release the lock to C.
An effective way to solve the problem of priority rollover is priority inheritance. Priority inheritance is the process with high priority temporarily adjusting its own high priority to the process with low priority holding the lock, and is transitive. For example, in the above example, if a higher priority process D attempts to acquire a second lock held by a higher priority process C, then process C, A is temporarily raised to the priority of the D process and allowed to run.
In the embodiment of the invention, the priority of each process is adjusted aiming at the interrupt thread. Threading the interrupt executive program to enable the interrupt thread to become a schedulable entity, and adjusting the priority level of the corresponding interrupt thread according to the real-time requirement of each process.
Step 210, adjusting the priority of each interrupt thread to determine the priority of each corresponding process;
typically, the interrupt thread contains an interrupt thread descriptor having a variable therein that identifies the priority of the interrupt thread, and modification of this variable enables adjustment of the priority of the interrupt thread. The purpose of the adjustment of the priority of each interrupt thread is to determine the priority of each process corresponding to the interrupt thread, so that the process with higher requirement on real-time performance can be preferentially allocated to more processor resources, and the real-time performance of the process operation is ensured.
It should be noted that the adjustment of the priority may be determined manually according to the real-time requirement of each process or determined in another specific manner, which is not limited in this embodiment.
Step 211, configuring a clock management system for the current processor core, wherein the precision of the clock management system is nanosecond level.
It should be noted that, configuring the clock management system for the processor core may be performed after completing modifying the source code of the processor core, that is, in this step 211, the mode corresponding to the plurality of target regions and/or target objects may be configured from the non-preemptive mode to the preemptive mode in step 206, and there is no specific order with step 207 to step 210.
In the embodiment of the invention, in order to improve the real-time performance of the system, a clock management system with higher precision can be configured for the current processor core.
In general, a clock management system has two main functions, namely acquiring time and providing a soft clock so as to start a task within a specified time limit.
Early Linux systems were clocked by periodic clock ticks based on a global variable, Jiffies being able to resolve to 1ms when the system clock frequency was set to 1000 Hz. The system soft clock is also based on Jiffies and therefore can only provide a soft clock of 1ms granularity. For example, the task may be set to wake up in the next millisecond. In such a clock system, to obtain high precision time, access to a specific clock counter of the hardware platform is required. However, in order to schedule tasks having a shorter periodicity, the clock frequency needs to be set shorter. Thus, there are two significant problems with conventional clock management systems: firstly, in the aspect of acquiring time, in order to acquire high-precision time, a specific platform is required to be relied on; secondly, in order to schedule the short-period task, the clock frequency needs to be set to be a smaller value, which means that the clock interrupt is more frequent, and a large amount of clock interrupt processing and resource waste can be caused.
Therefore, to solve the above problems, a clock management system with higher accuracy, such as a clock management system with nanosecond (ns) accuracy, may be configured for the processor core, which may provide nanosecond timing accuracy for the system to meet the application or core driver with urgent need for accurate time, such as a multimedia application, a driver of an audio device, and the like, so as to further improve the real-time performance of the system.
As shown in the table one and the table two, the time delay data obtained by optimizing the Linux-3.10.84 processor kernel based on the Linux platform by using the optimization method provided in the present embodiment is respectively a patch-3.10.84-rt92.patch object occupied in real time by the above optimization.
Table one: time delay data of Linux-3.10.84 processor core before optimization
| Sequence of events | Minimum delay (us) | Mean time delay (us) | Maximum delay (us) |
| 1 | 8 | 18 | 13858 |
| 2 | 8 | 13 | 12081 |
| 3 | 8 | 13 | 13260 |
| 4 | 8 | 15 | 15084 |
Table two: optimized Linux-3.10.84 processor core delay data
| Sequence of events | Minimum delay (us) | Mean time delay (us) | Maximum delay (us) |
| 1 | 4 | 13 | 150 |
| 2 | 3 | 13 | 141 |
| 3 | 4 | 13 | 164 |
| 4 | 5 | 13 | 161 |
The comparison shows that after the Linux-3.10.84 processor kernel is introduced with patch-3.10.84-rt92.patch real-time optimization, the real-time performance of the processor kernel is obviously improved.
In the embodiment of the invention, by writing the patch program object into the source code of the processor kernel, after determining a plurality of target bodies in the current processor kernel by running the source code written with the patch program object, the modes corresponding to the plurality of target bodies can be configured into a preemptible mode from a non-preemptible mode, so that a lock in Linux can be interrupted, the context switching of the source code is realized, and as the lock can be interrupted, the corresponding region or object protected by locking can be preempted; secondly, the embodiment also prevents the priority from turning over by realizing priority inheritance, and can thread an interrupt handling program, so that the interrupt can also participate in scheduling and be preempted like other processes; thirdly, the embodiment can configure a clock management system with higher precision for the processor core, so that the system can schedule tasks with shorter periodicity.
It should be noted that, for simplicity of description, the method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present invention is not limited by the illustrated order of acts, as some steps may occur in other orders or concurrently in accordance with the embodiments of the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are presently preferred and that no particular act is required to implement the invention.
Referring to fig. 3, a schematic structural block diagram of a processor core optimization apparatus according to an embodiment of the present invention is shown, which may specifically include the following modules:
an obtaining module 301, configured to obtain a patch object for a current processor core;
a writing module 302, configured to write the patch object into the source code of the current processor core;
a determining module 303, configured to determine a plurality of target entities in the current processor kernel by running the source code written with the patch object;
a configuration module 304, configured to configure the modes corresponding to the plurality of targets from a non-preemptive mode to a preemptive mode.
In this embodiment of the present invention, the writing module 302 may specifically include the following sub-modules:
a storage directory determination submodule for determining a storage directory of the source code of the current processor core;
and the patch program object writing submodule is used for writing the patch program object into the storage directory.
In this embodiment of the present invention, the target volume may include a target area and/or a target object, and the configuration module 304 may specifically include the following sub-modules:
a replacement submodule for replacing a spin lock in the current processor core with a mutex;
and the configuration submodule is used for configuring the modes corresponding to the target areas and/or the target objects from the non-preemptive mode to the preemptive mode based on the mutex.
In the embodiment of the present invention, the apparatus may further include the following modules:
the interrupt executive program acquisition module is used for acquiring an interrupt executive program when the interrupt is detected;
and the interrupt thread generating module is used for threading the interrupt executive program and generating a corresponding interrupt thread, wherein the interrupt thread can comprise a soft interrupt thread and/or a hard interrupt thread.
In this embodiment of the present invention, the interrupt thread generating module may specifically include the following sub-modules:
the calling submodule is used for calling a preset function to create a soft interrupt thread and/or a hard interrupt thread;
and the transfer submodule is used for transferring the interrupt executive program to the soft interrupt thread and/or the hard interrupt thread.
In the embodiment of the present invention, the apparatus may further include the following modules:
a priority determination module, configured to determine a priority of each interrupt thread in the current processor core;
and the priority adjusting module is used for adjusting the priority of each interrupt thread.
In the embodiment of the present invention, the apparatus may further include the following modules:
and the clock management system configuration module is used for configuring a clock management system for the current processor core, and the precision of the clock management system can be nanosecond.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
An embodiment of the present invention further provides a storage medium, where when instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the above-mentioned method for optimizing a processor core, where the method includes: obtaining a patch object for a current processor core; writing the patch object to source code of the current processor core; determining a plurality of objects in the current processor kernel by running source code written with the patch object; and configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: determining a storage directory of source code of the current processor core; and writing the patch program object into the storage directory.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: replacing a spin lock in the current processor core with a mutex; and based on the mutex, configuring the modes corresponding to the target areas and/or the target objects from a non-preemptive mode to a preemptive mode.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: when the interrupt is detected, acquiring an interrupt execution program; threading the interrupt executive program to generate a corresponding interrupt thread, wherein the interrupt thread can comprise a soft interrupt thread and/or a hard interrupt thread.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: calling a preset function to create a soft interrupt thread and/or a hard interrupt thread; and transferring the interrupt executive program to the soft interrupt thread and/or a hard interrupt thread.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: determining a priority of each interrupt thread in the current processor core; and adjusting the priority of each interrupt thread.
Optionally, the instructions in the storage medium, when executed by a processor of an electronic device, cause the electronic device to further perform the method of: a clock management system is configured for the current processor core, which may be in nanoseconds of accuracy.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The present invention provides a method, a device and a storage medium for optimizing a processor core, which are described in detail above, and the present invention applies specific examples to illustrate the principles and embodiments of the present invention, and the description of the above examples is only used to help understand the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A method for processor core optimization, comprising:
obtaining a patch object for a current processor core;
writing the patch object to source code of the current processor core;
determining a plurality of objects in the current processor kernel by running source code written with the patch object;
and configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
2. The method as claimed in claim 1, wherein said step of writing said patch object to source code of said current processor core comprises:
determining a storage directory of source code of the current processor core;
and writing the patch program object into the storage directory.
3. The method of claim 1, wherein the targets include target regions and/or target objects, and wherein the step of configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode comprises:
replacing a spin lock in the current processor core with a mutex;
and based on the mutex, configuring the modes corresponding to the target areas and/or the target objects from a non-preemptive mode to a preemptive mode.
4. The method of claim 1, further comprising:
when the interrupt is detected, acquiring an interrupt execution program;
threading the interrupt executive program to generate a corresponding interrupt thread, wherein the interrupt thread comprises a soft interrupt thread and/or a hard interrupt thread.
5. The method of claim 4, wherein the step of threading the interrupt executive to generate a corresponding interrupt thread comprises:
calling a preset function to create a soft interrupt thread and/or a hard interrupt thread;
and transferring the interrupt executive program to the soft interrupt thread and/or a hard interrupt thread.
6. The method of claim 4, wherein threading the interrupt executive to generate a corresponding interrupt thread further comprises:
determining a priority of each interrupt thread in the current processor core;
and adjusting the priority of each interrupt thread.
7. The method of any one of claims 1-6, further comprising:
and configuring a clock management system for the current processor core, wherein the precision of the clock management system is nanosecond.
8. A processor core optimization apparatus, comprising:
an obtaining module for obtaining a patch object for a current processor core;
a write module for writing the patch object into the source code of the current processor core;
a determining module, configured to determine a plurality of objects in the current processor kernel by running the source code written with the patch object;
and the configuration module is used for configuring the modes corresponding to the plurality of targets from the non-preemptive mode to the preemptive mode.
9. The apparatus of claim 8, wherein the target volume comprises a target region and/or a target object, and wherein the configuration module comprises:
a replacement submodule for replacing a spin lock in the current processor core with a mutex;
and the configuration submodule is used for configuring the modes corresponding to the target areas and/or the target objects from the non-preemptive mode to the preemptive mode based on the mutex.
10. A storage medium, characterized in that instructions in the storage medium, when executed by a processor of an electronic device, enable the electronic device to perform a processor core optimization method according to one or more of the method claims 1-7.
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