CN110796976B - Detection method and detection system of array substrate - Google Patents
Detection method and detection system of array substrate Download PDFInfo
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- CN110796976B CN110796976B CN201911278192.1A CN201911278192A CN110796976B CN 110796976 B CN110796976 B CN 110796976B CN 201911278192 A CN201911278192 A CN 201911278192A CN 110796976 B CN110796976 B CN 110796976B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The embodiment of the invention provides a detection method and a detection system of an array substrate, relates to the technical field of display, and can be used for detecting whether a first power line and a first sub-pixel circuit are disconnected. The detection method of the array substrate comprises the steps of inputting direct current voltage to a first power line, inputting signals to a first scanning signal line, turning on a first sub-pixel circuit, and inputting the direct current voltage of the first power line to an anode of a light-emitting device; inputting an alternating voltage to a second power line, inputting a signal to a second scanning signal line, turning on a second sub-pixel circuit, and inputting the alternating voltage of the second power line to an anode of the light emitting device; detecting the voltage of an anode of the light-emitting device, judging whether the absolute value of the difference value between the voltage value of the anode and the direct-current voltage is larger than a preset voltage value or not, and the absolute value of the difference value between the voltage value of the anode and the direct-current voltage is larger than the preset voltage value, wherein the first sub-pixel circuit is disconnected with the first power line; the absolute value of the difference between the voltages of the direct current voltage and the alternating current voltage in the writing phase is greater than a preset voltage value.
Description
Technical Field
The invention relates to the technical field of display, in particular to a detection method and a detection system of an array substrate.
Background
Electroluminescent display devices have the advantages of self-luminescence, low power consumption, wide viewing angle, fast response speed, and high contrast, and thus become the mainstream trend of current display devices.
An electroluminescent display device includes a display substrate and an encapsulation layer for encapsulating the display substrate. The display substrate includes an array substrate including a plurality of sub-pixels each including a pixel circuit.
Disclosure of Invention
Embodiments of the present invention provide a method and a system for detecting an array substrate, which can be used to detect whether a first power line and a first sub-pixel circuit in a sub-pixel are disconnected.
In order to achieve the above purpose, the embodiment of the invention adopts the following technical scheme:
in one aspect, a method for detecting an array substrate is provided, where the array substrate includes a plurality of sub-pixels, each of the sub-pixels includes a pixel circuit, and the pixel circuit includes a first sub-pixel circuit, a second sub-pixel circuit, and a light emitting device; the first sub-pixel circuit is electrically connected with a first power line, a first scanning signal line, a data signal line and an anode of the light emitting device; the second sub-pixel circuit is electrically connected with a second power line, a second scanning signal line and an anode of the light-emitting device; the detection method of the array substrate comprises the following steps: in a writing phase, inputting a direct current voltage to the first power line, inputting a gate signal to the first scanning signal line, and turning on the first sub-pixel circuit to input the direct current voltage of the first power line to an anode of the light emitting device; inputting an alternating voltage to the second power line, inputting a gate signal to the second scanning signal line, and turning on the second sub-pixel circuit so that the alternating voltage of the second power line is input to an anode of the light emitting device; in a detection phase, detecting a voltage value of the anode of the light emitting device in the sub-pixel, and determining whether an absolute value of a difference between the voltage value of the anode and the dc voltage is greater than a preset voltage value, if the absolute value of the difference between the voltage value of the anode and the dc voltage is greater than the preset voltage value, disconnecting the first sub-pixel circuit in the sub-pixel from the first power line; wherein an absolute value of a difference between voltages of the direct current voltage and the alternating current voltage in the writing phase is greater than the preset voltage value.
In some embodiments, the dc voltage is a positive voltage, and the ac voltage is a negative voltage during the writing phase; or the direct current voltage is a negative voltage, and the voltage of the alternating current voltage in the writing stage is a positive voltage.
In some embodiments, a reset phase is set before the write phase, and the method for inspecting an array substrate further includes: in the reset stage, inputting a ground voltage to the first power line, the second power line and the data signal line; inputting a gate signal to the first scan signal line to turn on the first sub-pixel circuit, and inputting a ground voltage of the data signal line to an anode of the light emitting device; a gate signal is input to the second scan signal line to turn on the second subpixel circuit, and a ground voltage of the second power line is input to an anode of the light emitting device.
In some embodiments, after the resetting phase, a charging phase is provided before the writing phase, and the method for inspecting an array substrate further includes: inputting a gating signal to the first scanning signal line in the charging stage so as to disconnect the first sub-pixel circuit; inputting a gate signal to the second scan signal line to turn off the second subpixel circuit; and inputting a direct current voltage to the first power line, and inputting an alternating current voltage to the second power line.
In some embodiments, the first subpixel circuit includes a drive subcircuit and a write subcircuit; the driving sub-circuit is electrically connected with the first power line, the writing sub-circuit and the anode of the light-emitting device and is used for driving the light-emitting device to emit light; the write-in sub-circuit is electrically connected to the data signal line and the first scanning signal line, and is configured to write a voltage of the data signal line into the driving sub-circuit under control of the first scanning signal line.
In some embodiments, the drive sub-circuit comprises a drive transistor and a storage capacitor; the grid electrode of the driving transistor is electrically connected with the writing sub-circuit, the first pole of the driving transistor is electrically connected with the first power line, and the second pole of the driving transistor is electrically connected with the anode of the light-emitting device; one end of the storage capacitor is electrically connected with the grid electrode of the driving transistor, and the other end of the storage capacitor is electrically connected with the anode of the light-emitting device.
In some embodiments, before the detecting the voltage value of the anode of the light emitting device in the sub-pixel, the detecting method of the array substrate further includes: inputting a gate signal to the first scan signal line to turn off the first sub-pixel circuit in the detection stage; and inputting a gate signal to the second scanning signal line to turn off the second sub-pixel circuit.
In some embodiments, the second subpixel circuit includes a first transistor having a gate electrically connected to the second scan signal line, a first electrode electrically connected to the second power line, and a second electrode electrically connected to the anode of the light emitting device.
In another aspect, a detection system is provided, which includes a detection device and an array substrate, wherein the detection device is electrically connected to the array substrate; the detection apparatus includes: a memory and a processor; the memory is configured to store instructions; the processor is electrically connected with the memory, and when the instructions are executed by the processor, the processor is enabled to execute the detection method of the array substrate.
In some embodiments, the detection device further comprises a display screen; the display screen comprises a plurality of areas, and each area corresponds to one sub-pixel of the array substrate; if the absolute value of the difference value between the voltage value of the anode in the sub-pixel of the array substrate and the direct-current voltage is larger than a preset voltage value, displaying a first color in an area, corresponding to the sub-pixel, in the display screen; and if the absolute value of the difference value between the voltage value of the anode in the sub-pixel of the array substrate and the direct current voltage is smaller than or equal to a preset voltage value, displaying a second color in the area, corresponding to the sub-pixel, in the display screen.
The embodiment of the invention provides a detection method and a detection system of an array substrate, wherein in a writing-in stage, a direct current voltage is input to a first power line, a gating signal is input to a first scanning signal line, and a first sub-pixel circuit is opened so that the direct current voltage of the first power line is input to an anode of a light-emitting device; inputting an alternating voltage to a second power line, inputting a gate signal to a second scanning signal line, and turning on a second sub-pixel circuit so that the alternating voltage of the second power line is input to an anode of the light emitting device; in the detection stage, detecting the voltage value of the anode of the light-emitting device in the sub-pixel, and judging whether the absolute value of the difference value between the voltage value of the anode and the direct current voltage is greater than a preset voltage value, if the absolute value of the difference value between the voltage value of the anode and the direct current voltage is greater than the preset voltage value, writing the voltage of the alternating current voltage in the writing stage into the anode, so that the disconnection between a first sub-pixel circuit in the sub-pixel and a first power line can be judged; if the absolute value of the difference between the voltage value of the anode and the direct current voltage is less than or equal to the preset voltage value, the direct current voltage is written into the anode, so that the fact that the first sub-pixel circuit and the first power line in the sub-pixel are not disconnected can be judged.
Drawings
In order to more clearly illustrate the embodiments of the present invention or technical solutions in related arts, the drawings used in the description of the embodiments or related arts will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an electroluminescent display device according to an embodiment of the present invention;
FIG. 2 is a schematic diagram illustrating a region division of an electroluminescence display panel according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an electroluminescent display panel according to an embodiment of the present invention;
fig. 4 is a first schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 5 is a first schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 6 is a second schematic structural diagram of an array substrate according to an embodiment of the present invention;
fig. 7 is a second schematic structural diagram of a pixel circuit according to an embodiment of the invention;
fig. 8 is a schematic flowchart illustrating a method for inspecting an array substrate according to an embodiment of the present invention;
FIG. 9 is a timing diagram of various signal lines according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a detection system according to an embodiment of the present invention;
fig. 11 is a schematic diagram of a display screen displaying a first color and a second color according to an embodiment of the present invention.
Reference numerals:
01-a display area; 02-a peripheral zone; 011-subpixels; 1-electroluminescent display panel; 2-a frame; 3-cover plate glass; 4-a circuit board; 10-a pixel circuit; 11-a substrate for display; 12-an encapsulation layer; 13-an array substrate; 20-a connecting wire; 30-a detection device; 101-a first subpixel circuit; 102-a second sub-pixel circuit; 110-a substrate; 111-transistor; 112-an anode; 113-a light emitting functional layer; 114-a cathode; 115-pixel definition layer; 116-a planar layer; 301-a memory; 302-a processor; 303-a display screen; 1011-a drive sub-circuit; 1012-write subcircuit.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
An embodiment of the present invention provides an electroluminescent display device, as shown in fig. 1, the electroluminescent display device includes an electroluminescent display panel 1, a frame 2, a cover glass 3, a circuit board 4, and other electronic components.
The longitudinal section of the frame 2 is U-shaped, the electroluminescent display panel 1, the circuit board 4 and other electronic accessories are all arranged in the frame 2, the circuit board 4 is arranged below the electroluminescent display panel 1, and the cover glass 3 is arranged on one side of the electroluminescent display panel 1 far away from the circuit board 4.
The electroluminescent Display device provided in the embodiment of the present invention may be an Organic electroluminescent Display device (OLED for short), in which case the electroluminescent Display panel 1 is an Organic electroluminescent Display panel; it may be a Quantum Dot electroluminescent Display device (QLED), in which case the electroluminescent Display panel 1 is a Quantum Dot electroluminescent Display panel.
As shown in fig. 2, the electroluminescent display panel 1 includes a display area 01 and a peripheral area 02 located on at least one side of the display area 01, and fig. 2 illustrates an example in which the peripheral area 02 surrounds the display area 01. The display region 01 includes a plurality of sub-pixels 011. The peripheral region 02 is used for wiring, and a gate driver circuit may be provided in the peripheral region 02.
As shown in fig. 3, the electroluminescent display panel 1 mainly includes a display substrate 11 and an encapsulation layer 12 for encapsulating the display substrate 11. Here, the sealing layer 12 may be a sealing film or a sealing substrate.
As shown in fig. 3, the substrate 11 for display includes an array substrate 13 and a light emitting device disposed on the array substrate 13 and located at each sub-pixel 011. The array substrate 13 includes a driving circuit disposed on the substrate 110 and located at each sub-pixel 011, the driving circuit including a plurality of transistors 111. The light-emitting device includes an anode 112, a light-emitting functional layer 113, and a cathode 114 which are stacked in this order, and the anode 112 is electrically connected to a drain of a transistor 111 which is a driving transistor among the plurality of transistors 111 of the driving circuit. The display substrate 11 further includes a pixel defining layer 115, the pixel defining layer 115 including a plurality of opening regions, one light emitting device being disposed in one of the opening regions. In some embodiments, the light Emitting function Layer 113 includes a light Emitting Layer (EL). In other embodiments, the light-emitting function layer 113 further includes one or more layers of an Electron Transport Layer (ETL), an Electron Injection Layer (EIL), a Hole Transport Layer (HTL), and a Hole Injection Layer (HIL), in addition to the light-emitting layer. In addition, in the case where the electroluminescence display panel 1 is an organic electroluminescence display panel, the light emitting layer is an organic light emitting layer. In the case where the electroluminescent display panel 1 is a quantum dot electroluminescent display panel, the light-emitting layer is a quantum dot light-emitting layer.
As shown in fig. 3, the array substrate 13 further includes a planarization layer 116 disposed on a side of the driving circuit away from the substrate 110.
The embodiment of the invention provides an array substrate which can be applied to the electroluminescent display panel 1, wherein the array substrate comprises a plurality of sub-pixels 011, and each sub-pixel 011 comprises a pixel circuit. As shown in fig. 4 and 5, the pixel circuit 10 includes a first sub-pixel circuit 101, a second sub-pixel circuit 102, and a light emitting device L; the first subpixel circuit 101 is electrically connected to the first power line S1, the first scanning signal line G1, the Data signal line Data, and the anode 112 of the light emitting device L, and is configured to turn on the first power line S1 and the anode 112 of the light emitting device L under the control of the first scanning signal line G1 and the Data signal line Data; the second sub-pixel circuit 102 is electrically connected to the second power line S2, the second scan signal line G2, and the anode 112 of the light emitting device L, and is configured to conduct the second power line S2 and the anode 112 of the light emitting device L under the control of the second scan signal line G2.
In some embodiments, the first power line S1 is a VDD power line, and the second power line S2 is a Sense line (Sense line).
In some embodiments, as shown in fig. 4, one end of each of the first power lines S1 on the array substrate 13 is electrically connected together through a connection line (busline) 20, the connection line 20 is electrically connected to a voltage input terminal (the voltage input terminal is not shown in fig. 4), and a voltage input at the voltage input terminal is input to the first power line S1 through the connection line 20. In other embodiments, as shown in fig. 6, two ends of the first power lines S1 on the array substrate 13 are electrically connected together through two connecting lines 20, the left ends of the first power lines S1 are electrically connected together through one connecting line 20, the right ends of the first power lines S1 are electrically connected together through one connecting line 20, and each connecting line 20 is electrically connected to a voltage input terminal (the voltage input terminal is not shown in fig. 6).
Based on this, in the case where the voltage input to the first power supply line S1 is a dc voltage, since a resistance on the first power supply line S1 causes a voltage drop, the voltage of the first power supply line S1 gradually decreases in a direction away from the connection line 20, so that the voltage input to the sub-pixel 011 from the first power supply line S1 gradually decreases in a direction away from the connection line 20. In the case where two ends of the first power line S1 are electrically connected to two connecting lines 20, respectively, since the two connecting lines 20 simultaneously input the dc voltage to one first power line S1, that is, the dc voltage is simultaneously input from two ends of the first power line S1 to the middle, the voltage drop of the first power line S1 along the direction away from the connecting line 20 is small, and in some embodiments, the voltage drop of the first power line S1 can be ignored, and it is considered approximately that the dc voltage input from the first power line S1 to each sub-pixel 011 is the same and equal to the dc voltage input from the connecting line 20 to the first power line S1.
It should be understood that the cathode 114 of the light emitting device L is electrically connected to the third power line VSS, as shown in fig. 5.
Here, the structure of the second sub-pixel circuit 102 is not limited to that the second power line S2 can be conducted to the anode 112 of the light emitting device L under the control of the second scan signal line G2. In some embodiments, as shown in fig. 6 and 7, the second sub-pixel circuit 102 includes a first transistor T1, a gate of the first transistor T1 is electrically connected to the second scan signal line G2, a first pole is electrically connected to the second power line S2, and a second pole is electrically connected to the anode 112 of the light emitting device L.
Here, the type of the first transistor T1 is not limited, and the first transistor T1 may be an N-type transistor, in which case, the first pole of the first transistor T1 is a drain, and the second pole is a source; the first transistor T1 may also be a P-type transistor, in which case the first electrode of the first transistor T1 is a source electrode, and the second electrode is a drain electrode.
In some embodiments, the second sub-pixel circuit 102 comprises at least one switching transistor in parallel with the first transistor T1, in addition to the first transistor T1, the second sub-pixel circuit 102. The foregoing is merely an illustration of the second sub-pixel circuit 102, and other structures having the same functions as the second sub-pixel circuit 102 are not described in detail here, but all of them should fall within the scope of the present invention.
The structure of the first sub-pixel circuit 101 is not limited so long as the first power supply line S1 can be turned on to the anode 112 of the light emitting device L under the control of the first scanning signal line G1 and the Data signal line Data. In some embodiments, as shown in FIG. 7, the first sub-pixel circuit 101 includes a drive sub-circuit 1011 and a write sub-circuit 1012; the driving sub-circuit 1011 is electrically connected to the first power line S1, the writing sub-circuit 1012, and the anode 112 of the light emitting device L, and drives the light emitting device L to emit light; the write sub-circuit 1012 is electrically connected to the Data signal line Data and the first scanning signal line G1, and writes the voltage of the Data signal line Data to the drive sub-circuit 1011 under the control of the first scanning signal line G1.
Here, the structure of the driving sub-circuit 1011 is not limited to that capable of driving the light emitting device L to emit light. In some embodiments, as shown in fig. 7, the driving sub-circuit 1011 includes a driving transistor Td and a storage capacitor Cst; the gate of the driving transistor Td is electrically connected to the writing sub-circuit 1012, the first pole is electrically connected to the first power line S1, and the second pole is electrically connected to the anode 112 of the light emitting device L; one end of the storage capacitor Cst is electrically connected to the gate electrode of the driving transistor Td, and the other end is electrically connected to the anode 112 of the light emitting device L.
Here, the type of the driving transistor Td is not limited, and the driving transistor Td may be an N-type transistor, in which case the first pole is a drain and the second pole is a source; the driving transistor Td may also be a P-type transistor, in which case the first electrode is a source and the second electrode is a drain.
In some embodiments, the drive sub-circuit 1011 includes at least one switching transistor in parallel with the drive transistor Td, in addition to the drive transistor Td. The foregoing is merely an illustration of the driving sub-circuit 1011, and other structures having the same function as the driving sub-circuit 1011 are not described in detail here, but all shall fall within the scope of the present invention.
The configuration of the write sub-circuit 1012 is not limited, and the voltage of the Data signal line Data can be written into the drive sub-circuit 1011 under the control of the first scanning signal line G1. In some embodiments, as shown in FIG. 7, the write subcircuit 1012 includes a second transistor T2; the gate electrode of the second transistor T2 is electrically connected to the first scanning signal line G1, the first electrode is electrically connected to the Data signal line Data, and the second electrode is electrically connected to the gate electrode of the driving transistor Td.
The type of the second transistor T2 is not limited, and the second transistor T2 may be an N-type transistor, in which case, the first pole is a drain and the second pole is a source; the second transistor T2 may also be a P-type transistor, in which case the first pole is a source and the second pole is a drain.
In some embodiments, the write subcircuit 1012 includes at least one switching transistor in parallel with the second transistor T2 in addition to the second transistor T2. The above description is only an example of the write sub-circuit 1012, and other structures having the same functions as the write sub-circuit 1012 are not described in detail here, but all of them should fall within the scope of the present invention.
Based on the above, the structure of the pixel circuit 10 provided by the embodiment of the present invention includes, but is not limited to, the 3T1C pixel circuit shown in fig. 6 and 7, and may also be other types of pixel circuits such as 6T1C, 7T1C, or 8T 1C. Here, nTmC means that one pixel circuit includes n transistors (denoted by the letter "T") and m capacitors (denoted by the letter "C"). On this basis, in some embodiments, for example, in the case where the structure of the pixel circuit 10 is other types of pixel circuits such as 6T1C, 7T1C, or 8T1C, the structure of the first sub-pixel circuit 101 may include a reset sub-circuit, a light-emission control sub-circuit, and the like, in addition to the driving sub-circuit 1011 and the writing sub-circuit 1012. For specific structures of the reset sub-circuit and the light-emitting control sub-circuit, reference may be made to structures of the reset sub-circuit and the light-emitting control sub-circuit in 6T1C, 7T1C, or 8T1C in the related art, which are not described herein again.
An embodiment of the present invention further provides a method for detecting an array substrate 13, which can be used to detect whether the first power line S1 on the array substrate 13 is disconnected from the first sub-pixel circuit 101 in the sub-pixel 011, and the method for detecting the array substrate 13, as shown in fig. 8, includes:
s100, in the writing stage t1, a Direct Current (DC) source power is input to the first power line S1, a gate signal is input to the first scanning signal line G1, and the first subpixel circuit 101 is turned on, so that the DC voltage of the first power line S1 is input to the anode 112 of the light emitting device L; inputting an Alternating Current (AC) voltage to the second power line S2, inputting a gate signal to the second scan signal line G2, and turning on the second subpixel circuit 102, so that the Alternating Current voltage of the second power line S2 is input to the anode 112 of the light emitting device L; the voltage value of the direct voltage and the voltage value of the alternating voltage in the writing phase t1 are not equal.
In the writing phase t1, since the first sub-pixel circuit 101 and the second sub-pixel circuit 102 are both turned on, the dc voltage of the first power line S1 and the ac voltage of the second power line S2 are simultaneously input to the anode 112 of the light emitting device L.
It will be understood by those skilled in the art that in the case where the direct current voltage of the first power line S1 and the alternating current voltage of the second power line S2 are simultaneously input to the anode 112 of the light emitting device L, the anode 112 voltage of the light emitting device L should be a voltage value of the direct current voltage when the anode 112 voltage of the light emitting device L is detected.
Here, the ac voltage input to the second power line S2 is not limited, and the waveform of the ac voltage is a rectangular wave. In some embodiments, the high level of the alternating voltage is positive and the low level is negative. In other embodiments, the high level of the ac voltage is positive and the low level is zero. In other embodiments, the high level of the ac voltage is zero and the low level is negative.
On this basis, the voltage value of the dc voltage and the voltage value of the ac voltage in the writing stage t1 are not limited, and may be positive, and negative; or the voltage value of the direct current voltage is negative, and the voltage value of the alternating current voltage in the writing stage t1 is positive; it is of course also possible that the voltage value of the direct voltage and the voltage value of the alternating voltage during the writing phase t1 are both positive or both negative.
S101, in a detection phase t2, detecting a voltage value of an anode 112 of a light emitting device L in a sub-pixel 011, and determining whether an absolute value of a difference between the voltage value of the anode 112 and a dc voltage is greater than a preset voltage value, if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is greater than the preset voltage value, disconnecting the first sub-pixel circuit 101 in the sub-pixel 011 from a first power line S1; if the absolute value of the difference between the voltage of the anode 112 and the dc voltage is less than or equal to the predetermined voltage, the first sub-pixel circuit 101 and the first power line S1 in the sub-pixel 011 are not disconnected; the absolute value of the difference between the voltages of the direct current voltage and the alternating current voltage in the writing-in stage t1 is larger than the preset voltage value.
In the case where the first sub-pixel circuit 101 is disconnected (open) from the first power line S1 and the second sub-pixel circuit 102 is not disconnected from the second power line S2, since the dc voltage of the first power line S1 cannot be written to the anode 112 of the light emitting device L through the first sub-pixel circuit 101 and the ac voltage of the second power line S2 can be written to the anode 112 of the light emitting device L through the second sub-pixel circuit 102, the voltage value of the anode 112 of the light emitting device L is detected as the voltage of the ac voltage of the second power line S2 in the writing stage t1 in the detection stage t 2. In this case, the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is the absolute value of the difference between the voltage of the ac voltage of the second power line S2 in the writing period t1 and the dc voltage.
Under the condition that the first sub-pixel circuit 101 and the first power line S1 are not disconnected, and the second sub-pixel circuit 102 and the second power line S2 are not disconnected, the dc voltage of the first power line S1 is input to the anode 112 of the light emitting device L through the first sub-pixel circuit 101, and the ac voltage of the second power line S2 is input to the anode 112 of the light emitting device L through the second sub-pixel circuit 102, so that in the detection stage t2, the detected voltage value of the anode 112 of the light emitting device L is the dc voltage input to the sub-pixel 011. In this case, the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is the absolute value of the difference between the dc voltage input to the subpixel 011 and the dc voltage input to the first power line S1. The dc voltage input to the subpixel 011 is equal to the dc voltage input to the first power line S1 regardless of the voltage drop of the dc voltage on the first power line S1. The direct-current voltage input to the sub-pixel 011 is smaller than the direct-current voltage input to the first power supply line S1 in consideration of a voltage drop of the direct-current voltage on the first power supply line S1.
Here, the preset voltage value is not limited and may be set as needed. In the case where there is no voltage drop or the voltage drop is negligibly small in the first power supply line S1, for example, the preset voltage value may be set to 0. If the absolute value of the difference between the voltage value of the anode 112 and the dc voltage input to the first power line S1 is greater than 0, that is, the voltage value of the anode 112 is not equal to the voltage value of the dc voltage input to the first power line S1, in this case, the voltage value of the anode 112 is equal to the voltage value of the ac voltage in the writing stage t1, and based on the above, it can be determined that the first power line S1 is disconnected from the first subpixel circuit 101. If the absolute value of the difference between the voltage value of the anode 112 and the dc voltage input to the first power line S1 is equal to 0, the voltage value of the anode 112 is equal to the voltage value of the dc voltage input to the first power line S1. Based on the above, it can be determined that the first power line S1 is not disconnected from the first sub-pixel circuit 101.
For another example, in the case where there is a voltage drop in the first power line S1, the preset voltage value may be set such that the preset voltage value is greater than the maximum voltage drop on the first power line S1 (the voltage drop is equal to the dc voltage input to the first power line S1 minus the dc voltage input to the subpixel 011), and the preset voltage value is smaller than the absolute value of the difference between the minimum dc voltage input to the subpixel 011 and the voltage of the ac voltage in the writing phase t 1.
On this basis, the voltages of the dc voltage and the ac voltage in the writing phase t1 are not limited, and the larger the absolute value of the difference between the voltages of the dc voltage and the ac voltage in the writing phase t1 is, the larger the absolute value of the difference between the voltage of the anode 112 and the dc voltage becomes because the voltage of the anode 112 is the voltage of the ac voltage in the writing phase t1 when the first subpixel circuit 101 in the subpixel 011 is disconnected from the first power line S1. Thus, the difference between the absolute value of the difference between the voltage value of the anode 112 and the dc voltage in the sub-pixel 011, in which the first sub-pixel circuit 101 and the first power line S1 are not disconnected, and the absolute value of the difference between the voltage value of the anode 112 and the dc voltage in the sub-pixel 011, in which the first sub-pixel circuit 101 and the first power line S1 are disconnected, is very significant, which is more beneficial to detecting whether the first sub-pixel circuit 101 and the first power line S1 are disconnected.
In the writing stage t1, a dc voltage is input to the first power line S1, a gate signal is input to the first scanning signal line G1, and the first sub-pixel circuit 101 is turned on, so that the dc voltage of the first power line S1 is input to the anode 112 of the light emitting device L; inputting an ac voltage to the second power line S2, inputting a gate signal to the second scanning signal line G2, and turning on the second sub-pixel circuit 102 so that the ac voltage of the second power line S2 is input to the anode 112 of the light emitting device L; in the detection phase t2, detecting a voltage value of the anode 112 of the light emitting device L in the subpixel 011, and determining whether an absolute value of a difference between the voltage value of the anode 112 and the dc voltage is greater than a preset voltage value, if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is greater than the preset voltage value, the anode 112 writes a voltage of the ac voltage in the writing phase t1, so as to determine that the first subpixel circuit 101 in the subpixel 011 is disconnected from the first power line S1; if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is less than or equal to the predetermined voltage value, the dc voltage is written into the anode 112, so that it can be determined that the first sub-pixel circuit 101 and the first power line S1 in the sub-pixel 011 are not disconnected.
In some embodiments, the dc voltage is a positive voltage, and the ac voltage is a negative voltage during the writing period t 1; alternatively, the dc voltage is a negative voltage, and the ac voltage is a positive voltage in the writing period t 1.
In the embodiment of the invention, because the direct-current voltage is a positive voltage, the voltage of the alternating-current voltage at the writing stage t1 is a negative voltage; alternatively, the dc voltage is a negative voltage, and the ac voltage in the writing period t1 is a positive voltage, so that the difference between the dc voltage and the ac voltage in the writing period t1 is relatively large. Thus, in the detection phase t2, the difference between the absolute value of the difference between the voltage value of the anode 112 and the dc voltage in the subpixel 011, where the first subpixel circuit 101 and the first power line S1 are not disconnected, and the absolute value of the difference between the voltage value of the anode 112 and the dc voltage in the subpixel 011, where the first subpixel circuit 101 and the first power line S1 are disconnected, is significantly changed abruptly, so that whether the first subpixel circuit 101 and the first power line S1 are disconnected can be accurately detected.
In some embodiments, a reset phase t3 is provided before the writing phase t1, and the method for inspecting the array substrate 13 further includes:
in the reset phase t3, a ground voltage (i.e., a GND signal) is input to the first power line S1, the second power line S2, and the Data signal line Data; a gate signal is input to the first scanning signal line G1 to turn on the first sub-pixel circuit 101, and the ground voltage of the Data signal line Data is input to the anode 112 of the light emitting device L; a gate signal is input to the second scanning signal line G2 to turn on the second sub-pixel circuit 102, and the ground voltage of the second power line S2 is input to the anode 112 of the light emitting device L.
In the embodiment of the present invention, before the writing stage t1, in the resetting stage t3, the ground voltage is input to the anode 112 of the light emitting device L through the Data signal line Data and the second power line S2, so that the signal residue of the anode 112 of the light emitting device L in the previous frame can be eliminated, and the voltage of the anode 112 of the light emitting device L detected in the current frame is ensured to be more accurate.
In some embodiments, after the reset phase t3 and before the write phase t1, a charging phase t4 is provided, and the method for inspecting an array substrate further includes:
in the charging phase t4, a gate signal is input to the first scanning signal line G1 to turn off the first sub-pixel circuit 101; inputting a gate signal to the second scanning signal line G2 to turn off the second sub-pixel circuit 102; a dc voltage is input to the first power line S1, and an ac voltage is input to the second power line S2.
When the gate signal is input to the first scan signal line G1 to turn on the first subpixel circuit 101 while the dc voltage is input to the first power line S1, it is considered that the dc voltage on the first power line S1 cannot be immediately input to the anode 112 of the light emitting device L through the first subpixel circuit 101 when the first subpixel circuit 101 is turned on because of a signal delay of the first power line S1. In order to avoid signal delay, when the first subpixel circuit 101 is turned off, a dc voltage is first input to the first power line S1 to precharge. Similarly, in order to avoid a signal delay in the second power line S2, when the second sub-pixel circuit 102 is turned on, the ac voltage on the second power line S2 cannot be immediately input to the anode 112 of the light emitting device L through the second sub-pixel circuit 102, and therefore, when the second sub-pixel circuit 102 is turned off, the ac voltage is first input to the second power line S2 to perform the precharge.
In the case that the first sub-pixel circuit 101 includes the driving sub-circuit 1011 and the driving sub-circuit 1011 includes the storage capacitor Cst, the storage capacitor Cst stores the voltage of the anode 112 of the light emitting device L after the voltage is input to the anode 112 of the light emitting device L in the writing stage t1 because the storage capacitor Cst is electrically connected to the anode 112 of the light emitting device L. Based on this, in some embodiments, in the detection phase t2, before detecting the voltage value of the anode 112 of the light emitting device L in the sub-pixel 011, the detection method of the array substrate 13 further includes:
in the detection phase t2, a gate signal is input to the first scanning signal line G1 to turn off the first sub-pixel circuit 101; a gate signal is input to the second scanning signal line G2 to turn off the second sub-pixel circuit 102.
In the embodiment of the present invention, in the detection stage t2, before the voltage value of the anode 112 of the light emitting device L in the sub-pixel 011 is detected, the gate signal is input to the first scan signal line G1 to turn off the first sub-pixel circuit 101, so that the dc voltage on the first power line S1 cannot be input to the anode 112 of the light emitting device L through the first sub-pixel circuit 101. A gate signal is input to the second scan signal line G2 to turn off the second sub-pixel circuit 102, so that the ac voltage on the second power line S2 cannot be input to the anode 112 of the light emitting device L through the second sub-pixel circuit 102. Since the anode 112 of the light emitting device L is electrically connected to the storage capacitor Cst, the voltage stored by the storage capacitor Cst during the writing phase t1 is input to the anode 112 of the light emitting device L during the detection phase t2, so that the voltage at the anode 112 of the light emitting device L can be detected during the detection phase t 2.
The following describes the detection process of the array substrate 13 in detail with reference to the timing chart shown in fig. 9 by taking the pixel circuit 10 shown in fig. 7 as an example.
In the reset phase T3, a GND signal is input to the first power line S1, the second power line S2 and the Data signal line Data, a high level signal is input to the first scan signal line G1 to turn on the second transistor T2, the GND signal on the Data signal line Data is input to one end of the storage capacitor Cst through the second transistor T2, and the residual charges of the storage capacitor Cst are released through the Data signal line Data. A high level signal is input to the second scan signal line G2 to turn on the first transistor T1, and a GND signal of the second power line S2 is input to the other end of the storage capacitor Cst through the first transistor T1, so that charges remaining in the storage capacitor Cst are discharged through the second power line S2. At this stage, the storage capacitor Cst discharges, and the signal residue of the anode 112 of the light emitting device L of the previous frame is removed.
In the charging stage T4, a low-level signal is input to the first scanning signal line G1, the second transistor T2 is turned off, a low-level signal is input to the second scanning signal line G2, and the first transistor T1 is turned off. A high-level signal is input to the Data signal line Data, a dc voltage, which is a positive voltage, is input to the first power line S1, and an ac voltage is input to the second power line S2. At this stage, the Data signal line Data, the first power line S1, and the second power line S2 are precharged.
In the write phase T1, a high-level signal is input to the first scan signal line G1, the second transistor T2 is turned on, and the gate voltage of the second transistor T2 is equal to the voltage of the first scan signal line G1, that is, vg = Vg1. Since the second transistor T2 is turned on, after a high-level signal is input to the Data signal line Data, a signal of the Data signal line Data is input to the gate of the driving transistor Td through the second transistor T2, and the gate voltage of the driving transistor Td is equal to the voltage on the Data signal line Data, that is, vg = VData. A direct current voltage, which is a positive voltage, is input to the first power line S1, and the source voltage of the driving transistor Td is equal to the direct current voltage of the first power line S1, that is, vd = VS1. Since Vgs > Vth of the driving transistor Td, the driving transistor Td is turned on, and the direct current voltage on the first power line S1 is input to the anode 112 of the light emitting device L through the driving transistor Td. A high level signal is input to the second scanning signal line G2, and the first transistor T1 is turned on. An ac voltage is input to the second power line S2, the voltage of the ac voltage in the writing period T1 is a negative voltage, and the ac voltage on the second power line S2 is input to the anode 112 of the light emitting device L through the first transistor T1.
Since a dc voltage is input to the first power line S1 and an ac voltage is input to the second power line S2, the voltage of the anode 112 of the light emitting device L is a dc voltage when the first power line S1 and the first subpixel circuit 101 are not disconnected. Referring to fig. 6, V1= V2= 8230 = Vn-2= Vn-1= Vn = 8230 = Vn + m = Vn + m +1= Vn + m +2 vs1. When the first power line S1 is disconnected from the first sub-pixel circuit 101, the dc voltage of the first power line S1 cannot be written into the anode 112 of the light emitting device L, and the voltage of the anode 112 of the light emitting device L in the sub-pixel 011 is the ac voltage input by the second power line S2 in the writing phase t1, so that when the first sub-pixel circuit 101 is disconnected from the first power line S1 in the nth sub-pixel, V1= V2= 8230, = Vn-2= Vn-1 ≠ vs1 ≠ Vn = VS2 ≠ Vn + m = 8230, vn + m +1= Vn + m 2= vs1. Since the dc voltage is a positive voltage and the ac voltage is a negative voltage in the writing period t1, the voltage of the anode 112 of the light emitting device L in the sub-pixel 011 where the first power line S1 is disconnected from the first sub-pixel circuit 101 and the voltage of the anode 112 of the light emitting device L in the sub-pixel 011 where the first power line S1 is not disconnected from the first sub-pixel circuit 101 generate a large voltage jump.
In the sensing period T2, a low level signal is input to the first scanning signal line G1, the second transistor T2 is turned off, a low level signal is input to the second scanning signal line G2, the first transistor T1 is turned off, and the storage capacitor Cst maintains the voltage of the anode 112 of the light emitting device L in the charging period T1. By detecting the voltage of the anode 112 of the light emitting device L in each sub-pixel 011, it can be determined whether the first power line S1 of the sub-pixel 011 is disconnected from the first sub-pixel circuit 101, i.e. whether the sub-pixel 011 is abnormal. If the absolute value of the difference between the voltage of the anode 112 and the dc voltage is greater than the predetermined voltage value, the voltage of the anode 112 is the ac voltage of the second power line S2, and thus it can be determined that the first sub-pixel circuit 101 in the sub-pixel 011 is disconnected from the first power line S1. If the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is less than or equal to the predetermined voltage value, the voltage value of the anode 112 is the dc voltage inputted to the subpixel 011 from the first power line S1, and thus it can be determined that the first subpixel circuit 101 and the first power line S1 in the subpixel 011 are not disconnected.
As shown in fig. 10, the detection system includes a detection device 30 and an array substrate 13, where the detection device 30 is electrically connected to the array substrate 13; the detection device 30 includes: a memory 301 and a processor 302; the memory 301 is configured to store instructions; the processor 302 is electrically connected to the memory 301, and when the instructions are executed by the processor 302, the processor 302 executes the method for detecting the array substrate 13.
Here, the inspection device 30 is not limited to be able to inspect the array substrate 13 according to the inspection method of the array substrate 13 described above. In some embodiments, the detection device 30 is an AT (Array Test) device.
In some embodiments, as shown in fig. 11, the detection device 30 further comprises a display screen 303; the display screen 303 includes a plurality of regions, each region corresponding to one sub-pixel 011 of the array substrate 13; if the absolute value of the difference between the voltage value of the anode 112 and the direct-current voltage in the subpixel 011 of the array substrate 13 is greater than the preset voltage value, displaying a first color in a region corresponding to the subpixel 011 in the display screen 303; if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage in the sub-pixel 011 of the array substrate 13 is less than or equal to the predetermined voltage value, the region corresponding to the sub-pixel 011 in the display screen 303 displays the second color.
Here, in some embodiments, a Voltage Image Optical System (VIOS) includes a display panel, and the Voltage Image Optical System may control a region corresponding to the sub-pixel 011 in the display panel to display a first color or a second color according to a relationship between an absolute value of a difference between a Voltage value of the anode 112 and a dc Voltage and a preset Voltage value.
In addition, the first color and the second color are not limited, and the first color and the second color are different. For example, the first color is red and the second color is green.
It should be understood that if the region of the display screen corresponding to the sub-pixel 011 of the array substrate 13 displays the first color, the first power line S1 is disconnected from the first sub-pixel circuit 101 in the sub-pixel 011. If the region of the display panel corresponding to the sub-pixel 011 of the array substrate 13 displays the second color, the first power line S1 is not disconnected from the first sub-pixel circuit 101 in the sub-pixel 011.
In the embodiment of the present invention, since the detection device 30 includes the display screen 303, if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is greater than the preset voltage value, a region corresponding to the subpixel 011 in the display screen displays a first color; if the absolute value of the difference between the voltage value of the anode 112 and the dc voltage is less than or equal to the predetermined voltage value, the region corresponding to the sub-pixel 011 in the display screen displays the second color, so that whether the first sub-pixel circuit 101 of each sub-pixel 011 on the array substrate 13 is disconnected from the first power line S1 and the position of the sub-pixel 011 with the broken first power line S1 can be visually and quickly determined according to the color displayed on the display screen, so as to repair the first power line S1.
The above description is only for the specific embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.
Claims (10)
1. The detection method of the array substrate is characterized in that the array substrate comprises a plurality of sub-pixels, each sub-pixel comprises a pixel circuit, and the pixel circuit comprises a first sub-pixel circuit, a second sub-pixel circuit and a light-emitting device; the first sub-pixel circuit is electrically connected with a first power line, a first scanning signal line, a data signal line, and an anode of the light emitting device; the second sub-pixel circuit is electrically connected with a second power line, a second scanning signal line and an anode of the light-emitting device;
the detection method of the array substrate comprises the following steps:
in a writing phase, inputting a direct-current voltage to the first power line, inputting a gate signal to the first scanning signal line, and turning on the first sub-pixel circuit to input the direct-current voltage of the first power line to an anode of the light emitting device; inputting an alternating voltage to the second power line, inputting a gate signal to the second scanning signal line, and turning on the second sub-pixel circuit so that the alternating voltage of the second power line is input to an anode of the light emitting device;
in a detection stage, detecting a voltage value of the anode of the light emitting device in the sub-pixel, and determining whether an absolute value of a difference between the voltage value of the anode and the direct-current voltage is greater than a preset voltage value, wherein if the absolute value of the difference between the voltage value of the anode and the direct-current voltage is greater than the preset voltage value, the first sub-pixel circuit in the sub-pixel is disconnected from the first power line;
wherein an absolute value of a difference between voltages of the direct current voltage and the alternating current voltage in the writing phase is greater than the preset voltage value.
2. The method of claim 1, wherein the DC voltage is a positive voltage, and the AC voltage is a negative voltage during the writing phase;
or the direct current voltage is a negative voltage, and the voltage of the alternating current voltage in the writing stage is a positive voltage.
3. The method for inspecting the array substrate according to claim 1, wherein a reset stage is provided before the writing stage, and the method for inspecting the array substrate further comprises:
in the reset stage, inputting a ground voltage to the first power line, the second power line and the data signal line; inputting a gate signal to the first scan signal line to turn on the first sub-pixel circuit, the ground voltage of the data signal line being input to the anode of the light emitting device; a gate signal is input to the second scan signal line to turn on the second subpixel circuit, and a ground voltage of the second power line is input to an anode of the light emitting device.
4. The method for inspecting an array substrate of claim 3,
after the reset phase, a charging phase is set before the writing phase, and the method for detecting the array substrate further comprises:
inputting a gate signal to the first scan signal line to turn off the first sub-pixel circuit in the charging stage; inputting a gate signal to the second scan signal line to turn off the second subpixel circuit; a DC voltage is input to the first power line, and an AC voltage is input to the second power line.
5. The method for inspecting the array substrate of claim 1, wherein the first sub-pixel circuit comprises a driving sub-circuit and a writing sub-circuit;
the driving sub-circuit is electrically connected with the first power line, the writing sub-circuit and the anode of the light-emitting device and is used for driving the light-emitting device to emit light;
the write-in sub-circuit is electrically connected to the data signal line and the first scanning signal line, and is configured to write a voltage of the data signal line into the driving sub-circuit under control of the first scanning signal line.
6. The array substrate detection method according to claim 5, wherein the driving sub-circuit comprises a driving transistor and a storage capacitor;
the grid electrode of the driving transistor is electrically connected with the writing sub-circuit, the first pole of the driving transistor is electrically connected with the first power line, and the second pole of the driving transistor is electrically connected with the anode of the light-emitting device;
one end of the storage capacitor is electrically connected with the grid electrode of the driving transistor, and the other end of the storage capacitor is electrically connected with the anode of the light-emitting device.
7. The method as claimed in claim 6, wherein before the detecting the voltage value of the anode of the light emitting device in the sub-pixel, the method further comprises:
inputting a gate signal to the first scan signal line to turn off the first sub-pixel circuit in the detection stage; and inputting a gate signal to the second scanning signal line to turn off the second sub-pixel circuit.
8. The method for detecting the array substrate of claim 1, wherein the second sub-pixel circuit comprises a first transistor, a gate of the first transistor is electrically connected with a second scanning signal line, a first pole of the first transistor is electrically connected with the second power line, and a second pole of the second transistor is electrically connected with an anode of the light emitting device.
9. The detection system is characterized by comprising detection equipment and an array substrate, wherein the detection equipment is electrically connected with the array substrate;
the detection apparatus includes: a memory and a processor; the memory is configured to store instructions; the processor electrically connected to the memory, wherein the instructions, when executed by the processor, cause the processor to perform the method of inspecting the array substrate according to any one of claims 1 to 8.
10. The detection system of claim 9, wherein the detection device further comprises a display screen;
the display screen comprises a plurality of areas, and each area corresponds to one sub-pixel of the array substrate; if the absolute value of the difference value between the voltage value of the anode in the sub-pixel of the array substrate and the direct-current voltage is larger than a preset voltage value, displaying a first color in an area, corresponding to the sub-pixel, in the display screen; and if the absolute value of the difference value between the voltage value of the anode in the sub-pixel of the array substrate and the direct current voltage is smaller than or equal to a preset voltage value, displaying a second color in the area, corresponding to the sub-pixel, in the display screen.
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