CN110784563A - DALI self-addressing packet addressing equipment - Google Patents
DALI self-addressing packet addressing equipment Download PDFInfo
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- CN110784563A CN110784563A CN201911055177.0A CN201911055177A CN110784563A CN 110784563 A CN110784563 A CN 110784563A CN 201911055177 A CN201911055177 A CN 201911055177A CN 110784563 A CN110784563 A CN 110784563A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2101/00—Indexing scheme associated with group H04L61/00
- H04L2101/60—Types of network addresses
- H04L2101/672—Short addresses
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/10—Current supply arrangements
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L61/00—Network arrangements, protocols or services for addressing or naming
- H04L61/50—Address allocation
- H04L61/5038—Address allocation for local use, e.g. in LAN or USB networks, or in a controller area network [CAN]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L61/00—Network arrangements, protocols or services for addressing or naming
- H04L61/50—Address allocation
- H04L61/5069—Address allocation for group communication, multicast communication or broadcast communication
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L61/00—Network arrangements, protocols or services for addressing or naming
- H04L61/50—Address allocation
- H04L61/5092—Address allocation by self-assignment, e.g. picking addresses at random and testing if they are already in use
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L2012/40208—Bus networks characterized by the use of a particular bus standard
Abstract
The invention discloses DALI self-addressing packet addressing equipment which comprises a DALI bus power supply, a plurality of addressing modules and a DALI bus, wherein the addressing modules are respectively marked as Zone #1-Zone # N, and the Zone #1-Zone # N are connected to the DALI power supply bus by adopting the DALI bus. The DALI self-addressing packet addressing device has the following advantages that: 1: on the premise of basically meeting the DALI standard, the singlechip logic processing circuit can read the numerical value in the rotary encoder, can determine the group affiliation and set the short address according to the specification; 2: the addressing equipment can self-check the power supply condition of the external bus power supply, and can self-supply power to realize independent system control when the external bus power supply is abnormal. 3: the rotation coding logic relation is simple to realize the signal conversion from DALI to DALI, and the control is reliable.
Description
Technical Field
The invention relates to the technical field of intelligent lighting systems, in particular to DALI (digital addressable lighting interface) self-addressing packet addressing equipment.
Background
An intelligent Lighting system based on a Digital Addressable Lighting Interface (DALI) protocol is characterized in that DALI is used as a bus, a broadcasting, grouping or independent address addressing mode is adopted to control lamps, the control mode of the lamps comprises light scene calling, dimming and color temperature control, scenes can be configured in advance before construction, and light configuration parameters can be modified in the use process after installation. In addition, the DALI protocol has a data bidirectional transmission function, and can determine the working state of the lighting equipment through the query instruction, so that the effects of personalized and efficient management of the lighting equipment, energy conservation and emission reduction are achieved.
The controllability and lighting management of DALI lighting control systems have many advantages, and indeed there are certain obstacles to implementation. The method has the advantages that a complete DALI control system is realized, electricians are required to install the system according to the wiring of drawings, and professional technicians are required to carry out a series of complex configuration work such as system addressing, grouping, scene editing and the like; also, maintenance at a later date still must be handled by a skilled technician. Based on the above problems, a DALI self-addressing packet addressing device is proposed.
Disclosure of Invention
The invention aims to provide DALI self-addressing packet addressing equipment, which has the advantages that a singlechip logic processing circuit can directly read numerical values in a rotary encoder A and a rotary encoder B, the power supply condition of an external bus can be self-detected, independent system control can be realized in case of abnormity, signal conversion is reliably realized, and the problems in the prior art are solved.
In order to achieve the purpose, the invention provides the following technical scheme:
a DALI self-addressing packet addressing device comprises a DALI bus power supply and a plurality of addressing modules and a DALI bus, wherein the addressing modules are respectively marked as Zone #1-Zone # N, the Zone #1-Zone # N are connected to a DALI bus power supply by adopting a DALI bus, each addressing module comprises an automatic addressing marshalling DALI driver, the automatic addressing marshalling DALI driver is connected with the DALI power supply bus by adopting a two-core lead, the output end of the automatic addressing marshalling DALI driver is connected with a CH1-DALI bus, a CH2-DALI bus, a CH3-DALI bus and a CH4-DALI bus, the output end of the CH1-DALI bus is externally connected with a DALI driver A and a DALI driver B, the DALI driver A is connected to a loop where the DALI driver B is located, the output end of the CH2-DALI bus is externally connected with a DALI driver C and a DALI driver D, the DALI driver C is connected to the loop where the DALI driver D is located, the output end of the CH3-DALI bus is externally connected with a DALI driver E and a DALI driver F, the DALI driver E is connected to the loop where the DALI driver F is located, the output end of the CH4-DALI bus is externally connected with a DALI driver G and a DALI driver H, and the DALI driver G is connected to the loop where the DALI driver H is located; the DALI signal circuit on the external bus is connected to the addresser, the addresser comprises a double-throw relay, a DALI signal transceiving interface circuit, an internal bus power supply circuit, a single chip logic processing circuit, a DALI signal transmitting interface circuit, a rotary encoder A and a rotary encoder B, the DALI signal circuit on the external bus is connected with the double-throw relay, the double-throw relay is connected with the DALI signal transceiving interface circuit, and the connecting end of the double-throw relay and the DALI signal transceiving interface circuit is externally connected with a control panel circuit; the DALI signal transmitting and receiving interface circuit is connected with the single chip microcomputer logic processing circuit, the rotary encoder A and the rotary encoder B are connected to the single chip microcomputer logic processing circuit, the DALI signal transmitting interface circuit is connected with the single chip microcomputer logic processing circuit, and the DALI signal transmitting interface circuit is externally connected with the 4-channel DALI signal control circuit; the port C of the double-throw relay is connected to the internal bus power supply circuit, the output end of the internal bus power supply circuit is connected with the DALI signal sending interface circuit for power supply, and the input end of the internal bus power supply circuit is externally connected with the mains supply circuit.
Preferably, the single chip microcomputer logic processing circuit is used for reading numerical values in the rotary encoder A and the rotary encoder B.
Preferably, the rotary encoder a edits the group address information, and the rotary encoder B edits the short address information.
Preferably, the default state of the double-throw relay is that A and B are conducted; the single chip microcomputer logic processing circuit automatically detects whether the supply of a DALI signal loop on the external bus is normal through the DALI signal transceiving interface circuit, and if not, the single chip microcomputer logic processing circuit is switched to be conducted between A and C.
Compared with the prior art, the invention has the following beneficial effects:
the DALI self-addressing packet addressing device has the following advantages that:
1: on the premise of basically meeting the DALI standard, the singlechip logic processing circuit can read the numerical values in the rotary encoder (rotary encoder A: group address information, rotary encoder B: short address information), can determine the group affiliation and set the short address according to the specification;
2: the addressing equipment can self-check the power supply condition of the external bus power supply, and can self-supply power to realize independent system control when the external bus power supply is abnormal.
3: the rotation coding logic relation is simple to realize the signal conversion from DALI to DALI, and the control is reliable.
Drawings
FIG. 1 is a flow chart of addressing of the present invention;
fig. 2 is an overall circuit block diagram of the present invention.
In the figure: 1. a DALI bus power supply; 2. an addressing module; 21. automatically addressing a marshalling DALI driver; 22. a DALI driver A; 23. a DALI driver B; 24. a DALI driver C; 25. a DALI driver D; 26. a DALI driver E; 27. a DALI driver F; 28. a DALI driver G; 29. a DALI driver H; 3. a DALI bus; 4. a DALI signal loop on the external bus; 5. a double throw relay; 6. a DALI signal transceiving interface circuit; 7. an internal bus power supply circuit; 8. a control panel loop; 9. a singlechip logic processing circuit; 10. a mains supply circuit; 11. a DALI signaling interface circuit; 12. a 4-channel DALI signal control circuit; 13. a rotary encoder A; 14. and a rotary encoder B.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1-2, a DALI self-addressing group addressing device includes a DALI bus power supply 1, a plurality of addressing modules 2 and a plurality of DALI buses 3, where the addressing modules 2 are respectively denoted as Zone #1-Zone # N, the Zone #1-Zone # N are all connected to the DALI bus power supply 1 by the DALI bus 3, each addressing module 2 includes an automatic addressing group DALI driver 21, the automatic addressing group DALI driver 21 is connected to the DALI power supply bus 1 by a two-core wire, the output end of the automatic addressing group DALI driver 21 is connected to a CH1-DALI bus, a CH2-DALI bus, a CH3-DALI bus and a CH4-DALI bus, the output end of the CH1-DALI bus is externally connected to a DALI driver a22 and a DALI driver B23, and the DALI driver a22 is connected to a loop where the DALI driver B23 is located; the output end of the CH2-DALI bus is externally connected with a DALI driver C24 and a DALI driver D25, the DALI driver C24 is connected to a loop where the DALI driver D25 is located, the output end of the CH3-DALI bus is externally connected with a DALI driver E26 and a DALI driver F27, the DALI driver E26 is connected to a loop where the DALI driver F27 is located, the output end of the CH4-DALI bus is externally connected with a DALI driver G28 and a DALI driver H29, and the DALI driver G28 is connected to a loop where the DALI driver H29 is located; the DALI signal loop 4 on the external bus is connected to an addresser, the addresser comprises a double-throw relay 5, a DALI signal transceiving interface circuit 6, an internal bus power supply circuit 7, a singlechip logic processing circuit 9, a DALI signal transmitting interface circuit 11, a rotary encoder A13 and a rotary encoder B14, the DALI signal loop 4 on the external bus is connected with the double-throw relay 5, the double-throw relay 5 is connected with the DALI signal transceiving interface circuit 6, and the default state of the double-throw relay 5 is that A and B are conducted; the single chip microcomputer logic processing circuit 9 automatically detects whether the supply of the DALI signal loop 4 on the external bus is normal through the DALI signal transceiving interface circuit 6, if not, the connection is switched to A and C for conduction, and the connection end of the double-throw relay 5 and the DALI signal transceiving interface circuit 6 is externally connected with the control panel loop 8; the DALI signal transceiving interface circuit 6 is connected with the single chip microcomputer logic processing circuit 9, the rotary encoder A13 and the rotary encoder B14 are connected to the single chip microcomputer logic processing circuit 9, the rotary encoder A13 edits group address information, the rotary encoder B14 edits short address information, the single chip microcomputer logic processing circuit 9 is used for reading numerical values in the rotary encoder A13 and the rotary encoder B14, so that field engineers do not need to address and group on site, group affiliation can be determined and the short addresses can be set according to the logical relationship by reading the numerical values in the rotary encoder A13 and the rotary encoder B14, the DALI signal transmitting interface circuit 11 is connected with the single chip microcomputer logic processing circuit 9, and the DALI signal transmitting interface circuit 11 is externally connected with the 4-channel DALI signal control circuit 12; the port C of the double-throw relay 5 is connected to the internal bus power supply circuit 7, the output end of the internal bus power supply circuit 7 is connected with the DALI signal sending interface circuit 11 for power supply, the input end of the internal bus power supply circuit 7 is externally connected with the commercial power supply circuit 10, when the external bus power supply is abnormal, the internal bus power supply can be switched to the internal bus power supply for power supply to realize independent system control, and the reliability of the system bus when the system bus is abnormal is improved.
According to the DALI self-addressing packet addressing equipment, the default state of a double-throw relay 5 is that A and B are conducted, a single-chip microcomputer logic processing circuit 9 automatically detects whether the supply of a DALI signal loop 4 on an external bus is normal through a DALI signal transceiving interface circuit 6, if the supply is abnormal, the connection is switched to the A and C, when the single-chip microcomputer logic processing circuit 9 detects that the supply of the DALI signal loop 4 on the external bus is abnormal through the DALI signal transceiving interface circuit 6, the DALI signal loop 4 on the external bus is disconnected, an internal bus power supply circuit 7 is connected to supply power to a control panel loop 8, namely, the A and C of the double-throw relay 5 are connected; therefore, the reliability of the control of the back end of the DALI self-addressing packet addressing equipment is greatly improved;
1) when the DALI signal transceiving interface circuit 6 receives a DALI control signal of the control panel circuit 8, the single chip logic processing circuit 9 converts the DALI control signal into a corresponding DALI signal according to the logic processing relationship, and outputs the DALI signal to the corresponding output 4-channel DALI signal control circuit 12 through the DALI signal transmitting interface circuit 11.
The detailed control logic relationship is as follows:
A. when the < short address X > + < control instruction > command is received, the dialing on rotary encoder a13 is equal (X/4), i.e., an integer of the QUOTIENT of X/4, the auto addressing marshalling DALI driver 21 will respond, its DALI signaling interface circuit 11 will output the command from MOD (X/4) +1, i.e., the remainder +1 port of X/4, and the DALI command will become: < broadcast > + < control instruction >;
B. when the < group address G > + < control instruction > command is received, the auto addressing group DALI driver 21, dialed G on rotary encoder a13, will respond with its DALI signaling interface circuit 11 outputting the command from 4 ports, and the DALI command will become: < broadcast > + < control instruction >;
C. when the < broadcast > + < control instruction > command is received, all drivers will respond, all drivers' corresponding DALI signaling interface circuits 11 will output commands from 4 ports, and the DALI command will become: < broadcast > + < control instruction >.
The method has the following advantages: on the premise that 1 basically meets DALI standard, the singlechip logic processing circuit 9 can read the numerical value in the rotary encoder (rotary encoder A13: group address information, rotary encoder B14: short address information), can determine the group attribution and set the short address according to the regulation;
2 addressing equipment can self-check the power supply condition of the external bus power supply, and can self-supply power to realize independent system control when the external bus power supply is abnormal.
The 3-rotation coding logic relationship simply realizes the signal conversion from DALI to DALI, and the control is reliable.
To sum up: the DALI self-addressing packet addressing device has the following advantages that:
1: on the premise of basically meeting the DALI standard, the singlechip logic processing circuit 9 can read the numerical values in the rotary encoder (rotary encoder A13: group address information, rotary encoder B14: short address information), can determine the group attribution and set the short address according to the specification for output;
2: the addressing equipment can self-check the power supply condition of the external bus power supply, and can self-supply power to realize independent system control when the external bus power supply is abnormal.
3: the rotation coding logic relation is simple to realize the signal conversion from DALI to DALI, and the control is reliable.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (4)
1. A DALI self-addressing packet addressing device comprises a DALI bus power supply (1), a plurality of addressing modules (2) and a plurality of DALI buses (3), wherein the addressing modules (2) are respectively marked as Zone #1-Zone # N, the Zone #1-Zone # N are connected to the DALI bus power supply (1) through the DALI buses (3), each addressing module (2) comprises an automatic addressing DALI driver (21), the automatic addressing marshalling DALI drivers (21) are connected with the DALI power supply buses (1) through double-core wires, the output end of the automatic addressing marshalling DALI driver (21) is connected with a CH1-DALI bus, the DALI driver comprises a CH2-DALI bus, a CH3-DALI bus and a CH4-DALI bus, wherein the output end of the CH1-DALI bus is externally connected with a DALI driver A (22) and a DALI driver B (23), and the DALI driver A (22) is connected to a loop where the DALI driver B (23) is located; the output end of the CH2-DALI bus is externally connected with a DALI driver C (24) and a DALI driver D (25), the DALI driver C (24) is connected to the loop where the DALI driver D (25) is located, the output end of the CH3-DALI bus is externally connected with a DALI driver E (26) and a DALI driver F (27), the DALI driver E (26) is connected to the loop where the DALI driver F (27) is located, the output end of the CH4-DALI bus is externally connected with a DALI driver G (28) and a DALI driver H (29), and the DALI driver G (28) is connected to the loop where the DALI driver H (29) is located; the DALI control system comprises an external bus, a DALI signal loop (4) on the external bus, an addressor, a rotary encoder A (13), a rotary encoder B (14), a double-throw relay (5), a DALI signal transceiving interface circuit (6), an internal bus power supply circuit (7), a singlechip logic processing circuit (9), a DALI signal sending interface circuit (11), a DALI signal loop (4) on the external bus, a double-throw relay (5), a DALI signal transceiving interface circuit (6), and a control panel loop (8) externally connected with the connection end of the double-throw relay (5) and the DALI signal transceiving interface circuit (6); the DALI signal transmitting and receiving interface circuit (6) is connected with the single chip microcomputer logic processing circuit (9), the rotary encoder A (13) and the rotary encoder B (14) are connected to the single chip microcomputer logic processing circuit (9), the DALI signal transmitting interface circuit (11) is connected with the single chip microcomputer logic processing circuit (9), and the DALI signal transmitting interface circuit (11) is externally connected with the 4-channel DALI signal control circuit (12); the port C of the double-throw relay (5) is connected to the internal bus power supply circuit (7), the output end of the internal bus power supply circuit (7) is connected with the DALI signal sending interface circuit (11) for power supply, and the input end of the internal bus power supply circuit (7) is externally connected with the mains supply power supply circuit (10).
2. A DALI self-addressing packet addressing device according to claim 1, characterized in that: and the singlechip logic processing circuit (9) is used for reading numerical values in the rotary encoder A (13) and the rotary encoder B (14).
3. A DALI self-addressing packet addressing device according to claim 1, characterized in that: the rotary encoder A (13) edits group address information, and the rotary encoder B (14) edits short address information.
4. A DALI self-addressing packet addressing device according to claim 1, characterized in that: the default state of the double-throw relay (5) is that A and B are conducted; the single chip microcomputer logic processing circuit (9) automatically detects whether the supply of the DALI signal loop (4) on the external bus is normal through the DALI signal transceiving interface circuit (6), and if the supply of the DALI signal loop is not normal, the single chip microcomputer logic processing circuit is switched to be conducted between A and C.
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