CN110769180B - Video signal false lock identification method and device, electronic equipment and storage medium - Google Patents
Video signal false lock identification method and device, electronic equipment and storage medium Download PDFInfo
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Abstract
The application provides a method and a device for identifying video signal mis-locking, electronic equipment and a storage medium, wherein the method comprises the following steps: if the format value of the received video signal is shared by target video signals of multiple formats and the received video signal is locked when the register is configured according to the first target format, detecting whether the color carrier of the received video signal is locked; if so, determining the format of the received video signal as the first target format; otherwise, it is determined that the received video signal is mis-locked. The method can improve the accuracy of video signal system identification.
Description
Technical Field
The present disclosure relates to video monitoring technologies, and in particular, to a method and an apparatus for identifying a video signal false lock, an electronic device, and a storage medium.
Background
The traditional Video monitoring industry mainly comprises products such as Video acquisition equipment (such as an analog camera) and Video storage equipment (such as a Digital Video Recorder (DVR)), and external scenes are acquired by the Video acquisition equipment and then transmitted to the Video storage equipment for storage, Video analysis and other processing.
The video signal transmission between the video acquisition device and the video storage device comprises two technologies of modulation output and modulation input. Since there are various types of video acquisition devices and different formats of corresponding video signals, in order to ensure compatible access of video signals, a video storage device needs to be able to accurately identify the format of a received video signal.
Disclosure of Invention
In view of the above, the present application provides a method, an apparatus, an electronic device and a storage medium for identifying a video signal mis-lock.
Specifically, the method is realized through the following technical scheme:
according to a first aspect of the embodiments of the present application, there is provided a method for identifying a video signal mis-lock, including:
if the format value of the received video signal is shared by target video signals of multiple formats and the received video signal is locked when the register is configured according to the first target format, detecting whether the color carrier of the received video signal is locked; the first target standard is a standard of a first target video signal in the plurality of target video signals;
if so, determining the format of the received video signal as the first target format;
otherwise, it is determined that the received video signal is mis-locked.
According to a second aspect of the embodiments of the present application, there is provided a video signal false lock recognition apparatus, including:
a reading unit for reading the format value of the received video signal;
the configuration unit is used for configuring a register according to a first target system if the system value of the received video signal is shared by target video signals of multiple systems; the first target standard is a standard of a first target video signal in the plurality of target video signals;
a detection unit for detecting whether the received video signal is locked;
the detection unit is further configured to detect whether a color carrier of the received video signal is locked if the received video signal is locked;
a determining unit, configured to determine, if a color carrier of the received video signal is locked, that a format of the received video signal is the first target format;
the determining unit is further configured to determine that the received video signal is mis-locked if the color carrier of the received video signal is not locked.
According to a third aspect of the embodiments of the present application, an electronic device is provided, which includes a processor, a communication interface, a memory, and a communication bus, where the processor, the communication interface, and the memory complete communication with each other through the communication bus;
a memory for storing a computer program;
and the processor is used for realizing the video signal false locking identification method when executing the program stored in the memory.
According to a fourth aspect of the embodiments of the present application, there is provided a computer-readable storage medium, wherein a computer program is stored in the computer-readable storage medium, and when being executed by a processor, the computer program implements the above-mentioned method for identifying a video signal mis-lock.
According to the video signal false locking identification method, if the format value of the received video signal is shared by target video signals of multiple formats, and the received video signal is locked when the register is configured according to the first target format, whether the color carrier of the received video signal is locked or not is detected; if so, determining the format of the received video signal as the first target format; otherwise, the received video signal is determined to be wrongly locked, so that the identification of the video signal wrongly locked in the video signal system identification process is realized, and the accuracy of the video signal system identification is improved.
Drawings
Fig. 1 is a flow chart illustrating a method for identifying a video signal false lock according to an exemplary embodiment of the present application;
FIG. 2 is a schematic diagram of a one frame 4M12.5 video signal and a two frame 720P25 video signal shown in an exemplary embodiment of the present application;
FIG. 3 is a flow chart of a method for identifying video signal false locks according to yet another exemplary embodiment of the present application;
fig. 4 is a schematic structural diagram of a video signal false lock identification device according to an exemplary embodiment of the present application;
fig. 5 is a schematic structural diagram of a video signal false lock recognition apparatus according to another exemplary embodiment of the present application;
fig. 6 is a schematic structural diagram of a video signal false lock recognition device according to another exemplary embodiment of the present application;
fig. 7 is a schematic diagram of a hardware structure of an electronic device according to an exemplary embodiment of the present application.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
In order to make the technical solutions provided in the embodiments of the present application better understood and make the above objects, features and advantages of the embodiments of the present application more comprehensible, the technical solutions in the embodiments of the present application are described in further detail below with reference to the accompanying drawings.
Referring to fig. 1, a flow chart of a video signal false-lock identification method provided in an embodiment of the present application is schematically illustrated, where the video signal false-lock identification method can be applied to an AD chip in a video processing device having an AD (Analog-to-Digital) chip, such as an AD chip of a DVR (hereinafter, the video processing device is referred to as a DVR for example), and as shown in fig. 1, the method can include the following steps:
it should be noted that, in the embodiments of the present application, unless otherwise specified, all of the mentioned video signals are analog video signals, and the description thereof will not be repeated in the embodiments of the present application.
Step S100, if the format value of the received video signal is shared by target video signals of multiple formats and the register is configured according to the first target format, the received video signal is locked, and whether the color carrier of the received video signal is locked or not is detected. If yes, go to step S110; otherwise, go to step S120.
In this embodiment of the present application, the first target format does not refer to a fixed format, but may refer to a format of any one of the multiple target video signals (referred to as a first target video signal herein), and this embodiment of the present application will not be repeated in the following.
In the embodiment of the present application, when receiving a video signal, an AD chip configures a value of system information (referred to as a system value herein for short) of a register according to the system information in the video signal.
For example, the AD chip can record system information of a received video signal in bits 0 to 2 of a 0x3 register.
The format of the video signal may include, but is not limited to: NTSC (National Television Standards Committee), PAL (Phase alternation Line), 720P25/30, 720P50/60, 1080P25/30, 1080P HALF25/30, 3M18, 4M12.5/15, 4M25/30, 4M HALF25/30, 5M12, 5M20, 5M HALF 20, 8M12.5/15, 8M HALF 12.5/15, etc.; the video signals of all systems have corresponding system values.
Correspondingly, when the format of the video signal needs to be identified, the AD chip can determine the format value of the received video signal by reading the format value of the register.
For example, the AD chip can read the values of bits 0 to bit2 of the 0x3 register.
In the embodiment of the present application, it is considered that in an actual application scenario, there may exist a situation that format values of video signals of multiple formats are the same, that is, video signals of multiple formats share the same format value, and therefore, the format of the video signal may not be accurately identified only according to the format value.
For example, assuming that the format value is 0x6, the format of the video signal may be NTSC or PAL; assuming that the format value is 0x7, the format of the video signal may be 3M18, 5M12, or 5M 20.
Correspondingly, when the AD chip reads the standard value of the register, the AD chip can judge whether the standard value is shared by target video signals of multiple standards, and when the standard value is determined to be shared by the target video signals of multiple standards, the AD chip can respectively configure the register according to the standard of each target video signal and detect whether the received video signal is locked.
For example, the AD chip may select the format of each target video signal in a polling manner, configure a register according to the format of the selected target video signal, and detect whether the received video signal is locked.
For specific implementation of the AD chip configuring the register according to the selected format, reference may be made to related descriptions in the related art, and details of the embodiment of the present application are not described herein.
For example, assuming that the format values read by the AD chip are shared by target video signals of formats 1 to 3 (assuming that the target video signals are 1 to 3 respectively), the AD chip may select format 1 first, configure a register according to format 1, and detect whether the received video signal is locked, in the order from the front to the back of formats 1 to 3; if the video signal is not locked, selecting the system 2, configuring a register according to the system 2, and detecting whether the received video signal is locked; and if the video signal is not locked, selecting the system 3, configuring a register according to the system 3, and detecting whether the received video signal is locked.
In the embodiment of the present application, in practical application, when the AD chip configures the registers according to the system of each target video signal respectively in the above manner, and detects whether the received video signal is locked, a situation that the video signal is locked by mistake may occur.
For example, taking the standards 4M12.5 and 720P25 as examples, the two standards share the same standard value, and the video signals of the two standards have the same line length.
If the signal currently received by the AD chip is 4M12.5, but the AD chip configures the register according to the system 720P25, and then detects that both the HLOCK and the VLOCK of the received video signal are locked, at this time, the AD chip considers that the system of the received signal is 720P25, and false locking occurs, and further, in the subsequent flow, video signal processing is abnormal due to a video signal system identification error, so that when the video signal system identification is performed according to the above manner, it is necessary to determine whether there is a video signal false locking condition.
In the embodiment of the present application, it is considered that when a video signal is locked incorrectly, a color carrier of the video signal cannot be locked normally (i.e., the slow cannot be locked), and therefore, whether the video signal is locked incorrectly can be determined according to whether the color carrier is locked.
Accordingly, when the AD chip configures the register according to the first target system and detects that the received video signal is locked, the AD chip may detect whether the color carrier of the received video signal is locked, so as to determine whether the received video signal is mistakenly locked.
Step S110, determining the format of the received video signal as a first target format.
And step S120, determining that the received video signal is in false lock.
In the embodiment of the application, when the AD chip detects that the color carrier of the received video signal is locked, the system of the received video signal can be determined to be a first target system; when the AD chip detects that the color carrier of the received video signal is not locked, the received video signal can be determined to be locked wrongly.
It should be noted that, in this embodiment of the application, when the AD chip determines that the received video signal is incorrectly locked, the AD chip may perform format identification on the received video signal again according to the above-described manner, or identify the format of the received video signal according to other strategies, and specific implementation thereof is not described herein again.
Further, in the embodiment of the present application, considering that the SLOCK cannot be locked immediately due to the color carrier attenuation when a signal is accessed through a long line, the SLOCK needs to be locked after the gain is automatically or manually adjusted to compensate for the attenuation. Therefore, before the fading compensation is completed, it cannot be determined whether the SLOCK is not locked because of the video signal mislocking or not because the SLOCK is not locked because of a long line.
Accordingly, in one embodiment of the present application, if the color carrier of the received video signal is not locked, before determining that the received video signal is mis-locked, the method may further include:
setting the range of gain adjustment to be maximum, and adjusting the gain to be maximum;
detecting whether a color carrier of the received video signal is locked;
and if the color carrier of the received video signal is not locked, determining to execute the step of determining that the video signal is locked by mistake.
In this embodiment, when the AD chip determines that the color carrier of the received video signal is not locked, the AD chip may set the range of gain adjustment to maximum and adjust the gain to maximum to avoid the SLOCK being unable to lock due to the color carrier fading, and detect whether the color carrier of the received video signal is locked.
If the color carrier of the received video signal is not locked, the AD chip can determine that the received video signal is locked by mistake; if the color carrier of the received video signal is locked, the AD chip may determine that the received video signal is locked, and determine the system of the received video signal according to the register configuration.
Further, in the embodiment of the present application, considering that frame rates of video signals of a plurality of different systems sharing the same system value may be different, that is, durations of one frame of the video signals of the plurality of different systems may be different, when a duration of one frame of one video signal of the video signals of the plurality of different systems is even times of a duration of one frame of another video signal, for the duration of one frame of the video signal, the another video signal may have an even frame video signal, a middle line and a certain number of lines above and below the middle line of one frame of the video signal are image information areas for the video signal, and are blanking areas for the another video signal, at this time, the different systems may be distinguished by using a difference between voltage values of the image information areas and the blanking areas.
Accordingly, in another embodiment of the present application, if the color carrier of the received video signal is not locked, before determining that the received video signal is mistakenly locked, the method may further include:
if the duration of a frame of a first target video signal is even times of the duration of a frame of other target video signals, reading the voltage value of a target line of the frame of the first target video signal; the target line is any one line among a preset number of lines from top to bottom in the middle of a frame of the first target video signal;
and if the voltage value of the target row is a negative value, determining that the received video signal is mistakenly locked by the determination.
In this embodiment, in the case where the duration of one frame of the first target video signal is even times the duration of one frame of the other target video signals (the other target video signals sharing the same standard value as the first target video signal), there are even frames of the other target video signals in the duration of one frame of the first target video signal. The very middle of a frame of the first target video signal corresponds to the beginning of a frame of the other target video signals.
Since the start of a frame of video signal is a field sync signal, the field sync signal is a low level (i.e., the voltage value is negative). And the middle of one frame of video signal is image information, and the voltage is a non-negative level value (i.e. the voltage value is a non-negative value), therefore, it can be determined whether the format of the received video signal is the first target format according to the voltage value of any line (referred to as target line herein) between the lines of the middle line of the first target video signal (which can be determined according to the number of lines of image information area and the number of lines of blanking area of the first target video signal and other target video signals), and further, it is determined whether the received video signal is mistakenly locked.
For example, taking the standards 4M12.5 and 720P25 as examples, the 4M12.5 signal is 12.5 frames per second, i.e. one frame is 80ms, the 720P25 signal is 25 frames per second, i.e. one frame is 40M; thus, for a duration of 80ms, there is one frame of the 4M12.5 video signal or two frames of the 720P25 video signal. In a frame 4M12.5, at the very middle of the 4M12.5 frame, there is a beginning of a 720P25 frame, which is schematically shown in fig. 2.
Assuming that the AD chip configures the register according to 4M12.5 (i.e. the first target format is 4M12.5), and detects that the received video signal is locked, at this time, the AD chip reads the voltage value of the middle line of the first target video signal of one frame.
If the voltage value of the right middle line is a non-negative value, the AD chip can determine that the standard of the received video signal is 4M 12.5;
if the voltage value in the middle is a negative value, the AD chip may determine that the format of the received video signal is not 4M12.5, that is, the received video signal is mis-locked.
Referring to fig. 3, a flow chart of another video signal false lock identification method provided in the embodiment of the present application is shown, where the video signal false lock identification method can be applied to an AD chip in a video processing device having the AD chip, such as an AD chip of a DVR, and as shown in fig. 3, the method can include the following steps:
step S300, if the format value of the received video signal is shared by target video signals of multiple formats and the register is configured according to the first target format, the received video signal is locked, and whether the duration of a frame of the first target video signal is an even multiple of the duration of a frame of other target video signals is judged. If yes, go to step S310; otherwise, go to step S340.
In this embodiment of the application, when the AD chip determines that the format value of the received video signal is shared by target video signals of multiple formats, reference may be made to relevant description in the method flow shown in fig. 1 for specific implementation of identifying the format of the received video signal by the AD chip, which is not described herein again in this embodiment of the application.
In this embodiment of the application, when the AD chip configures the register according to the first target system and detects that the received video signal is locked, the AD chip may determine whether the duration of a frame of the first target video signal is an even multiple of other frames of the first target video signal.
Step S310, reading a voltage value of a target row of a frame of the first target video signal. If the value is not negative, go to step S320; if the value is negative, go to step S330.
Step S320, determining the format of the received video signal as a first target format.
And step S330, determining that the received video signal is in false lock.
In the embodiment of the present application, it is considered that when the duration of a frame of the first target video signal is even times the duration of a frame of the other target video signals, the even frames of the other target video signals exist in the duration of the frame of the first target video signal. The very middle of a frame of the first target video signal corresponds to the beginning of a frame of the other target video signals.
Since the start of a frame of video signal is a field sync signal, the field sync signal is a low level (i.e., the voltage value is negative). The middle of one frame of video signal is image information, and the voltage is a non-negative level value (that is, the voltage value is a non-negative value), so that whether the format of the received video signal is the first target format or not can be determined according to the voltage value of any one line (that is, the target line) between the upper and lower preset number of lines of the middle line of the first target video signal, and further, whether the received video signal is mistakenly locked or not can be determined.
For example, taking the standards 4M12.5 and 720P25 as examples, the 4M12.5 signal is 12.5 frames per second, i.e. one frame is 80ms, the 720P25 signal is 25 frames per second, i.e. one frame is 40M; thus, for a duration of 80ms, there is one frame of the 4M12.5 video signal or two frames of the 720P25 video signal. In a frame 4M12.5, at the very middle of the 4M12.5 frame, there is a beginning of a 720P25 frame, which is schematically shown in fig. 2.
Assuming that the AD chip configures the register according to 4M12.5 (i.e. the first target format is 4M12.5), and detects that the received video signal is locked, at this time, the AD chip reads the voltage value of the middle line of the first target video signal of one frame.
If the voltage value of the right middle line is a non-negative value, the AD chip can determine that the standard of the received video signal is 4M 12.5;
if the voltage value in the middle is a negative value, the AD chip may determine that the format of the received video signal is not 4M12.5, that is, the received video signal is mis-locked.
Step S340, detecting whether the color carrier of the received video signal is locked. If yes, go to step S350; otherwise, go to step S360.
Step S350, determining the system of the received video signal as a first target system.
And step S360, determining that the received video signal is mistakenly locked.
In the embodiment of the present application, specific implementation of steps S340 to S360 may refer to relevant description in the method flow shown in fig. 1, and details of the embodiment of the present application are not described herein again.
In the embodiment of the application, if the format value of the received video signal is shared by target video signals of multiple formats and the received video signal is locked when the register is configured according to the first target format, whether the color carrier of the received video signal is locked is detected; if so, determining the format of the received video signal as the first target format; otherwise, the received video signal is determined to be wrongly locked, so that the identification of the video signal wrongly locked in the video signal system identification process is realized, and the accuracy of the video signal system identification is improved.
The methods provided herein are described above. The following describes the apparatus provided in the present application:
referring to fig. 4, a schematic structural diagram of a video signal mis-lock identification apparatus according to an embodiment of the present application is shown, where the video signal mis-lock identification apparatus may be applied to an AD chip in the foregoing method embodiment, and as shown in fig. 4, the video signal mis-lock identification apparatus may include:
a reading unit 410, configured to read a format value of the received video signal;
a configuration unit 420, configured to configure a register according to a first target format if the format value of the received video signal is shared by target video signals of multiple formats; the first target standard is a standard of a first target video signal in the plurality of target video signals;
a detecting unit 430 for detecting whether the received video signal is locked;
the detecting unit 430 is further configured to detect whether a color carrier of the received video signal is locked if the received video signal is locked;
a determining unit 440, configured to determine, if the color carrier of the received video signal is locked, that the format of the received video signal is the first target format;
the determining unit 440 is further configured to determine that the received video signal is mis-locked if the color carrier of the received video signal is not locked.
In an alternative embodiment, referring to fig. 5, the apparatus further comprises:
an adjusting unit 450 for setting a range of gain adjustment to be maximum and adjusting the gain to be maximum;
a detecting unit 430, configured to detect whether a color carrier of the received video signal is locked;
the determining unit 440 is specifically configured to determine that the received video signal is mistakenly locked if the color carrier of the received video signal is not locked.
In an optional implementation manner, the reading unit 410 is further configured to read a voltage value of a target line of a frame of the first target video signal if a color carrier of the received video signal is not locked and a duration of the frame of the first target video signal is even times a duration of a frame of other target video signals; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
the determining unit 440 is specifically configured to determine that the received video signal is mistakenly locked if the voltage value of the target row is a negative value.
In an alternative embodiment, referring to fig. 6, the apparatus further comprises:
a determining unit 460, configured to determine whether a duration of a frame of the first target video signal is even times of durations of a frame of other target video signals if the format value of the received video signal is shared by target video signals of multiple formats, and the configuration unit configures the register according to the first target format, and the detecting unit detects that the received video signal is locked;
the detecting unit 430 is specifically configured to detect whether the color carrier of the received video signal is locked if the duration of one frame of the first target video signal is not even times the duration of one frame of the other target video signals.
In an optional implementation manner, the reading unit 410 is further configured to read the voltage value of the target line of one frame of the first target video signal if the duration of the one frame of the first target video signal is even times the duration of one frame of the other target video signals; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
the determining unit 440 is specifically configured to determine that the format of the received video signal is the first target format if the voltage value of the target row is a non-negative value;
the determining unit 440 is further specifically configured to determine that the received video signal is mistakenly locked if the voltage value of the target row is a negative value.
Fig. 7 is a schematic diagram of a hardware structure of an electronic device according to an embodiment of the present disclosure. The electronic device may include a processor 701, a communication interface 702, a memory 703, and a communication bus 704. The processor 701, the communication interface 702, and the memory 703 communicate with each other via a communication bus 704. Wherein, the memory 703 is stored with a computer program; the processor 701 may execute the video signal false lock identification method described above by executing a program stored in the memory 703.
The memory 703, as referred to herein, may be any electronic, magnetic, optical, or other physical storage device that can contain or store information such as executable instructions, data, and the like. For example, the memory 702 may be: a RAM (random Access Memory), a volatile Memory, a non-volatile Memory, a flash Memory, a storage drive (e.g., a hard drive), a solid state drive, any type of storage disk (e.g., an optical disk, a dvd, etc.), or similar storage medium, or a combination thereof.
The embodiment of the present application also provides a machine-readable storage medium, such as the memory 703 in fig. 7, storing a computer program, which can be executed by the processor 701 in the electronic device shown in fig. 7 to implement the video signal false lock identification method described above.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the scope of protection of the present application.
Claims (12)
1. A method for identifying video signal false lock, comprising:
if the format value of the received video signal is shared by target video signals of multiple formats and the received video signal is locked when the register is configured according to the first target format, detecting whether the color carrier of the received video signal is locked; the first target system is a system of a first target video signal in the target video signals of the multiple systems;
if so, determining the format of the received video signal as the first target format;
otherwise, it is determined that the received video signal is mis-locked.
2. The method of claim 1, wherein if the color carrier of the received video signal is not locked, before determining that the received video signal is mis-locked, further comprising:
setting the range of gain adjustment to be maximum, and adjusting the gain to be maximum;
detecting whether a color carrier of the received video signal is locked;
and if the color carrier of the received video signal is not locked, determining to execute the step of determining that the received video signal is mistakenly locked.
3. The method of claim 1, wherein if the color carrier of the received video signal is not locked, before determining that the received video signal is mis-locked, further comprising:
if the duration of one frame of the first target video signal is even times of the duration of one frame of other target video signals, reading the voltage value of a target line of one frame of the first target video signal; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
and if the voltage value of the target row is a negative value, determining that the received video signal is mistakenly locked.
4. The method according to claim 1, wherein if the format value of the received video signal is shared by target video signals of multiple formats and the received video signal is locked while the register is configured according to the first target format, before detecting whether the color carrier of the received video signal is locked, further comprising:
judging whether the duration of one frame of the first target video signal is even times of the duration of one frame of other target video signals;
if not, determining to execute the step of detecting whether the color carrier of the received video signal is locked.
5. The method of claim 4, wherein said determining whether the duration of a frame of said first target video signal is an even multiple of the duration of a frame of other target video signals further comprises:
if yes, reading a voltage value of a target row of one frame of the first target video signal; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
if the voltage value of the target row is a non-negative value, determining the format of the received video signal as the first target format;
and if the voltage value of the target line is a negative value, determining that the received video signal is locked by mistake.
6. A video signal false lock recognition device, comprising:
a reading unit for reading the format value of the received video signal;
the configuration unit is used for configuring a register according to a first target system if the system value of the received video signal is shared by target video signals of multiple systems;
a detection unit for detecting whether the received video signal is locked; the first target system is a system of a first target video signal in the target video signals of the multiple systems;
the detection unit is further configured to detect whether a color carrier of the received video signal is locked if the received video signal is locked;
a determining unit, configured to determine, if a color carrier of the received video signal is locked, that a format of the received video signal is the first target format;
the determining unit is further configured to determine that the received video signal is mis-locked if the color carrier of the received video signal is not locked.
7. The apparatus of claim 6, further comprising:
an adjusting unit configured to set a range of gain adjustment to be maximum and adjust the gain to be maximum;
a detection unit for detecting whether a color carrier of the received video signal is locked;
the determining unit is specifically configured to determine that the received video signal is erroneously locked if the color carrier of the received video signal is not locked.
8. The apparatus of claim 6,
the reading unit is further configured to read a voltage value of a target row of a frame of the first target video signal if the color carrier of the received video signal is not locked and the duration of the frame of the first target video signal is even times of the duration of a frame of other target video signals; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
the determining unit is specifically configured to determine that the received video signal is erroneously locked if the voltage value of the target line is a negative value.
9. The apparatus of claim 6, further comprising:
the judging unit is used for judging whether the duration of a frame of the first target video signal is even times of the duration of a frame of other target video signals if the format value of the received video signal is shared by the target video signals of multiple formats and the configuration unit configures the register according to the first target format and the detection unit detects that the received video signal is locked;
the detection unit is specifically configured to detect whether a color carrier of the received video signal is locked if the duration of one frame of the first target video signal is not an even multiple of the durations of one frame of the other target video signals.
10. The apparatus of claim 9,
the reading unit is further configured to read a voltage value of a target line of one frame of the first target video signal if a duration of the one frame of the first target video signal is even times a duration of one frame of the other target video signals; wherein the target line is any one line between a preset number of lines above and below the middle line of the frame of the first target video signal;
the determining unit is specifically configured to determine that the format of the received video signal is the first target format if the voltage value of the target row is a non-negative value;
the determining unit is further specifically configured to determine that the received video signal is erroneously locked if the voltage value of the target line is a negative value.
11. An electronic device is characterized by comprising a processor, a communication interface, a memory and a communication bus, wherein the processor and the communication interface are used for realizing mutual communication by the memory through the communication bus;
a memory for storing a computer program;
a processor for implementing the method steps of any one of claims 1 to 5 when executing a program stored in the memory.
12. A computer-readable storage medium, characterized in that a computer program is stored in the computer-readable storage medium, which computer program, when being executed by a processor, carries out the method steps of any one of claims 1-5.
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810827448.9A CN110769180B (en) | 2018-07-25 | 2018-07-25 | Video signal false lock identification method and device, electronic equipment and storage medium |
| EP19840351.1A EP3813360A4 (en) | 2018-07-25 | 2019-07-23 | Method and device for video signal identification, electronic device, and readable storage medium |
| US17/262,636 US11930158B2 (en) | 2018-07-25 | 2019-07-23 | Video signal identification method and apparatus, electronic device and readable storage medium |
| PCT/CN2019/097293 WO2020020157A1 (en) | 2018-07-25 | 2019-07-23 | Video signal recognition method and apparatus, electronic device and readable storage medium |
| PCT/CN2019/097274 WO2020020149A1 (en) | 2018-07-25 | 2019-07-23 | Method and device for video signal identification, electronic device, and readable storage medium |
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| CN201810827448.9A CN110769180B (en) | 2018-07-25 | 2018-07-25 | Video signal false lock identification method and device, electronic equipment and storage medium |
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| CN110769180B true CN110769180B (en) | 2021-01-26 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1777257A (en) * | 2005-11-29 | 2006-05-24 | 天津三星电子显示器有限公司 | Method for automatically identifying received signal standard for analogue television signal receiver |
| CN102740086A (en) * | 2012-06-26 | 2012-10-17 | 上海屹芯微电子有限公司 | Automatic identification method and device of composite video broadcast signal system |
| CN104754272A (en) * | 2013-12-25 | 2015-07-01 | 深圳艾科创新微电子有限公司 | VGA (Video Graphics Array) full-resolution locked display system and method |
| CN106961598A (en) * | 2017-03-17 | 2017-07-18 | 浙江大华技术股份有限公司 | A kind of signaling mode determination methods and device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050091047A1 (en) * | 2003-10-27 | 2005-04-28 | Gibbs Jonathan A. | Method and apparatus for network communication |
-
2018
- 2018-07-25 CN CN201810827448.9A patent/CN110769180B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1777257A (en) * | 2005-11-29 | 2006-05-24 | 天津三星电子显示器有限公司 | Method for automatically identifying received signal standard for analogue television signal receiver |
| CN102740086A (en) * | 2012-06-26 | 2012-10-17 | 上海屹芯微电子有限公司 | Automatic identification method and device of composite video broadcast signal system |
| CN104754272A (en) * | 2013-12-25 | 2015-07-01 | 深圳艾科创新微电子有限公司 | VGA (Video Graphics Array) full-resolution locked display system and method |
| CN106961598A (en) * | 2017-03-17 | 2017-07-18 | 浙江大华技术股份有限公司 | A kind of signaling mode determination methods and device |
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