CN110767141A

CN110767141A - Display substrate, display panel and display device

Info

Publication number: CN110767141A
Application number: CN201910471638.6A
Authority: CN
Inventors: 许传志; 楼均辉; 张露; 高孝裕
Original assignee: Kunshan Guoxian Photoelectric Co Ltd
Current assignee: Kunshan Guoxian Photoelectric Co Ltd
Priority date: 2019-05-31
Filing date: 2019-05-31
Publication date: 2020-02-07
Anticipated expiration: 2039-05-31
Also published as: CN110767141B

Abstract

The application provides a display substrate, a display panel and a display device. The display area of the display substrate comprises a first display area and a second display area, and a plurality of pixel groups arranged along a second direction are arranged in the display area; the plurality of pixel groups comprise a plurality of first pixel groups and a plurality of second pixel groups, a plurality of first sub-pixels are arranged in the first display area, and a plurality of second sub-pixels are arranged in the second display area; the first type of pixel group comprises a first sub-pixel and a second sub-pixel, the second type of pixel group only comprises a second sub-pixel, and the second sub-pixels in the first type of pixel group are arranged in the areas which are positioned at two sides of the first display area along the first direction, and/or the second sub-pixels in the second type of pixel group are arranged in the areas which are positioned at two sides of the first display area along the first direction; the pixel circuits of the sub-pixels in each first type pixel group are connected to the same first type data line, and the pixel circuits of the sub-pixels in each second type pixel group are connected to the same second type data line.

Description

Display substrate, display panel and display device

Technical Field

The application relates to the technical field of display, in particular to a display substrate, a display panel and a display device.

Background

With the rapid development of electronic devices, the requirements of users on screen occupation ratio are higher and higher, so that the comprehensive screen display of the electronic devices is concerned more and more in the industry. Traditional electronic equipment such as cell-phone, panel computer etc. owing to need integrate such as leading camera, earphone and infrared sensing element etc. so the accessible is slotted (Notch) on the display screen, sets up camera, earphone and infrared sensing element etc. in the fluting region, but the fluting region can not be used for the display screen, like the bang screen among the prior art, or adopts the mode of trompil on the screen, to the electronic equipment who realizes the function of making a video recording, external light accessible screen on trompil department get into the photosensitive element who is located the screen below. However, these electronic devices are not all full-screen in the true sense, and cannot display in each area of the whole screen, for example, the camera area cannot display the picture.

Disclosure of Invention

According to a first aspect of embodiments of the present application, there is provided a display substrate, where a display area of the display substrate includes a first display area and a second display area, and a light transmittance of the first display area is greater than that of the second display area; a plurality of pixel groups are arranged in the display area, each pixel group comprises a plurality of sub-pixels arranged along a first direction, and the plurality of pixel groups are arranged along a second direction; the plurality of pixel groups comprise a plurality of first pixel groups and a plurality of second pixel groups, a plurality of first sub-pixels are arranged in the first display area, a plurality of second sub-pixels are arranged in the second display area, and the density of the first sub-pixels is smaller than that of the second sub-pixels; the first pixel group comprises a first sub-pixel and a second sub-pixel, the second pixel group only comprises a second sub-pixel, and the second sub-pixels in the first pixel group are arranged in the areas at two sides of the first display area along the first direction, and/or the second sub-pixels in the second pixel group are arranged in the areas at two sides of the first display area along the first direction;

the display substrate is internally provided with a plurality of first-class data lines, a plurality of second-class data lines and pixel circuits which are in one-to-one correspondence with the sub-pixels, the pixel circuits of the first sub-pixels and the second sub-pixels in each first-class pixel group are connected to the same first-class data line, and the pixel circuits of the second sub-pixels in each second-class pixel group are connected to the same second-class data line.

According to a second aspect of the embodiments of the present application, a display panel is provided, where the display panel includes the display substrate described above, and an encapsulation structure;

preferably, the package structure includes a polarizer, and the polarizer at least covers the second display region;

preferably, the polarizer does not cover the first display region;

preferably, the first display area is at least partially surrounded by the second display area.

According to a third aspect of embodiments of the present application, there is provided a display device, comprising:

an apparatus body having a device region;

the display panel covers the equipment body;

the device area is positioned below the first display area, and a photosensitive device which transmits or collects light rays through the first display area is arranged in the device area;

preferably, the photosensitive device comprises a camera and/or a light sensor.

The display substrate, display panel and display device that this application embodiment provided, because the luminousness in first display area is greater than the luminousness in second display area, then can set up photosensitive device in first display area below, realize the full screen display of display substrate under the prerequisite of guaranteeing photosensitive device normal work. Because the pixel circuit of the first sub-pixel and the pixel circuit of the second sub-pixel in the same first type pixel group are connected to the same first type data line, the first sub-pixel and the second sub-pixel in the first type pixel group can be driven by the same first type data line, so that the wiring complexity in the display area of the display substrate can be reduced, the display effects of the first display area and the second display area can be more consistent, and the use experience of a user can be improved.

Drawings

Fig. 1 is a top view of a display substrate according to an embodiment of the present disclosure;

fig. 2A is a top view of another display substrate provided in this embodiment of the present application;

fig. 2B is a top view of another display substrate provided in the present application;

fig. 2C is a top view of another display substrate provided in the present application;

FIG. 3 is a partial schematic view of a subpixel arrangement in the display substrate of FIG. 1;

FIG. 4 is a schematic diagram of the arrangement of data lines in the display substrate shown in FIG. 3;

FIG. 5 is a partial schematic view of a subpixel arrangement in the display substrate of FIG. 1;

FIG. 6 is a schematic diagram of the arrangement of data lines in the display substrate shown in FIG. 5;

FIG. 7 is a cross-sectional view of the display substrate shown in FIG. 1;

FIG. 8 is a schematic view of a portion of the display substrate shown in FIG. 1;

fig. 9 is a schematic view of an arrangement of light emission control lines in the display substrate shown in fig. 1;

FIG. 10 is a schematic diagram of the arrangement of scan lines in the display substrate shown in FIG. 1;

FIG. 11 is a schematic projection of a first electrode on a substrate according to an embodiment of the present disclosure;

FIG. 12 is a schematic view of another projection of a first electrode onto a substrate according to an embodiment of the present disclosure;

FIG. 13 is a schematic view of a further projection of a first electrode onto a substrate according to an embodiment of the present application;

fig. 14 is a schematic structural diagram of a first display area provided in an embodiment of the present application.

Detailed Description

Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus consistent with certain aspects of the present application, as detailed in the appended claims.

As in the background art, a display screen of an electronic device in the prior art is provided with a slotted area, photosensitive devices such as a camera, an earpiece and an infrared sensing element are arranged in the slotted area, and external light enters the photosensitive devices through the slotted area. However, since the slotted region cannot display, the full screen display of the electronic device cannot be realized.

Through the mode of setting up transparent display screen on above-mentioned electronic equipment, set up the sensitization device in transparent display screen below, can realize electronic equipment's full screen display under the prerequisite of guaranteeing that the sensitization device normally works. In the related art, the driving mode of the non-transparent display screen is active driving, the driving mode of the transparent display screen is passive driving, and two driving schemes are needed on the screen body, so that the complexity of overall screen driving is greatly increased.

In order to solve the above problems, embodiments of the present application provide a display substrate, a display panel and a display device, which can solve the above problems well.

The display substrate, the display panel, and the display device in the embodiments of the present application will be described in detail below with reference to the accompanying drawings. The features of the following examples and embodiments can be supplemented or combined with each other without conflict.

Fig. 1 is a top view of a display substrate according to an embodiment of the present disclosure; FIG. 2 is a top view of another display substrate provided in an embodiment of the present application; FIG. 3 is a partial schematic view of a subpixel arrangement in the display substrate of FIG. 1; FIG. 4 is a schematic diagram of the arrangement of data lines in the display substrate shown in FIG. 3; FIG. 5 is a partial schematic view of a subpixel arrangement in the display substrate of FIG. 1; FIG. 6 is a schematic diagram of the arrangement of data lines in the display substrate shown in FIG. 5; FIG. 7 is a cross-sectional view of the display substrate shown in FIG. 1; FIG. 8 is a schematic view of a portion of the display substrate shown in FIG. 1; fig. 9 is a schematic view of an arrangement of light emission control lines in the display substrate shown in fig. 1; FIG. 10 is a schematic diagram of the arrangement of scan lines in the display substrate shown in FIG. 1; FIG. 11 is a schematic projection of a first electrode on a substrate according to an embodiment of the present disclosure; FIG. 12 is a schematic view of another projection of a first electrode onto a substrate according to an embodiment of the present disclosure; fig. 13 is a schematic projection view of a first electrode on a substrate according to an embodiment of the present disclosure.

The embodiment of the application provides a display substrate. Referring to fig. 1 and 2A to 2C, the display region of the display substrate 100 includes a first display region 10 and a second display region 20, and the light transmittance of the first display region 10 is greater than that of the second display region 20. A plurality of pixel groups arranged along the second direction are disposed in the display region of the display substrate 100, and each pixel group includes a plurality of sub-pixels arranged along the first direction. Referring to fig. 3 and 5, the plurality of pixel groups includes a first-type pixel group 101 and a second-type pixel group 102. A plurality of first sub-pixels 11 are arranged in the first display area 10, a plurality of second sub-pixels 21 are arranged in the second display area 20, and the density of the first sub-pixels 11 is smaller than that of the second sub-pixels 21. The first-type pixel group 101 includes a first sub-pixel 11 and a second sub-pixel 21, the second-type pixel group 102 includes only the second sub-pixel 21, the second sub-pixels 21 in the first-type pixel group 101 are arranged in regions on both sides of the first display region 10 along the first direction, and/or the second sub-pixels 21 in the second-type pixel group 102 are arranged in regions on both sides of the first display region 10 along the first direction.

Referring to fig. 4 and 6, the display substrate 100 is provided with a first type data line 31, a second type data line 32, a pixel circuit 12 corresponding to the first sub-pixel, a pixel circuit 22 corresponding to the second sub-pixel 21, and a power line (not shown). The pixel circuit 12 of the first sub-pixel 11 is disposed in the first display area 10, and the pixel circuit 22 of the second sub-pixel 21 is disposed in the second display area 20. The pixel circuits 12 of the first sub-pixels 11 and the pixel circuits 22 of the second sub-pixels 21 in each first-type pixel group 101 are connected to the same first-type data line 31, and the pixel circuits 22 of the second sub-pixels 21 in each second-type pixel group 102 are connected to the same second-type data line 32.

The display substrate provided by the embodiment of the application, because the light transmittance of the first display area 10 is greater than the light transmittance of the second display area 20, the photosensitive device can be arranged below the first display area 10, and the comprehensive screen display of the display substrate 100 is realized on the premise of ensuring the normal work of the photosensitive device. Since the pixel circuit 12 of the first sub-pixel 11 and the pixel circuit 22 of the second sub-pixel 21 in the same first-type pixel group 101 are connected to the same first-type data line 31, the first sub-pixel 11 and the second sub-pixel 21 in the first-type pixel group 101 can be driven by the same first-type data line 31, so that the wiring complexity in the display area of the display substrate 100 can be reduced, the display effects of the first display area 10 and the second display area 20 can be more consistent, and the use experience of a user can be improved. The second sub-pixel 21 may include a third electrode 211, a second light emitting structure (not shown) on the third electrode 211, and a fourth electrode (not shown) on the second light emitting structure. The first electrode 111 and the second electrode 211 may be located at the same layer.

In the display substrate 100 provided in the embodiment of the present application, the first display area 10 shown in fig. 1 may be designed to be "off-shore", that is, the first display area 10 is surrounded by the second display area 20. Or the first display area 10 may be partially surrounded by the second display area 20. Wherein, as shown in fig. 2A and 2B, one edge of the first display region 10 coincides with one edge of the display region, and the edge of the display region extends in the first direction; as shown in fig. 2C, two opposite edges of the first display region 10 coincide with two opposite edges of the display region, and the two edges of the display region extend in the first direction. In the structure of the display substrate 100 shown in fig. 1 to 2C, the second sub-pixels 21 of the first-type pixel group 101 and the second-type pixel group 102 are arranged in regions located at both sides of the first display region 10 along the first direction.

In the embodiment of the present application, the first-type pixel group and the second-type pixel group include a plurality of sub-pixels arranged along the first direction, which means that the plurality of sub-pixels in the same pixel group are arranged substantially along the first direction. The axes of the plurality of sub-pixels of the same pixel group along the first direction may or may not coincide, for example, as shown in fig. 5, the plurality of sub-pixels of the same pixel group are arranged in a staggered manner along the first direction, and the plurality of sub-pixels of the pixel group are also considered to be arranged at intervals along the first direction.

In one embodiment, referring to fig. 4 and 6, the pixel circuit 12 corresponding to the first sub-pixel 11 and the pixel circuit 22 corresponding to the second sub-pixel 21 may be a 2T1C circuit, a 3T1C circuit, or a 3T2C circuit, or a 7T1C circuit, or a 7T2C circuit. Where T represents a transistor and C represents a storage capacitor. The pixel circuit of the first sub-pixel 11 and the pixel circuit of the second sub-pixel 21 may be of the same type or different types.

In one embodiment, referring to fig. 7, the first sub-pixel 11 includes a first electrode 111, a first light emitting structure (not shown) on the first electrode 111, and a second electrode (not shown) on the first light emitting structure, and the second sub-pixel 21 includes a third electrode 211, a second light emitting structure (not shown) on the third electrode 211, and a fourth electrode (not shown) on the second light emitting structure.

Referring again to fig. 7, the display substrate 100 may further include a substrate 41, a buffer layer 42 on the substrate 41, a semiconductor layer 26 and a semiconductor layer 14 formed on the buffer layer 42, a gate insulating layer 43 formed on the semiconductor layer 26 and the semiconductor layer 14, a capacitance insulating layer 44 over the gate insulating layer 43, an interlayer dielectric layer 45 over the capacitance insulating layer 44, a planarization layer 46 over the interlayer dielectric layer 45, and a pixel defining layer 47 over the planarization layer 46.

The pixel circuit 22 of the second sub-pixel 21 includes a second transistor 25 and a second capacitor, the second transistor 25 includes a source electrode 251, a drain electrode 252, and a gate electrode 253, the gate electrode 253 is located between the gate insulating layer 43 and the capacitor insulating layer 44, and the source electrode 251 and the drain electrode 252 are located on the interlayer dielectric layer 45 and are in contact with the semiconductor layer 26 through the gate insulating layer 43, the capacitor insulating layer 44, and a via hole on the interlayer dielectric layer 45. The second capacitor includes an upper plate 271 and a lower plate 272, the upper plate 271 is located between the capacitor insulating layer 44 and the interlayer dielectric layer 45, the lower plate 272 is located between the gate insulating layer 43 and the capacitor insulating layer 44, and the third electrode 211 is located between the planarization layer 46 and the pixel defining layer 47.

The pixel circuit 12 of the first sub-pixel includes a first transistor 13 and a first capacitor. The first transistor 13 includes a source electrode 131, a drain electrode 132, and a gate electrode 133, the gate electrode 133 is located between the gate insulating layer 43 and the capacitance insulating layer 44, and the source electrode 131 and the drain electrode 132 are located on the interlayer dielectric layer 45 and are in contact with the semiconductor layer 14 through vias on the gate insulating layer 43, the capacitance insulating layer 44, and the interlayer dielectric layer 45. The first capacitor includes an upper plate 152 and a lower plate 151, the upper plate 152 is located between the capacitor insulating layer 44 and the interlayer dielectric layer 45, the lower plate 151 is located between the gate insulating layer 43 and the capacitor insulating layer 44, and the first electrode 111 is located between the planarization layer 46 and the pixel defining layer 47.

In one embodiment, referring to fig. 7, a conductive layer 17 may be disposed in the first display region 10, and the conductive layer 17 may partially serve as an upper plate 152 of a capacitor and partially serve as the power line in the portion 16 of the first display region 10. With this arrangement, when the power line is located in the portion 16 of the first display region 10 and the upper plate 152 of the capacitor, the same step is performed, and there is no need to manufacture a connection structure between the power line and the upper plate 152 of the capacitor after the power line and the upper plate 152 of the capacitor are formed, which simplifies the manufacturing process of the display substrate 100.

In one embodiment, the portion of the first type data line 31 located in the first display area 10 and the first electrode 111 are located in different layers. Since the portion of the first-type data line 31 located in the first display area 10 and the first electrode 111 are disposed at different layers, the position and routing manner of the first-type data line 31 are not affected by the first electrode 111, and the routing manner and routing position are more flexible.

Further, referring to fig. 7, a portion of the first type data line 31 located in the first display region 10 is disposed at the same layer as a portion 16 of the power line located in the first display region 10, and the portion 16 of the power line located in the first display region 10 is disposed under the first electrode 111. With this arrangement, the portion of the first data line 31 in the first display region 10 and the portion of the power line in the first display region 10 are disposed on the same layer, and the portion of the first data line 31 in the first display region 10 and the portion 16 of the power line in the first display region can be formed in the same process step, thereby reducing the complexity of the manufacturing process of the display substrate 100.

In one embodiment, a portion of the first type data line 31 located in the second display region 20 may be disposed at the same layer as a portion of the first type data line 31 located in the first display region 10, and a portion of the first type data line 31 located in the first display region 10 overlaps a portion of the second type data line 31 located in the second display region 20. By the arrangement, the preparation process of the first type data line can be simplified.

Referring to fig. 4 and 6, the first type data line 31 may include a fourth sub-segment 311, a fifth sub-segment 312, and a sixth sub-segment 313 connected in sequence, the fourth sub-segment 311 and the sixth sub-segment 313 are located in the second display area 20, the fifth sub-segment 312 is located in the first display area 10, the fifth sub-segment 312 and a portion of the power line located in the first display area 10 are located at the same layer, and the fourth sub-segment 311 and the sixth sub-segment 313 overlap the fifth sub-segment 312. The fourth subsection 311, the sixth subsection 313, and the source 251 and the drain 252 of the second transistor 25 may be formed in the same process step. Specifically, during the preparation, through holes are first formed in the gate insulating layer 43, the capacitor insulating layer 44 and the interlayer dielectric layer 45, then metal is globally deposited in the through holes and above the interlayer dielectric layer 45, and finally the metal layer on the interlayer dielectric layer 45 is patterned, and the remaining portions are the fourth subsection 311, the fifth subsection 312, and the source 251 and the drain 252 of the second transistor 25.

In one embodiment, when the second sub-pixels 21 of the second-type pixel group 102 are arranged in regions on both sides of the first display region 10 along the first direction, referring to fig. 4 and 6, the second-type data line 32 may include a first segment 321, a second segment 322, and a third segment 323. The first segment 321 and the second segment 322 are located in the second display area 20 and are respectively located at both sides of the first display area 10 in the first direction. The third section 323 connects the first section 321 and the second section 322. The third section 323 may be provided in the following two ways.

In a first manner, referring to fig. 4, the third segment 323 is located in the first display area 10.

Preferably, the light transmittance of the third segment 323 may be greater than or equal to 70%. More preferably, the light transmittance of the third section 323 may be greater than or equal to 90%, for example, the light transmittance of the third section 323 may be 90%, 95%, or the like. The arrangement enables the light transmittance of the first display area 10 to be large, and further enables the light transmittance of the first display area 10 to meet the lighting requirement of the photosensitive device arranged below the first display area.

Further, the material of the third segment 323 may include at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide. Preferably, the material for preparing the third segment 323 uses indium tin oxide doped with silver or indium zinc oxide doped with silver to reduce the resistance of the third segment 323 on the basis of ensuring high light transmittance of the first display region 10.

In an embodiment, the first segment 321 and the second segment 322 may be disposed on the same layer, that is, the first segment 321 and the second segment 322 are formed in the same process step, the first segment 321 and the third segment 323 are located on different layers, an insulating layer is disposed between the third segment 323 and the first segment 321, a plurality of through holes are disposed on the insulating layer, and the first segment 321 and the second segment 322 are respectively connected to the third segment 323 through the corresponding through holes.

Further, the third segment 323 and the first electrode 111 may be disposed on the same layer, and the first segment 321, the second segment 322 may be respectively located on the same layer as the power line. Thus, the third segment 323 and the first electrode 111 are formed in the same process step, and the first segment 321, the second segment 322 and the portion of the power line in the second display region 20 can be formed in the same process step, so that the complexity of the manufacturing process of the display substrate can be reduced, and the manufacturing process can be simplified. In this embodiment, the insulating layer between the first segment 321 and the third segment 323 is the planarization layer 46.

Referring to fig. 14, the first electrode 111 is positioned at the same layer as the third segment 323 of the second type data line 31, the conductive layer 17 is positioned at the same layer as the fifth segment 312 of the first type data line 31, and the third segment 323 of the second type data line 31 may be positioned between the power line portion 16 of the first display region 10 and the upper plate 152 of the capacitor.

Further, the distance between the conductive layer 17 and the fifth sub-segment 312 of the first type data line 31 may vary continuously or discontinuously in the direction perpendicular to the extending direction of the first type data line 31. With such an arrangement, the positions of the diffraction fringes generated by the conductive layer 17 and the fifth subsegment 312 of the first-type data line 31 are different, and the diffraction effects at different positions are mutually offset, so that the diffraction effect can be effectively weakened, and a figure shot by a camera arranged below the first display area 10 has high definition.

The conductive layer 17 and the fifth segment 312 of the first-type data line 31 may be in the shape of a strip, a wave, a gourd, a dumbbell, or the like.

In one embodiment, referring to fig. 8, the third segment 323 may be disposed around a portion of the first electrode 111. The third section 323 may include a first sub-section 3234, a second sub-section 3235, and a third sub-section 3236, which are sequentially connected, where the second sub-section 3235 extends along the first direction, the first sub-section 3234 and the third sub-section 3236 extend along the second direction, the first sub-section 3234 is connected to the first section 321, and the third sub-section 3236 is connected to the second section 322. With such an arrangement, when the first electrode 111 and the third segment 323 are disposed at the same layer, since the third segment surrounds the first electrode 111, the third segment 323 has a small influence on the position and size of the first electrode 111.

Further, the data lines of the first type 31, the data lines of the second type 32 and the power lines are all located above the substrate 41, and the projection of the first electrode 111 on the substrate 41 falls within the projection of the portion 16 of the power lines located in the first display area 10 on the substrate 41. With this configuration, the portion of the power line located in the first display area 10 can shield an electric field between the first electrode 111 and a signal line (e.g., a scan line) located below the power line, so as to prevent the signal received by the signal line from being unstable, and improve the stability of the signal received by the first sub-pixel, thereby improving the display effect of the first display area 10.

Further, the drain of the second transistor 25 in the pixel circuit 22 and the first segment 321 and the second segment 322 may be formed in the same process step. By the arrangement, the preparation process flow of the display substrate can be simplified, and the complexity of the preparation process is reduced.

In another embodiment, the first segment 321, the second segment 322 and the third segment 323 are located in the same layer, and the first segment 321 and the second segment 322 are respectively overlapped with the third segment 323. With the arrangement, the first section 321 and the third section 323, and the third section 323 and the second section 322 are connected without providing through holes on the insulating layer, thereby simplifying the manufacturing process of the second data line 32.

Further, the third segment 323 and the portion of the power line in the first display region 10 may be disposed at the same layer, that is, the third segment 323 and the portion of the power line in the first display region 10 are formed in the same process step.

Further, the drain 251 of the second transistor 25 of the pixel circuit 22 of the second sub-pixel 21 is formed in the same process step as the first segment 321 and the second segment 322. With such an arrangement, the process flow of manufacturing the display substrate 100 can be further simplified.

In a second way, referring to fig. 6, a third segment 323 of the second type data line 32 surrounds a portion of the first display area 10. The third segment 323 is disposed around the first display region 10, so that compared with the case where the third segment 323 is disposed in the first display region 10, the structural complexity of the first display region 10 can be reduced, which is helpful for improving the light transmittance of the first display region 10, and diffraction generated when external light is incident on the first display region 10 due to the structural complexity of the first display region 10 can be reduced.

Further, the third segment 323 may include a fourth sub-segment 3231, a fifth sub-segment 3232, and a sixth sub-segment 3233, which are sequentially connected, where the fourth sub-segment 3231 and the sixth sub-segment 3233 extend along the second direction, the fifth sub-segment 3232 extends along the first direction, the fourth sub-segment 3231 is connected to the first segment 321, and the sixth sub-segment 3233 is connected to the third segment 323.

Further, the first segment 321, the second segment 322, and the third segment 323 may be located at the same layer. In this way, the first segment 321, the second segment 322, and the third segment 323 can be formed in the same process step, which can simplify the process flow of manufacturing the display substrate 100.

Further, the drain 252 and the source 251 of the second transistor 25 of the pixel circuit 22 of the second sub-pixel 21 are formed in the same process step as the first segment 321, the second segment 322 and the third segment 323. With such an arrangement, the drain 252, the source 251, the first segment 321, the second segment 322, and the third segment 323 of the second transistor 25 can be prepared through the same process step, which can further simplify the process flow of the display substrate 100.

Further, the first type data lines 31, the second type data lines 32 and the power lines are located above the substrate 41, and a projection of the first electrode 111 on the substrate 41 falls within a projection of a portion of the power lines located in the first display area 10 on the substrate 41. With this configuration, the portion of the power line located in the first display area 10 can shield an electric field between the first electrode 111 and a signal line (e.g., a scan line) located below the power line, so as to prevent the signal received by the signal line from being unstable, and improve the stability of the signal received by the first sub-pixel, thereby improving the display effect of the first display area 10.

In one implementation, referring again to fig. 6, the display region of the display substrate 100 may further include a third display region 30 between the first display region 10 and the second display region 20, and the third section 323 of the second type data line 32 may be disposed within the third display region 30.

In one embodiment, no sub-pixels may be disposed in the third display region 30, and when displaying, the third display region 30 displays a black image, that is, a ring of the third display region 30 displaying black. In other embodiments, sub-pixels may also be disposed within the third display area 30.

Further, the pixel circuit of the first sub-pixel adjacent to the third display region 30 may be disposed in the third display region 30. With such an arrangement, the structural complexity of the first display area 10 can be further reduced, diffraction can be reduced, and the light transmittance of the first display area 10 can be improved.

In one embodiment, referring to fig. 4, the first type data lines 31 are alternately arranged with the second type data lines 32. Fig. 4 illustrates only one second-type data line 32 disposed between two adjacent first-type data lines 31, and in other embodiments, two or more second-type data lines may be disposed between two adjacent first-type data lines 31.

In another embodiment, referring to fig. 6, the second data lines are disposed at two sides of the first data lines 31, and when the number of the first data lines 31 is two or more, the two or more first data lines 31 are disposed adjacently, and when the number of the second data lines 32 located at the same side of the first data lines 32 is two or more, the two or more second data lines 32 located at the same side of the first data lines 32 are disposed adjacently. It is more convenient to arrange the third section 323 of the second type data line 32 in the second display area 20, and the process is easier to implement.

In one embodiment, referring to fig. 3 and 5, the plurality of pixel groups in the display area of the display substrate 100 may further include a fifth type pixel group 103, the fifth type pixel group 103 includes a plurality of second sub-pixels 21, the plurality of second sub-pixels 21 of the fifth type pixel group 103 are located at the side of the first display area 10 in the second direction, and the plurality of second sub-pixels 21 of the plurality of second sub-pixels 21 are arranged at intervals in the second direction. A third data line 33 may be further disposed in the display substrate 100, and the pixel circuits 22 corresponding to the second sub-pixels 21 in the same fifth pixel group 103 are connected to the same third data line 33.

In one embodiment, referring to fig. 3 again, the sub-pixels in the display area of the display substrate 100 may be further divided into a third type pixel group 201, a fourth type pixel group 202 and a sixth type pixel group 203, the third type pixel group 201, the fourth type pixel group 202 and the sixth type pixel group 203 are arranged along the first direction, the third type pixel group 201 includes a plurality of first sub-pixels 11 and a plurality of second sub-pixels 21, the fourth type pixel group 202 includes only a plurality of second sub-pixels 21, and the plurality of sub-pixels in the third type pixel group 201 and the fourth type pixel group 202 are arranged at intervals along the second direction.

When the pixel circuit 12 corresponding to the first sub-pixel 11 and the pixel circuit 22 corresponding to the second sub-pixel 21 are 3T1C circuits, or 3T2C circuits, or 7T1C circuits, or 7T2C circuits, and the light-emitting control line of the display area is single-side driven, referring to fig. 9, a first light-emitting control line 41 and a second light-emitting control line 42 are further disposed in the display area of the display substrate 100, the pixel circuit 21 of each first sub-pixel 11 and the pixel circuit 22 of each second sub-pixel 21 in each third pixel group 201 are connected to the same first light-emitting control line 41, and the pixel circuit 22 of each second sub-pixel 21 in each fourth pixel group is connected to the same second light-emitting control line 42. The first type emission control line 41 and the second type emission control line 42 are used to provide emission control signals for the sub-pixels. Since the pixel circuit 12 of the first sub-pixel 11 and the pixel circuit 22 of the second sub-pixel 21 in the same third type pixel group 201 are connected to the same first type light-emitting control line 41, the first sub-pixel 11 and the second sub-pixel 21 in the third type pixel group 201 can be driven by the same first type light-emitting control line 41, so that the wiring complexity in the display area of the display substrate 100 can be reduced, the display effects of the first display area 10 and the second display area 20 can be more consistent, and the use experience of a user can be improved.

Further, referring to fig. 3 again, the second sub-pixels 21 in each of the third-type pixel groups 201 are arranged in the regions located at two sides of the first display area 10 along the second direction, and/or the second sub-pixels 21 in each of the fourth-type pixel groups 202 are arranged in the regions located at two sides of the first display area 10 along the second direction. When the second sub-pixels 21 in the fourth type pixel group 202 are arranged in the regions on both sides of the first display region 10 along the second direction, the second type emission control line 42 may include a fourth segment 421, a fifth segment 422, and a sixth segment 423, the fourth segment 421 and the fifth segment 422 are located in the second display region 20 and on both sides of the first display region 10, and the sixth segment 423 connects the fourth segment 421 and the fifth segment 422.

Further, the fourth segment 421, the fifth segment 422 and the sixth segment 423 may be located at the same layer, and the sixth segment 423 is respectively overlapped with the fourth segment 421 and the fifth segment 422. With such an arrangement, through holes do not need to be formed in the insulating layer to connect the fourth segment 421 and the sixth segment 423, and the fifth segment 422 and the sixth segment 423, so that the preparation process of the second-type light-emitting control line 42 is simplified.

The sixth segment 423 may be located in the first display region 10, and the light transmittance of the sixth segment 423 is greater than or equal to 70%. More preferably, the light transmittance of the sixth segment 423 may be greater than or equal to 90%, for example, the light transmittance of the sixth segment 423 may be 90%, 95%, and the like. The arrangement enables the light transmittance of the first display area 10 to be large, and further enables the light transmittance of the first display area 10 to meet the lighting requirement of the photosensitive device arranged below the first display area.

Further, the material of the sixth segment 423 may include at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide. Preferably, the material for preparing the sixth segment 423 employs indium tin oxide doped with silver or indium zinc oxide doped with silver, so as to reduce the resistance of the sixth segment 423 on the basis of ensuring high light transmittance of the first display region 10.

Alternatively, the sixth segment 423 may surround a portion of the first display area 10. Compared with the sixth segment 423 disposed in the first display region 10, the sixth segment 423 disposed around the first display region 10 can reduce the structural complexity of the first display region 10, thereby improving the light transmittance of the first display region 10, and reducing the diffraction generated when external light is incident on the first display region 10 due to the structural complexity of the first display region 10.

Further, a sixth segment 423 may be disposed in the third display area 30.

In one embodiment, referring to fig. 3, when the scan line of the display area is single-side driven, the seventh type pixel group 203 includes a plurality of second sub-pixels 21, the plurality of second sub-pixels 21 of the sixth type pixel group 203 are distributed at a side of the first display area 10 along the first direction, and the plurality of second sub-pixels 21 of the plurality of second sub-pixels 21 are arranged at intervals along the second direction. A third type light-emitting control line 43 may be further disposed in the display substrate 100, and the pixel circuits 22 corresponding to the plurality of second sub-pixels 21 in the same sixth type pixel group 203 are connected to the same third type light-emitting control line 43.

In one embodiment, referring to fig. 10, a first type scanning line 51 and a second type scanning line 52 may be further disposed in the display area, the pixel circuit 12 of each first sub-pixel 11 and the pixel circuit 22 of each second sub-pixel 21 in each third type pixel group 201 are connected to the same first type scanning line 51, and the pixel circuit 22 of each second sub-pixel 21 in each fourth type pixel group 202 is connected to the same second type scanning line 52; the first scanning lines 51 and the second scanning lines 52 are used for providing scanning signals for the sub-pixels. Since the pixel circuit 12 of the first sub-pixel 11 and the pixel circuit 22 of the second sub-pixel 21 in the same third-type pixel group 201 are connected to the same first-type scan line 51, the first sub-pixel 11 and the second sub-pixel 21 in the third-type pixel group 201 can be driven by the same first-type scan line 51, so that the wiring complexity in the display area of the display substrate 100 can be reduced, the display effects of the first display area 10 and the second display area 20 can be more consistent, and the use experience of a user can be improved.

Preferably, referring to fig. 3 again, the second sub-pixels 21 in each of the third-type pixel groups 201 are arranged in regions on both sides of the first display region 10 along the second direction, and/or the second sub-pixels 21 in each of the fourth-type pixel groups 202 are arranged in regions on both sides of the first display region 10 along the second direction. Referring to fig. 10, when the second sub-pixels 21 in the fourth type pixel group 202 are arranged in the regions on both sides of the first display region 10 along the second direction, the second type scan line 52 may include a seventh segment 521, an eighth segment 522, and a ninth segment 523, the seventh segment 521 and the eighth segment 522 are located in the second display region 20 and on both sides of the first display region 10, and the ninth segment 523 connects the seventh segment 521 and the eighth segment 522.

Further, the seventh segment 521, the eighth segment 522 and the ninth segment 523 are located at the same layer, and the ninth segment 523 is respectively overlapped with the seventh segment 521 and the eighth segment 522. With the arrangement, through holes do not need to be formed in the insulating layer to connect the seventh segment 521 and the ninth segment 523 and connect the eighth segment 522 and the ninth segment 523, so that the preparation process of the second-type scanning line 52 is simplified.

The ninth segment 523 may be located in the first display region 10, and a light transmittance of the ninth segment 523 is greater than or equal to 70%. More preferably, the light transmittance of the ninth segment 523 may be greater than or equal to 90%, for example, the light transmittance of the ninth segment 523 may be 90%, 95%, and the like. The arrangement enables the light transmittance of the first display area 10 to be large, and further enables the light transmittance of the first display area 10 to meet the lighting requirement of the photosensitive device arranged below the first display area.

Further, the material of the ninth segment 523 may include at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide. Preferably, the material for preparing the ninth segment 523 is silver-doped indium tin oxide or silver-doped indium zinc oxide, so as to reduce the resistance of the ninth segment 523 on the basis of ensuring high light transmittance of the first display region 10.

Alternatively, the ninth segment 523 may surround a portion of the first display region 10. The ninth segment 523 is disposed around the first display region 10, so that compared with the ninth segment 523 disposed in the first display region 10, the structure complexity of the first display region 10 can be reduced, which is beneficial to improving the light transmittance of the first display region 10, and the diffraction generated when external light is incident on the first display region 10 due to the structure complexity of the first display region 10 can be reduced.

Further, a ninth segment 523 may be disposed in the third display area 30.

In one embodiment, when the scan line of the display area is single-side driven, the sixth type pixel group 203 includes a plurality of second sub-pixels 21, the plurality of second sub-pixels 21 of the sixth type pixel group 203 are distributed on one side of the first display area 10 along the first direction, and the plurality of second sub-pixels 21 of the plurality of second sub-pixels 21 are arranged at intervals along the second direction. The display substrate 100 may further include a third type of scan line 53, and the pixel circuits 22 corresponding to the second sub-pixels 21 in the same sixth type of pixel group 203 are connected to the same third type of scan line 53.

In one embodiment, the first electrode 111 of each of the first sub-pixels may include at least one first electrode block, and the light emitting structure includes a light emitting structure block correspondingly disposed on each of the first electrode blocks.

In one embodiment, referring to fig. 11 to 13, when the first electrode 111 includes two or more first electrode blocks 1111, the two or more first electrode blocks 1111 are arranged at intervals along the first direction, and the first electrode 111 further includes a connection portion 1112 disposed between two adjacent first electrode blocks 1111, and the two adjacent first electrode blocks 1111 are electrically connected through the corresponding connection portion 1112. So set up, first electrode block 1111 in first electrode 111 can be provided the signal by a data line or scanning line, can reduce the complexity of walking the line in the first display area, and the diffraction stack phenomenon that the line of walking of first display area was complicated and led to when can effectively improving the light transmission, and then the image quality that the camera shooting that promotes to set up the setting at the backlight face in first display area, avoids appearing the image distortion defect. In addition, the plurality of first electrode blocks 1111 in the same first electrode 111 are electrically connected, so that the light emitting structure blocks correspondingly disposed on the plurality of first electrode blocks 1111 of the same first electrode 111 can be controlled to emit light at the same time or be controlled to be turned off at the same time, thereby simplifying the control of the first display region 10.

In one embodiment, the first electrode block 1111 and the connection portion 1112 of the same first electrode 111 are disposed at the same layer. With this configuration, the first electrode block 1111 and the connection portion 1112 of the same first electrode 111 can be formed in the same process step, thereby reducing the complexity of the manufacturing process.

Further, the size of the connection portion 1112 in the direction perpendicular to the extending direction thereof is greater than 3 μm and less than one-half of the maximum size of the first electrode block 1111. By setting the size of the connection portion 1112 in the direction perpendicular to the extending direction thereof to be larger than 3 μm, the resistance of the connection portion 1112 can be made small; by setting the size of the connection portion 1112 to be smaller than one half of the maximum size of the first electrode block 1111, the size of the first electrode block 1111 is less affected by the setting of the connection portion 1112, and the reduction of the size of the first electrode block 1111, which is caused by the large size of the connection portion 1112, and the reduction of the effective light emitting area of the first display area 10 are avoided.

Further, the projection of the first electrode block 1111 of the first electrode 111 on the substrate 41 of the display substrate 100 is composed of one first graphic unit or a plurality of first graphic units. Wherein the first graphical unit may comprise a circle, an ellipse, a dumbbell, a gourd, or a rectangle.

The first electrode 111 of the first display area 10 shown in fig. 11 includes six first electrode blocks 1111, and a projection of each first electrode block 1111 onto the substrate is composed of one first graphic unit, which is rectangular. The first electrode 111 in the first display area 10 shown in fig. 12 includes five first electrode blocks 1111, and a projection of each first electrode block 1111 onto the substrate is composed of one first graphic unit, which is circular. The first electrode 111 in the first display area 10 shown in fig. 13 includes two first electrode blocks 1111, and the projection of the first electrode blocks 1111 onto the substrate is composed of one first pattern unit, which is dumbbell-shaped. Preferably, the first pattern unit is circular, oval, dumbbell or gourd-shaped, and the shape can change the periodic structure generated by diffraction, that is, the distribution of the diffraction field is changed, so that the diffraction effect generated when external incident light passes through the first pattern unit is reduced. Moreover, when the first image unit is in the above shape, the size of the first electrode 111 in the first direction changes continuously or discontinuously, and the distance between two adjacent first electrodes 111 in the first direction changes continuously or discontinuously, so that the positions where two adjacent first electrodes 111 diffract are different, and the diffraction effects at different positions cancel each other out, thereby effectively reducing the diffraction effect, and further ensuring that the image photographed by the camera disposed below the first display area 10 has high definition.

In one embodiment, referring to fig. 11 and 12, in the first direction, two adjacent first electrode blocks 1111 of the plurality of first electrode blocks 1111 of the same first electrode 111 are arranged in a staggered manner. This arrangement further reduces diffraction effects caused when externally incident light passes through the first display region 10.

Further, in the plurality of first electrode blocks 1111 of the same first electrode 111, two first electrode blocks 1111 disposed at intervals of one first electrode block 1111 overlap along the central axis of the second direction. So set up and to make arranging of first electrode piece 1111 more regular to correspond the arranging more regular of the light-emitting structure piece that sets up in a plurality of first electrode pieces 1111 tops, and then the opening of the mask slice that preparation light-emitting structure piece adopted arranges more regular. In addition, when the light emitting structure blocks of the display substrate including the first display region 10 and the second display region 20 are vapor-deposited, the same mask plate can be used in the same vapor deposition process, and the number of screen wrinkles is reduced because the patterns on the mask plate are uniform.

In one embodiment, the projection of the light emitting structure block correspondingly disposed on the first electrode block on the substrate is composed of a second pattern unit or a plurality of second pattern units, and the second pattern unit is the same as or different from the first pattern unit. Preferably, if the first graphic unit is different from the second graphic unit, the projection of the light emitting structure block correspondingly disposed on the first electrode block 1111 on the substrate is different from the projection of the first electrode block on the substrate, so as to further reduce the diffraction effect generated when the light passes through the first display region 10.

Wherein the second graphical unit comprises a circle, an ellipse, a dumbbell, a gourd or a rectangle.

In one embodiment, the light transmittance of the first type data line 31, the first electrode and/or the second electrode, which is located at a portion of the first display region 10, is greater than or equal to 70%. More preferably, the light transmittance of the first type data line 31, the portion of the first display region 10, the first electrode 111 and/or the second electrode may be greater than or equal to 90%, for example, the light transmittance may be 90%, 95%, and the like. The arrangement enables the light transmittance of the first display area 10 to be large, and further enables the light transmittance of the first display area 10 to meet the lighting requirement of the photosensitive device arranged below the first display area.

The material of the first-type data line 31 positioned at the portion of the first display region 10, the first electrode 111 and/or the second electrode may include at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide. Preferably, the transparent material for preparing the portion of the first data line 31 located in the first display region 10, the first electrode 111 and/or the second electrode is silver-doped indium tin oxide or silver-doped indium zinc oxide, so as to reduce the resistance of the portion of the first data line 31 located in the first display region 10, the first electrode and/or the second electrode on the basis of ensuring high light transmittance of the first display region.

The first display region 10 of the display substrate 100 provided in the embodiment of the present application may have a drop shape, a circular shape, a rectangular shape, a semicircular shape, a semi-elliptical shape, or an elliptical shape. But not limited thereto, the first display area 10 may be designed in other shapes according to actual situations.

In one embodiment, the first direction and the second direction may be perpendicular to each other. Wherein, the first direction can be a column direction, and the second direction can be a row direction; alternatively, the first direction may be a row direction and the second direction may be a column direction. In the figure, only the first direction is taken as a column direction and the second direction is taken as a row direction for explanation, and other cases are not illustrated.

The embodiment of the present application further provides a display panel, which includes the display substrate 100 and the encapsulation layer. The encapsulation layer is arranged on the side of the display substrate 100 facing away from its substrate.

In one embodiment, the first display area 10 is at least partially surrounded by the second display area 20. The first display area 10 is partially surrounded by the second display area 20 as shown in fig. 1, and in other embodiments, the first display area 10 may be completely surrounded by the second display area 20.

In one embodiment, the encapsulation layer may include a polarizer, and the polarizer covers at least the second display region 20. Further, the polarizer does not cover the first display region 10, and a photosensitive device that emits or collects light through the first display region 10 may be disposed under the first display region 10. The polaroid can dissipate the reflected light on the surface of the display panel, so that the use experience of a user is improved; the first display area 10 is not provided with a polarizer, so that the light transmittance of the first display area 10 can be improved, and the normal operation of the photosensitive device arranged below the first display area 10 is ensured.

The display panel that this application embodiment provided, because the luminousness of first display area 10 is greater than the luminousness of second display area 20, then can set up photosensitive device in first display area 10 below, realize the full-face screen display of display substrate under the prerequisite of guaranteeing that photosensitive device normally works. Since the pixel circuit 12 of the first sub-pixel 11 and the pixel circuit 22 of the second sub-pixel 21 in the same first-type pixel group 101 are connected to the same first-type data line 31, the first sub-pixel 11 and the second sub-pixel 21 in the first-type pixel group 101 can be driven by the same first-type data line 31, so that the wiring complexity in the display area of the display substrate 100 can be reduced, the display effects of the first display area 10 and the second display area 20 can be more consistent, and the use experience of a user can be improved. Since the power line is disposed in the same layer as the first display region 10 and the first-type data line 31 is disposed below the first electrode 111 of the first sub-pixel 11, the position of the first-type data line 31 and the routing manner are not affected by the first electrode 111, and the routing manner and the routing position are more flexible.

The embodiment of the application also provides a display device which comprises an equipment body and the display panel. The equipment body is provided with a device area, and the display panel covers the equipment body. The device area is located below the first display area, and a photosensitive device which conducts light collection through the first display area is arranged in the device area.

Wherein, the photosensitive device can comprise a camera and/or a light sensor. Other devices besides the photosensitive device, such as a gyroscope or a receiver, can also be arranged in the device region. The device area can be the fluting district, and display panel's first display area can be corresponding to fluting district laminating setting to make photosensitive device can see through this first display area and launch or gather light.

The display device can be a digital device such as a mobile phone, a tablet, a palm computer, an ipod and the like.

The display device that this application embodiment provided, because the luminousness of first display area 10 is greater than the luminousness of second display area 20, then can set up photosensitive device in first display area 10 below, realize the full screen display of display substrate under the prerequisite of guaranteeing that photosensitive device normally works. Since the pixel circuit 12 of the first sub-pixel 11 and the pixel circuit 22 of the second sub-pixel 21 in the same first-type pixel group 101 are connected to the same first-type data line 31, the first sub-pixel 11 and the second sub-pixel 21 in the first-type pixel group 101 can be driven by the same first-type data line 31, so that the wiring complexity in the display area of the display substrate 100 can be reduced, the display effects of the first display area 10 and the second display area 20 can be more consistent, and the use experience of a user can be improved. Since the power line is disposed in the same layer as the first display region 10 and the first-type data line 31 is disposed below the first electrode 111 of the first sub-pixel 11, the position of the first-type data line 31 and the routing manner are not affected by the first electrode 111, and the routing manner and the routing position are more flexible.

It is noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening layers may also be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may also be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intermediate layer or element may also be present. Like reference numerals refer to like elements throughout.

In the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise.

Other embodiments of the invention will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the invention and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the invention being indicated by the following claims.

It will be understood that the invention is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.

Claims

1. A display substrate is characterized in that a display area of the display substrate comprises a first display area and a second display area, and the light transmittance of the first display area is greater than that of the second display area; a plurality of pixel groups are arranged in the display area, each pixel group comprises a plurality of sub-pixels arranged along a first direction, and the plurality of pixel groups are arranged along a second direction; the plurality of pixel groups comprise a plurality of first pixel groups and a plurality of second pixel groups, a plurality of first sub-pixels are arranged in the first display area, a plurality of second sub-pixels are arranged in the second display area, and the density of the first sub-pixels is smaller than that of the second sub-pixels; the first pixel group comprises a first sub-pixel and a second sub-pixel, the second pixel group only comprises a second sub-pixel, and the second sub-pixels in the first pixel group are arranged in the areas at two sides of the first display area along the first direction, and/or the second sub-pixels in the second pixel group are arranged in the areas at two sides of the first display area along the first direction;

2. The display substrate of claim 1, wherein the first sub-pixel comprises a first electrode, a first light emitting structure on the first electrode, and a second electrode on the first light emitting structure, and the first data line is located in a different layer from the first electrode in a portion of the first display region;

preferably, a power line is further disposed in the display substrate, a portion (312) of the first type data line (31) located in the first display area (10) and a portion (16) of the power line located in the first display area (10) are disposed on the same layer, and a portion (16) of the power line located in the first display area (10) is disposed under the first electrode;

preferably, the part of the first type data line (31) located in the second display area (20) is arranged at the same layer as the part (312) of the first type data line (31) located in the first display area (10), and the part (312) of the first type data line (31) located in the first display area (10) is overlapped with the part of the first type data line located in the second display area;

preferably, a conductive layer is arranged in the first display, the pixel circuit of the first sub-pixel includes a capacitor, a part of the conductive layer is used as a plate of the capacitor, and the other part of the conductive layer is used as a part of the power line;

preferably, the first type data lines and the second type data lines are alternately arranged; or the second type data lines are distributed on two sides of the first type data lines;

preferably, the pixel circuit of the first sub-pixel is a 2T1C circuit, or a 3T1C circuit, or a 3T2C circuit, or a 7T1C circuit, or a 7T2C circuit;

preferably, the plurality of pixel groups further include a fifth pixel group, the fifth pixel group includes a plurality of sub-pixels extending along the first direction, the fifth pixel group includes only a second sub-pixel, and the second sub-pixels in the same fifth pixel group are located on the same side of the first display area; and a plurality of third-type data lines are also arranged in the display area, and the pixel circuits of the second sub-pixels in each fifth-type pixel group are connected to the same third-type data line.

3. The display substrate according to claim 1, wherein when the second sub-pixels of the second type pixel group are arranged in regions on both sides of the first display region along a first direction, the second type data line includes a first segment, a second segment, and a third segment, the first segment and the second segment are respectively located on both sides of the first display region in the first direction, the third segment connects the first segment and the second segment, and the third segment is located in the first display region;

preferably, the light transmittance of the third segment is greater than or equal to 70%;

preferably, the material of the third segment includes at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide.

4. The display substrate according to claim 3, wherein the first segment and the second segment are disposed on the same layer, the first segment and the third segment are located on different layers, an insulating layer is disposed between the third segment and the first segment, a plurality of through holes are disposed on the insulating layer, and the first segment and the second segment are respectively connected to the third segment through corresponding through holes;

preferably, the first sub-pixel includes a first electrode, a first light emitting structure located on the first electrode, and a second electrode located on the first light emitting structure, the display substrate is further provided with a power line therein, the third segment and the first electrode are disposed on the same layer, and the first segment and the second segment and the power line are disposed on the same layer respectively;

preferably, the third segment surrounds part of the first electrode, the third segment includes a first sub-segment, a second sub-segment and a third sub-segment which are connected in sequence, the second sub-segment extends along the first direction, the first sub-segment and the third sub-segment extend along the second direction, the first sub-segment is connected with the first segment, and the third sub-segment is connected with the second segment;

preferably, the display substrate further includes a substrate, the first type data line, the second type data line and the power line are located above the substrate, and a projection of the first electrode on the substrate is within a projection of a portion of the power line located in the first display area on the substrate;

or the first section, the second section and the third section are positioned on the same layer, and the first section and the second section are respectively lapped with the third section;

preferably, the third segment is located in the same layer as a portion of the power line located in the first display region.

5. The display substrate according to claim 1, wherein when the second sub-pixels in the second type pixel group are arranged in regions on both sides of the first display region along a first direction, the second type data line includes a first segment, a second segment, and a third segment, the first segment and the second segment are respectively located on both sides of the first display region in the first direction, the third segment connects the first segment and the second segment, and the third segment surrounds a portion of the first display region;

preferably, the third segment includes a fourth sub-segment, a fifth sub-segment and a sixth sub-segment which are connected in sequence, the fourth sub-segment and the sixth sub-segment extend along the second direction, the fifth sub-segment extends along the first direction, the fourth sub-segment is connected with the first segment, and the sixth sub-segment is connected with the third segment;

preferably, the first section, the second section and the third section are arranged in the same layer;

preferably, the display substrate further includes a substrate, the first sub-pixel includes a first electrode, a first light emitting structure located on the first electrode, and a second electrode located on the first light emitting structure, a power line is further disposed in the display substrate, the first type data line, the second type data line, and the power line are located above the substrate, and a projection of the first electrode on the substrate falls within a projection of a portion of the power line located in the first display area on the substrate;

preferably, the display area further comprises a third display area located between the first display area and the second display area, and the third segment is disposed in the third display area;

preferably, no sub-pixels are arranged in the third display area;

preferably, a part of the pixel circuits of the first sub-pixels are disposed in the third display region.

6. The display substrate according to claim 1, wherein the sub-pixels in the display region are divided into a third pixel group and a fourth pixel group, the third pixel group and the fourth pixel group are arranged along the first direction, the third pixel group comprises a plurality of first sub-pixels and a plurality of second sub-pixels, the fourth pixel group comprises only a plurality of the second sub-pixels, and the plurality of sub-pixels in the third pixel group and the fourth pixel group are arranged at intervals along the second direction;

a first type light-emitting control line and a second type light-emitting control line are further arranged in the display area, pixel circuits of the first sub-pixels and the second sub-pixels in each third type pixel group are connected to the same first type light-emitting control line, and pixel circuits of the second sub-pixels in each fourth type pixel group are connected to the same second type light-emitting control line; the first type of light-emitting control line and the second type of light-emitting control line are used for providing light-emitting control signals for the sub-pixels;

preferably, the second sub-pixels in each of the third pixel groups are arranged in regions located at two sides of the first display region along the second direction, and/or the second sub-pixels in each of the fourth pixel groups are arranged in regions located at two sides of the first display region along the second direction; when the second sub-pixels in each of the fourth pixel groups are arranged in regions on two sides of the first display region along the second direction, the second light-emitting control line comprises a fourth segment, a fifth segment and a sixth segment, the fourth segment and the fifth segment are located in the second display region and on two sides of the first display region, and the sixth segment connects the fourth segment and the fifth segment;

preferably, the fourth section, the fifth section and the sixth section are located on the same layer, and the sixth section is respectively overlapped with the fourth section and the fifth section;

preferably, the sixth segment is located in the first display area, and the light transmittance of the sixth segment is greater than or equal to 70%;

preferably, the material of the sixth segment comprises at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide and silver-doped indium zinc oxide;

or, the sixth segment surrounds part of the first display area;

preferably, the display area further comprises a third display area located between the first display area and the second display area, and the sixth segment is disposed in the third display area;

preferably, no sub-pixels are disposed in the third display region.

7. The display substrate according to claim 1, wherein the sub-pixels in the display region are divided into a third pixel group and a fourth pixel group, the third pixel group and the fourth pixel group are arranged along the first direction, the third pixel group comprises a plurality of first sub-pixels and a plurality of second pixels, the fourth pixel group comprises only a plurality of second sub-pixels, and the plurality of sub-pixels in the third pixel group and the fourth pixel group are arranged at intervals along the second direction; the display area is internally provided with a first type scanning line and a second type scanning line, pixel circuits of each first sub-pixel and each second sub-pixel in each third type pixel group are connected to the same first type scanning line, and pixel circuits of each second sub-pixel in each fourth type pixel group are connected to the same second type scanning line; the first scanning lines and the second scanning lines are used for providing scanning signals for the sub-pixels;

preferably, the second sub-pixels in the third type of pixel group are arranged in the regions on both sides of the first display region along the second direction, and/or the second sub-pixels in each of the fourth type of pixel groups are arranged in the regions on both sides of the first display region along the second direction; when the second sub-pixels in each of the fourth pixel groups are arranged in regions on two sides of the first display area along the second direction, the second scan lines include a seventh segment, an eighth segment and a ninth segment, the seventh segment and the eighth segment are located in the second display area and on two sides of the first display area, and the ninth segment connects the seventh segment and the eighth segment;

preferably, the seventh section, the eighth section and the ninth section are located on the same layer, and the ninth section is respectively overlapped with the seventh section and the eighth section;

preferably, the ninth segment is located in the first display area, and the light transmittance of the ninth segment is greater than or equal to 70%;

preferably, the material of the ninth segment comprises at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide and silver-doped indium zinc oxide;

or, the ninth segment is arranged around part of the first display area;

preferably, the display area further comprises a third display area located between the first display area and the second display area, and the ninth segment is disposed in the third display area;

preferably, no sub-pixels are disposed in the third display region.

8. The display substrate according to claim 1, wherein the first sub-pixels comprise first electrodes, first light emitting structures on the first electrodes, and second electrodes on the first light emitting structures, and the first electrode corresponding to each of the first sub-pixels comprises at least one first electrode block;

preferably, when the first electrode corresponding to one of the first sub-pixels includes more than two first electrode blocks, the more than two first electrode blocks are arranged at intervals along the first direction, the first electrode further includes a connecting portion disposed between two adjacent first electrode blocks, and the two adjacent first electrode blocks are electrically connected through the corresponding connecting portions;

preferably, in the first electrode blocks corresponding to the first sub-pixels in the same first-type pixel group, two adjacent first electrode blocks are arranged in a staggered manner in a second direction, and the second direction is perpendicular to the first direction;

preferably, the display substrate includes a substrate, the first electrode block is located above the substrate, and a projection of the first electrode block on the substrate is composed of one first graphic unit or a plurality of first graphic units;

preferably, the first graphic unit comprises a circle, an ellipse, a dumbbell, a gourd or a rectangle;

preferably, the first light-emitting structure includes a light-emitting structure block correspondingly disposed on each of the first electrode blocks, a projection of the first light-emitting structure block on the substrate is composed of a second graphic unit or a plurality of second graphic units, and the second graphic unit is the same as or different from the first graphic unit;

the second graphic unit comprises a circle, an ellipse, a dumbbell, a gourd or a rectangle;

preferably, the light transmittance of the first electrode and/or the second electrode is greater than or equal to 70%;

preferably, the material of the first type data line, the portion of the first display region, the first electrode and/or the second electrode includes at least one of indium tin oxide, indium zinc oxide, silver-doped indium tin oxide, and silver-doped indium zinc oxide;

preferably, the first direction is a row direction, and the second direction is a column direction; or, the first direction is a column direction, and the second direction is a row direction.

9. A display panel comprising the display substrate according to any one of claims 1 to 8, and an encapsulation structure;

preferably, the polarizer does not cover the first display region;

10. A display device, comprising:

an apparatus body having a device region;

the display panel of claim 9, overlaid on the device body;

preferably, the photosensitive device comprises a camera and/or a light sensor.