CN110739985A

CN110739985A - HPLC high-speed power line carrier gain automatic adjustment technology

Info

Publication number: CN110739985A
Application number: CN201811358007.5A
Authority: CN
Inventors: 不公告发明人
Original assignee: Beijing Century Dejin Electric Power Technology Co Ltd
Current assignee: Beijing Century Dejin Electric Power Technology Co Ltd
Priority date: 2018-11-16
Filing date: 2018-11-16
Publication date: 2020-01-31

Abstract

The invention discloses high-speed power line carrier gain automatic adjustment technology for HPLC, which mainly comprises a frequency-variable gain adjustment circuit, a signal power detection circuit, gain adjustment approximation logic, an automatic gain amplifier which needs to be used in a chip receiving channel, a band-pass filter, a controllable gain amplifier and an analog-digital converter.

Description

HPLC high-speed power line carrier gain automatic adjustment technology

Technical Field

The invention relates to a power line carrier communication technology, in particular to a power line communication signal gain adjusting method, and specifically relates to HPLC high-speed power line carrier gain automatic adjusting technologies.

Background

Different from a common special communication Line, when the Power Line is used as a data transmission medium, a plurality of unpredictable noises and interferences exist, and the influence on digital Carrier communication is mainly channel noise, channel attenuation and multipath effect, the interference among symbols caused by the multipath effect can be effectively overcome by adopting an HPLC (high performance liquid chromatography) multi-Carrier technology, a good solution is provided for impedance change, and meanwhile, the signal transmission rate can be effectively improved, so that the Power Line Carrier communication technology is attractive Power Line Carrier communication technologies.

The signal of the HPLC multi-carrier technology has fixed frequency bandwidth, and the attenuation of the power line is different for different carrier frequencies, generally speaking, the higher the carrier frequency is, the more serious the attenuation is.

Disclosure of Invention

() problems to be solved

The invention provides high-speed power line carrier gain automatic adjustment technologies for HPLC, aiming at the channel attenuation characteristic of a power line pair signal, a frequency-dependent gain adjustment method is carried out on a received signal, so that the received signal is in low-frequency and high-frequency energy distribution , and the communication performance of an HPLC communication system is improved.

(II) technical scheme

HPLC high-speed power line carrier gain automatic adjustment technologies, for the power line to the signal channel attenuation characteristic, the invention frequency conversion gain adjustment method, this frequency conversion gain adjustment method is integrated in the HPLC power line carrier communication chip, the core circuit includes frequency conversion gain adjustment circuit, signal power detection circuit, gain adjustment approach logic, but also needs to use the HPLC chip existing automatic gain amplifier, band-pass filter, controllable gain amplifier, analog-to-digital converter.

, the frequency-variable gain adjusting circuit is realized by analog circuit, integrated in the receiving path of the HPLC communication chip, connected to the output end of the band-pass filter of the HPLC communication chip at the input end, and connected to the input end of the controllable gain amplifier of the HPLC communication chip at the output end, the frequency-variable gain adjusting circuit is kinds of controlled circuits, and can generate frequency-variable gain adjusting curves with different slopes according to the control signal.

, the signal power detection circuit is realized by digital circuit, integrated in the digital circuit of the HPLC communication chip, input connected with the ADC input end of the HPLC communication chip, output connected with the gain adjustment approximation logic, the signal power detection circuit can detect the signal power of different frequencies in the communication signal bandwidth and send the detection result to the gain adjustment approximation logic, , the gain adjustment approximation logic is realized by digital circuit, integrated with the digital circuit of the HPLC communication chip, input connected with the signal power detection circuit, output connected with the control end of the frequency-variable gain adjustment circuit, the gain adjustment approximation logic controls the change direction of the gain adjustment curve of the frequency-variable gain adjustment circuit according to the detection result of the signal power detection circuit until the most suitable gain adjustment effect is obtained.

(III) advantageous effects

The automatic adjustment technology of the invention has the following specific working processes and requirements: during chip communication, a calibration data packet is transmitted before valid data, the signal frequency of the calibration data packet covers the whole communication frequency band, and the signal power does not change along with the frequency. The calibration signal is attenuated by the power line channel, and the front end of the receiving chip has the characteristic that the higher the frequency is, the lower the signal power is. The signal power detection circuit and the gain adjustment approximation logic can adjust the compensation curve of the frequency-dependent gain adjustment circuit until the power of the signal obtained by the chip digital circuit is the same in the whole frequency band, at the moment, the circuit calibration is finished, the frequency-dependent gain adjustment circuit provides the most appropriate compensation curve, and the communication performance is improved.

Drawings

The invention is further illustrated in the following description with reference to the figures and examples.

Fig. 1 is a block diagram of a system for HPLC high speed power line carrier gain automatic adjustment techniques according to the present invention, which includes a receiving path of an HPLC communication chip;

fig. 2 is a schematic signal attenuation diagram of a power line communication channel;

FIG. 3 is a frequency-dependent gain adjustment curve of the frequency-dependent gain adjuster according to the present invention;

FIG. 4 is a circuit implementation of the frequency-dependent gain adjuster of the present invention;

fig. 5 is an automatic calibration process of the frequency-dependent automatic adjustment technique of the present invention.

Detailed description of the invention

The following detailed description provides a detailed description of an embodiment of the invention in conjunction with the drawings.

The system schematic diagram for HPLC high-speed power line carrier gain automatic adjustment techniques provided by the present invention is shown in fig. 1, and includes a core circuit module of the automatic adjustment technique and a signal receiving path of an HPLC communication chip, actually, the core circuit of the automatic adjustment technique is part of the chip signal receiving path, and has relatively independent functions, but the whole receiving path is required to work cooperatively in the working process.

As shown in fig. 1, the core circuit block of the automatic adjustment technology includes a frequency-dependent gain adjuster 03, a signal power detection circuit 07, and a gain adjustment approximation logic 08. Other circuits of the receiving path of the HPLC communication chip include an automatic gain Amplifier (AGC)01, a Band Pass Filter (BPF)02, a controllable gain amplifier (PGA)04, an analog-to-digital converter (ADC)05, and other digital circuits 06.

The signal receiving process of the HPLC communication chip is as follows: the signal enters AGC to pre-amplify, then is sent to BPF to filter out-of-band signal, then is sent to frequency conversion gain adjuster to adjust gain, then is sent to PGA to amplify, then is sent to ADC to convert into digital signal, the digital signal is sent to digital circuit to process various treatments. The calibration process of the automatic adjustment technology also depends on the signal receiving process, and the difference is that the compensation curve of the frequency-variable gain adjuster is adjusted by gain adjustment logic according to the detection result of the signal power detection circuit during calibration until the most appropriate compensation curve is obtained.

Fig. 2 shows that the frequency range of the signal of the HPLC communication chip is f1 to f2, the attenuation of the power line communication channel to the frequency f1 is a1, and the attenuation of the power line communication channel to the frequency f2 is a2, where a1< a 2., in order to ensure the reliability and stability of communication, the distance between f1 and f2 should not be too large, and the attenuation characteristic of the power line communication channel to the signal in the frequency range of f1 to f2 is approximately linear, which has a guiding significance of for the compensation curve characteristic of the frequency-varying gain regulator designed by the present invention.

The compensation curve of the frequency-varying gain regulator is shown in figure 3. the frequency-varying gain regulator designed by the invention has an adjustable function and can provide frequency compensation curves with different slopes, and the group of compensation curves is characterized in that the same compensation gain G1 is provided at the frequency f1, the gains are G1 and G2 … Gn at the frequency f2 respectively, and the following two constraints are satisfied, namely G1< G2< … < Gn (1)

Gn-G1>A2-A1(2)

The constraint (1) ensures that the frequency-dependent gain adjuster can generate groups of gain adjustment curves with different slopes, the slope of the th compensation curve is minimum zero, namely no compensation is provided, the slope of the nth compensation curve is maximum, and the maximum compensation can be provided, and the constraint (2) ensures that the maximum compensation range of the groups of compensation curves is larger than the attenuation difference of the power line communication channel to the signal, thereby ensuring that the situation of under-compensation does not occur.

The circuit of the frequency-variable gain adjuster is implemented as shown in fig. 4, the circuit includes two operational amplifiers OPA1 and OPA2, four resistors R1, R2, R3, R4, four capacitors C1, C2, C3, and C4, wherein resistor R3 is an adjustable resistor, capacitor C1, C2, and C3 is an adjustable capacitor, the whole of the above OPA1, R1, R2, C1, C2, and C3 constitutes a slope-adjustable compensation curve generating circuit, wherein the adjustable capacitors C1, C2, and C3 are used to adjust the slope of the compensation curve, i.e., adjust the size of Gi-G1(i ═ 2,3 … n), the above OPA1, R3, R4, and C4 together constitute a whole gain adjusting circuit, and the variable resistor R4 is used to adjust the whole gain level of the compensation curve, i.e., adjust the size of G4, C4, or any slope of the compensation curve 4, i.e., the compensation curve can be implemented by using the same as the slope-G4.

The control signal determination process is calibration processes, and the whole process is as shown in fig. 5, and is detailed as follows:

and , the chip receives the calibration signal package to start the calibration operation, and the chip can continuously receive the HPLC signal for calibration in the whole calibration process.

In the second step, the frequency-dependent gain adjuster gives the gain adjustment curves G1-G1 by default, i.e. the curves shown in fig. 3 have the frequency f1 compensation gain G1 and the frequency f2 compensation gain G1.

Third, the signal power detection circuit detects the signal strength S1, S2 at the frequencies f1, f2, and supplies the detection result to the gain adjustment approximation logic.

Fourthly, the gain adjustment approximating logic judges how the control signal of the frequency-dependent gain adjustment curve is changed, and if S1 is greater than S2, the gain adjustment approximating logic provides the control signal of the G1-G2 compensation curve.

And fifthly, repeating the processes of the third step and the fourth step until the signal strength S1 and S2 detected by the signal power detection circuit is equal, wherein the compensation curve of the frequency-variable gain adjuster is most suitable, and the calibration process is completed.

The above implementation methods are merely implementations of the present invention, and are not intended to limit the embodiments of the present invention, and those skilled in the art can easily make corresponding changes and modifications according to the main concept and technical principle of the present invention, so the protection scope of the present invention shall be subject to the protection scope claimed in the claims.

Claims

The automatic adjustment technology for the carrier gain of high-speed power line of HPLC (high performance liquid chromatography) comprises a frequency-variable gain adjustment circuit, a signal power detection circuit, gain adjustment approximation logic, an automatic gain amplifier used in a chip receiving channel, a band-pass filter, a controllable gain amplifier and an analog-to-digital converter.
2. The HPLC high-speed power line carrier gain automatic adjustment technology of claim 1, wherein the core functions of the technology are a frequency-dependent gain adjustment circuit, a signal power detection circuit and gain adjustment approximation logic, the frequency-dependent gain adjustment circuit is used to generate gain adjustment curves with different frequency-dependent characteristics, the signal power detection circuit is used to detect the signal power at different frequencies and send the detection result to the gain adjustment logic, and the gain adjustment approximation logic determines to control the frequency gain adjustment circuit according to the detection result obtained from the signal power detection circuit so as to adjust the gain adjustment curve to a more appropriate value.
3. The HPLC high-speed power line carrier gain automatic adjustment technology of claim 1, wherein the frequency-dependent gain adjustment circuit is implemented by an analog circuit, and the circuit mainly comprises an operational amplifier, a resistor, a capacitor, an adjustable resistor and an adjustable capacitor, wherein the operational amplifier, the resistor and the capacitor are used for generating a frequency-dependent gain adjustment curve, the adjustable resistor is used for adjusting the overall gain level of the frequency-dependent gain adjustment circuit, and the adjustable capacitor is used for adjusting the slope of the gain adjustment curve.
4. The HPLC high-speed power line carrier gain automatic adjustment technology of claim 1, wherein the signal power detection circuit is implemented by a digital circuit, the input signal of the signal power detection circuit is from an analog-to-digital converter of the power line carrier chip, the signal power detection circuit detects the signal power of different frequencies of the whole signal band, and sends the detection result to the gain adjustment approximation logic.
5. The HPLC high-speed power line carrier gain automatic adjustment technique of claim 1, wherein the gain adjustment approximation logic is implemented by a digital circuit, and the gain adjustment approximation logic determines to adjust the gain adjustment curve of the frequency-varying gain adjustment circuit according to the detection result of the signal power detection circuit, so as to achieve the best compensation effect.