CN110730490B - Low-power-consumption OOK data processing device, communication system and method - Google Patents
Low-power-consumption OOK data processing device, communication system and method Download PDFInfo
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- CN110730490B CN110730490B CN201911011205.9A CN201911011205A CN110730490B CN 110730490 B CN110730490 B CN 110730490B CN 201911011205 A CN201911011205 A CN 201911011205A CN 110730490 B CN110730490 B CN 110730490B
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- 238000004891 communication Methods 0.000 title claims abstract description 43
- 238000012545 processing Methods 0.000 title claims abstract description 31
- 238000000034 method Methods 0.000 title claims abstract description 21
- 230000002618 waking effect Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 25
- 238000002955 isolation Methods 0.000 claims description 15
- 230000005540 biological transmission Effects 0.000 claims description 7
- 238000003672 processing method Methods 0.000 claims description 3
- 230000001960 triggered effect Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- 238000007599 discharging Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0225—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal
- H04W52/0229—Power saving arrangements in terminal devices using monitoring of external events, e.g. the presence of a signal where the received signal is a wanted signal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
- H04L27/04—Modulator circuits; Transmitter circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/02—Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
- H04L27/06—Demodulator circuits; Receiver circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/023—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse amplitude modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B14/00—Transmission systems not characterised by the medium used for transmission
- H04B14/02—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation
- H04B14/026—Transmission systems not characterised by the medium used for transmission characterised by the use of pulse modulation using pulse time characteristics modulation, e.g. width, position, interval
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
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- Electronic Switches (AREA)
Abstract
The invention relates to a low-power-consumption OOK data processing device, a communication system and a method. Comprising the following steps: the OOK receiving module can be in communication connection with the OOK transmitting module, the wake-up control circuit is connected with the OOK receiving module, the wake-up control circuit is respectively connected with the wake-up circuit of the OOK receiving module and the wake-up circuit of the OOK receiving module, the processor is respectively connected with the wake-up circuit and the OOK receiving module, and the power supply circuit is respectively connected with the OOK receiving module, the wake-up control circuit, the wake-up circuit and the processor; the OOK receiving module is used for receiving OOK data which is sent by the OOK transmitting module and sequentially comprises a preamble level, preset frequency pulses and useful communication data; the wake-up control circuit is used for receiving the preamble level to generate a control level; the wake-up circuit is used for outputting a wake-up level when receiving the control level and the preset frequency pulse at the same time, and the processor is used for waking up to process useful communication data when receiving the wake-up level. By implementing the invention, the power consumption of the whole machine can be reduced.
Description
Technical Field
The present invention relates to the field of OOK data processing technology, and more particularly, to a low power OOK data processing apparatus, a communication system, and a method.
Background
Currently, battery-powered products are more and more used, and therefore, the power consumption requirements are also higher and higher. The OOK wireless module is widely used in wireless communication due to low cost. However, the OOK wireless module needs a single-chip microcomputer to decode received data, and in order to reduce power consumption, the single-chip microcomputer needs to be in standby sleep, and automatically wakes up at regular time to detect whether wireless communication data exists. The singlechip wakes up at fixed time, so that the power consumption is increased in a communication-free state.
Disclosure of Invention
The invention aims to solve the technical problem of providing a low-power-consumption OOK data processing device, a communication system and a method aiming at the defects of the prior art.
The technical scheme adopted for solving the technical problems is as follows: a low power OOK data processing apparatus is constructed, comprising: the OOK receiving module can be in communication connection with the OOK transmitting module, the wake-up control circuit is connected with the OOK receiving module, the wake-up circuits are respectively connected with the wake-up control circuit and the OOK receiving module, the processors are respectively connected with the wake-up circuits and the OOK receiving module, and the power supply circuits are respectively connected with the OOK receiving module, the wake-up control circuit, the wake-up circuits and the processors;
The OOK receiving module is used for receiving OOK data which is sent by the OOK transmitting module and sequentially comprises a lead code level, a preset frequency pulse and useful communication data; the wake-up control circuit is used for receiving the preamble level to generate a control level; the wake-up circuit is used for outputting a wake-up level when the control level and the preset frequency pulse are received simultaneously, and the processor is used for waking up to process the useful communication data when the wake-up level is received.
Preferably, the wake-up control circuit comprises a first switch unit, a first charging unit, a reference voltage unit and a comparison unit;
The first end and the second end of the first switch unit are respectively connected with the OOK receiving module, the second end of the first switch unit is connected with the first end of the first charging unit, and the third end of the first switch unit is connected with the second end of the first charging unit and grounded;
the reverse end of the comparison unit is connected with the reference voltage unit, the same-direction end of the comparison unit is connected with the first end of the first charging unit, and the output end of the comparison unit is connected with the wake-up circuit.
Preferably, the method comprises the steps of,
The first switch unit comprises a triode Q1; the base electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R5, the emitter electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R3, and the collector electrode of the triode Q1 is grounded; and/or
The first charging unit comprises a capacitor C1, a first end of the capacitor C1 is connected with the OOK wireless receiving module through a resistor R3, the first end of the capacitor C1 is also connected with the homodromous end of the comparing unit, and a second end of the capacitor C1 is grounded.
Preferably, the method comprises the steps of,
The wake-up circuit comprises a second switch unit and a phase-locking unit;
the first end of the second switch unit is connected with the wake-up control circuit, the second end of the second switch unit is connected with the power supply circuit, and the third end of the second switch unit is connected with the fourth pin of the phase-locked unit;
The third pin of the phase locking unit is connected with the OOK receiving module, the eighth pin of the phase locking unit is connected with the processor, and the eighth pin of the phase locking unit is also connected with the power supply circuit through a resistor R9.
Preferably, the second switching unit includes a first sub-switching unit and a second sub-switching unit;
The first end of the first sub-switch unit is connected with the wake-up control circuit, the second end of the first sub-switch unit is connected with the first end of the second sub-switch unit, and the third end of the first sub-switch unit is grounded;
The second end of the second sub-switch unit is connected with the power supply unit, and the third end of the second sub-switch unit is connected with the phase-locking unit.
Preferably, the first sub-switch unit includes a MOS transistor Q3 and a resistor R6;
The grid electrode of the MOS tube Q3 is connected with the wake-up control circuit through the resistor R6, the drain electrode of the MOS tube Q3 is connected with the second sub-switch unit, and the source electrode of the MOS tube Q3 is grounded; and/or
The second sub-switch unit comprises a MOS tube Q2 and a resistor R4;
The grid electrode of the MOS tube Q2 is connected with the first sub-switch unit, the grid electrode of the MOS tube Q2 is also connected with the power supply circuit through the resistor R4, the drain electrode of the MOS tube Q2 is connected with the power supply circuit, and the source electrode of the MOS tube Q2 is connected with the fourth pin of the phase locking unit.
Preferably, the method comprises the steps of,
The second switch unit further comprises an isolation unit, a second charging unit and a resistor R7;
The first end of the isolation unit is connected with the wake-up control circuit, the second end of the isolation unit is connected with the first end of the second charging unit, and the first end of the second charging unit is connected with the grid electrode of the MOS tube Q3 through the resistor R7.
Preferably, the isolation unit comprises a diode D1, the anode of the diode D1 is connected with the wake-up control circuit, and the cathode of the diode D1 is connected with the second charging unit; and/or
The second charging unit comprises an electrolytic capacitor EC1, the positive electrode of the electrolytic capacitor EC1 is connected with the isolation unit, and the negative electrode of the electrolytic capacitor EC1 is grounded.
The present invention also constructs a communication system including: the OOK transmitting module and the low power OOK data processing apparatus as defined in any one of the above;
the OOK transmitting module is used for sequentially containing the preamble level, the preset frequency pulse and OOK data of useful communication data.
The invention also constructs a low-power-consumption OOK data processing method, which adopts the communication system as described above, and comprises the following steps:
the OOK data sequentially comprising the preamble level, the preset frequency pulse and the useful communication data are transmitted through an OOK transmitting module;
The low-power-consumption OOK data processing device receives the OOK data transmitted by the OOK transmitting module and performs the following steps:
Generating a control level according to the preamble level;
Generating a wake-up level according to the control level and the preset frequency pulse;
And waking up a processor according to the wake-up level to process the useful communication data.
The low-power-consumption OOK data processing device, the communication system and the method have the following beneficial effects: the power consumption of the whole machine can be reduced.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a block diagram illustrating an embodiment of a low power OOK data processing apparatus according to the present invention;
FIG. 2 is a schematic spectrum diagram of an embodiment of OOK data according to the present invention;
FIG. 3 is a circuit block diagram of another embodiment of a low power OOK data processing apparatus according to the present invention;
FIG. 4 is a schematic circuit diagram of an embodiment of a low power OOK data processing apparatus according to the present invention;
Fig. 5 is a circuit block diagram of one embodiment of a communication system of the present invention.
Detailed Description
For a clearer understanding of technical features, objects and effects of the present invention, a detailed description of embodiments of the present invention will be made with reference to the accompanying drawings.
As shown in fig. 1, in an embodiment of a low power OOK data processing apparatus of the present invention, the apparatus includes: the OOK receiving module 210 can be in communication connection with the OOK transmitting module, the wake-up control circuit 230 is connected with the OOK receiving module 210, the wake-up control circuit 230 is respectively connected with the wake-up circuit 240 of the OOK receiving module 210, the processor 250 is respectively connected with the wake-up circuit 240 and the OOK receiving module 210, and the power supply circuit 220 is respectively connected with the OOK receiving module 210, the wake-up control circuit 230, the wake-up circuit 240 and the processor 250; the OOK receiving module 210 is configured to receive OOK data sent by the OOK transmitting module, which sequentially includes a preamble level, a preset frequency pulse, and useful communication data; wake-up control circuit 230 is configured to receive the preamble level to generate a control level; the wake-up circuit 240 is configured to output a wake-up level when the control level and the preset frequency pulse are received simultaneously, and the processor 250 is configured to wake-up to process useful communication data when the wake-up level is received. Specifically, in the OOK data transmitted by the OOK transmitting module, as shown in fig. 2, the transmit time sequentially includes a preamble, a preset frequency pulse and useful communication data, the OOK receiving module 210 receives the OOK data, where the preamble may generally be a high-low level meeting a certain rule, the wake-up control circuit 230 is connected to the OOK receiving module 210, after receiving the high-low level corresponding to the preamble, the wake-up control circuit 230 is triggered to output a control level, the wake-up circuit 240 is triggered to be powered on by the control level, the wake-up circuit 240 is connected to the OOK receiving module 210, after the wake-up circuit 240 is powered on, the wake-up circuit 240 is triggered to operate and output a wake-up level, and after the wake-up circuit 240 is connected to the OOK receiving module 210, the processor 250 is connected to the wake-up receiving module 210, the process of the received useful communication data is completed, where the wake-up control circuit 230 is triggered by the preamble level, the wake-up control circuit 230 is triggered to trigger the wake-up circuit 230, the wake-up circuit 240 is triggered to operate by the wake-up circuit 240, which can reduce the power consumption of unnecessary power consumption in the process of triggering data, and achieve the effect of reducing the unnecessary power consumption.
Optionally, as shown in fig. 3, in an embodiment, the wake-up control circuit 230 includes a first switching unit 231, a first charging unit 232, a reference voltage unit 234, and a comparing unit 233; the first end and the second end of the first switch unit 231 are respectively connected with the OOK receiving module 210, the second end of the first switch unit 231 is connected with the first end of the first charging unit 232, and the third end of the first switch unit 231 is connected with the second end of the first charging unit 232 and grounded; the reverse end of the comparing unit 233 is connected to the reference voltage unit 234, the same directional end of the comparing unit 233 is connected to the first end of the first charging unit 232, and the output end of the comparing unit 233 is connected to the wake-up circuit 240. Specifically, in an embodiment, the high-low level of the preamble sequentially includes a short low level and a long high level, in which the first end of the first switch unit 231 of the wake-up control circuit 230 is triggered to be turned on when receiving the low level, the first switch unit 231 and the first charge unit 232 form a charge-discharge loop, the first charge unit 232 is rapidly discharged, so that the output voltage of the first charge unit 232 is low, at this time, the output of the comparison unit 233 is low according to the low level and the output level of the reference voltage unit 234, when the output of the comparison unit 233 is low, the wake-up circuit 240 is not triggered to be powered up, and is in a non-working state, when the first end of the first switch unit 231 receives the high level, the high level is turned off, at this time, the first charge unit 232 is charged, at this time, the output of the comparison unit 233 is high level, and at the end of the preamble high level, the first charge unit 232 can maintain a certain time to maintain the high level, so that the wake-up circuit 240 is triggered to work by the high level maintenance.
Alternatively, as shown in fig. 4, in an embodiment, the first switching unit 231 includes a transistor Q1; the base electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R5, the emitter electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R3, and the collector electrode of the triode Q1 is grounded; specifically, the transistor Q1 may be used as the first switching unit 231, when the base of the transistor Q1 receives the low level sent by the OOK wireless receiving module, the transistor Q1 is in an on state, the emitter level of the transistor Q1 is pulled down to be in a low level state, when the base of the transistor Q1 receives the high level sent by the OOK wireless receiving module, the transistor Q1 is in an off state, and at this time, the emitter of the transistor Q1 is connected to the OOK wireless receiving module through the resistor R3, so that the transistor Q1 is maintained in the high level state, so that the comparing unit 233 outputs the high level. It is understood that the transistor Q1 may be replaced by other switching transistors having a switching function, or may be constructed by a plurality of switching transistors having other functions, and the switching function may be formed to form the first switching unit 231.
Optionally, as shown in fig. 3, in another embodiment, the first charging unit 232 includes a capacitor C1, a first end of the capacitor C1 is connected to the OOK wireless receiving module through a resistor R3, a first end of the capacitor C1 is further connected to a same directional end of the comparing unit 233, and a second end of the capacitor C1 is grounded. Specifically, in a simple circuit, the first charging unit 232 may adopt a capacitor C1, and the high level or the low level of the same directional end of the comparing unit 233 is input through the charging and discharging function of the capacitor C1, and in other embodiments, a more complex charging circuit may also be adopted to implement the charging and discharging function.
Optionally, as shown in fig. 3, in an embodiment, the wake-up circuit 240 includes a second switching unit 241 and a phase-locking unit 242; the first end of the second switch unit 241 is connected with the wake-up control circuit 230, the second end of the second switch unit 241 is connected with the power supply circuit 220, and the third end of the second switch unit 241 is connected with the fourth pin of the phase-locking unit 242; the third pin of the phase lock unit 242 is connected to the OOK receiving module 210, the eighth pin of the phase lock unit 242 is connected to the processor 250, and the eighth pin of the phase lock unit 242 is further connected to the power supply circuit 220 via the resistor R9. Specifically, in the default state, the second switch unit 241 is in an off state, which disconnects the power supply of the phase-locking unit 242, and the phase-locking unit 242 is in a non-working state without power-up. After the wake-up control circuit 230 operates to output a control level, the second switch unit 241 in the wake-up circuit 240 receives the control level output by the wake-up control circuit 230, and then controls the phase lock unit 242 to operate. It will be understood that in the above processing, taking the high level as an example, when the control level outputs the high level, the second switch unit 241 is turned on after receiving the high level, so that the phase-locking unit 242 is connected to the power supply circuit 220 via the second switch unit 241, and the phase-locking unit 242 is powered on, at this time, the phase-locking unit 242 starts to work, at this time, since the phase-locking unit 242 receives the preset frequency pulse from the OOK receiving module 210, and locks the preset frequency pulse, after locking, outputs the low level, i.e. the wake-up level, and wakes up the processor 250 to work through the low level. The phase locking unit 242 specifically sets the center frequency of the voltage controlled oscillator in the phase locking unit 242 by the resistor R10 and the capacitor C5 respectively connected to the fifth pin and the sixth pin, compares the center frequency with the preset frequency of the preset frequency pulse, and outputs a high level and a low level according to the comparison result, wherein the low level is output when the center frequency is equal to the preset frequency. At this time, even if the wake-up control circuit 230 outputs the control level to power up the phase-locked unit 242, the phase-locked unit 242 is not locked to the preset frequency, and the default high level is maintained, i.e. the wake-up level is not output, so that the processor 250 is not woken up, and the false triggering is avoided.
As shown in fig. 4, in an embodiment, the second switching unit 241 includes a first sub-switching unit 2411 and a second sub-switching unit 2412; a first end of the first sub-switch unit 2411 is connected to the wake-up control circuit 230, a second end of the first sub-switch unit 2411 is connected to a first end of the second sub-switch unit 2412, and a third end of the first sub-switch unit 2411 is grounded; a second terminal of the second sub-switching unit 2412 is connected to the power supply unit, and a third terminal of the second sub-switching unit 2412 is connected to the phase-locking unit 242. Specifically, the second switching unit 241 is controlled by two-stage switching, where the two-stage switching is a first sub-switching unit 2411 and a second sub-switching unit 2412, and the continuous control level is a high level, for example, when the wake-up control unit outputs the high level, the first sub-switching unit 2411 is turned on, and after the first sub-switching unit 2411 is turned on, the second sub-switching unit 2412 is triggered to be turned on, and at this time, the power supply unit may power up the phase-locking unit 242 through the second sub-switching unit 2412.
Optionally, as shown in fig. 4, in an embodiment, the first sub-switching unit 2411 includes a MOS transistor Q3 and a resistor R6; the grid electrode of the MOS tube Q3 is connected with the wake-up control circuit 230 through a resistor R6, the drain electrode of the MOS tube Q3 is connected with the second sub-switch unit 2412, and the source electrode of the MOS tube Q3 is grounded; specifically, taking the control level as the high level as an example, the gate input of the MOS transistor Q3 is turned on at the high level, the drain level of the MOS transistor Q3 is pulled down to the low level, and the second sub-switching unit 2412 is turned on at the low level. In the default state, the gate of the MOS transistor Q3 is at a low level, and the MOS transistor Q3 is in an off state, so that the second sub-switch unit 2412 is in a high level off state. The MOS transistor Q3 may be replaced by another switching transistor, and in some embodiments, the resistor R6 may be removed.
Optionally, as shown in fig. 4, in another embodiment, the second sub-switching unit 2412 includes a MOS transistor Q2 and a resistor R4; the gate of the MOS transistor Q2 is connected with the first sub-switch unit 2411, the gate of the MOS transistor Q2 is also connected with the power supply circuit 220 through the resistor R4, the drain of the MOS transistor Q2 is connected with the power supply circuit 220, and the source of the MOS transistor Q2 is connected with the fourth pin of the phase locking unit 242. Specifically, when the first sub-switching unit 2411 is in the off state, the gate of the MOS transistor Q2 is connected to the power supply circuit 220 through the resistor R4 and is pulled up to be in the high level, the MOS transistor Q2 is in the off state, the phase-locking unit 242 is not powered on, and when the first sub-switching unit 2411 is in the on state, the gate of the MOS transistor Q2 is grounded through the first sub-switching unit 2411 and is pulled down to be in the low level, and at this time, the MOS transistor Q2 is in the on state, and the phase-locking unit 242 is powered on. In some embodiments, the MOS transistor Q2 may be replaced with another switching transistor.
Optionally, the second switching unit 241 further includes an isolating unit 2413, a second charging unit 2414, and a resistor R7; the first end of the isolation unit 2413 is connected to the wake-up control circuit 230, the second end of the isolation unit 2413 is connected to the first end of the second charging unit 2414, and the first end of the second charging unit 2414 is connected to the gate of the MOS transistor Q3 through a resistor R7. Specifically, when the wake-up control circuit 230 outputs a high level, the second charging unit 2414 is charged, so that in order to maintain the MOS transistor Q3 in the on state for a long time, the on time of the MOS transistor Q3 meets the data processing time requirement, and after the high level output by the wake-up control circuit 230 is ended, the second charging unit 2414 may discharge, so that the MOS transistor Q2 is maintained in the on state. Meanwhile, the second charging unit 2414 is isolated from the wake-up control circuit 230 through the isolating unit 2413 to prevent the discharge of the second charging unit 2414 from returning to the output terminal of the wake-up control circuit 230.
Optionally, the isolating unit 2413 includes a diode D1, where an anode of the diode D1 is connected to the wake-up control circuit 230, and a cathode of the diode D1 is connected to the second charging unit 2414; specifically, the isolation unit 2413 may implement forward conduction and reverse isolation of the wake-up control circuit 230 from the second charging unit 2414 using the diode D1.
Optionally, the second charging unit 2414 includes an electrolytic capacitor EC1, an anode of the electrolytic capacitor EC1 is connected to the isolation unit 2413, and a cathode of the electrolytic capacitor EC1 is grounded. Specifically, the second charging unit 2414 may use the electrolytic capacitor EC1 to realize charging to provide a preset high level voltage for a certain time.
Further, as shown in fig. 5, a communication system of the present invention includes: OOK transmission module 100 and low power OOK data processing apparatus 200 as in any of the above; the OOK transmitting module 100 is configured to sequentially include a preamble level, a preset frequency pulse, and OOK data of useful communication data. Specifically, in the communication system, the OOK transmitting module 100 is disposed at the transmitting end, the low-power OOK data processing apparatus 200 described above is disposed at the receiving end, the OOK data transmitted by the OOK transmitting module 100 at the transmitting end is received by the receiving end, wherein the OOK data sequentially includes the preamble level, the preset frequency pulse and the OOK data of the useful communication data, and the OOK data is processed by the low-power OOK data processing apparatus 200 described above.
In addition, a low-power OOK data processing method of the present invention, which adopts the communication system as described above, includes:
transmitting OOK data sequentially including a preamble level, a preset frequency pulse, and useful communication data through the OOK transmission module 100;
The low power OOK data processing apparatus 200 receives OOK data transmitted by the OOK transmitting module 100 and performs the following steps:
Generating a control level according to the preamble level;
Generating a wake-up level according to the control level and the preset frequency pulse;
the processor is awakened to process the useful communication data in accordance with the wake-up level.
Specifically, in the above-described communication system, low-power-consumption OOK data processing is implemented, where the OOK data including a preamble level, a preset frequency pulse, and useful communication data in order is sent through an OOK transmission module of a transmission end, and after receiving the OOK data, a working circuit of the reception end generates a control level according to the preamble level, and after acquiring the control level, generates a wake-up level according to the control level and the preset frequency pulse, and wakes up a processor through wake-up radio frequency to process the useful communication data. For specific procedures, reference may be made to the above circuit operation.
It is to be understood that the above examples only represent preferred embodiments of the present invention, which are described in more detail and are not to be construed as limiting the scope of the invention; it should be noted that, for a person skilled in the art, the above technical features can be freely combined, and several variations and modifications can be made without departing from the scope of the invention; therefore, all changes and modifications that come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Claims (10)
1. A low power OOK data processing apparatus, comprising: the OOK receiving module can be in communication connection with the OOK transmitting module, the wake-up control circuit is connected with the OOK receiving module, the wake-up circuits are respectively connected with the wake-up control circuit and the OOK receiving module, the processors are respectively connected with the wake-up circuits and the OOK receiving module, and the power supply circuits are respectively connected with the OOK receiving module, the wake-up control circuit, the wake-up circuits and the processors;
the OOK receiving module is used for receiving the OOK data sent by the OOK transmitting module, and the OOK data sequentially comprises a preamble level, a preset frequency pulse and useful communication data according to the sending time sequence; the wake-up control circuit is used for receiving the preamble level to generate a control level; the wake-up circuit is used for outputting a wake-up level when the control level and the preset frequency pulse are received simultaneously, and the processor is used for waking up to process the useful communication data when the wake-up level is received.
2. The low power OOK data processing apparatus of claim 1, wherein the wake-up control circuit includes a first switching unit, a first charging unit, a reference voltage unit and a comparing unit;
The first end and the second end of the first switch unit are respectively connected with the OOK receiving module, the second end of the first switch unit is connected with the first end of the first charging unit, and the third end of the first switch unit is connected with the second end of the first charging unit and grounded;
the reverse end of the comparison unit is connected with the reference voltage unit, the same-direction end of the comparison unit is connected with the first end of the first charging unit, and the output end of the comparison unit is connected with the wake-up circuit.
3. The low power OOK data processing apparatus of claim 2, wherein,
The first switch unit comprises a triode Q1; the base electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R5, the emitter electrode of the triode Q1 is connected with the OOK wireless receiving module through a resistor R3, and the collector electrode of the triode Q1 is grounded; and/or
The first charging unit comprises a capacitor C1, a first end of the capacitor C1 is connected with the OOK wireless receiving module through a resistor R3, the first end of the capacitor C1 is also connected with the homodromous end of the comparing unit, and a second end of the capacitor C1 is grounded.
4. The low power OOK data processing apparatus of claim 1, wherein,
The wake-up circuit comprises a second switch unit and a phase-locking unit;
the first end of the second switch unit is connected with the wake-up control circuit, the second end of the second switch unit is connected with the power supply circuit, and the third end of the second switch unit is connected with the fourth pin of the phase-locked unit;
The third pin of the phase locking unit is connected with the OOK receiving module, the eighth pin of the phase locking unit is connected with the processor, and the eighth pin of the phase locking unit is also connected with the power supply circuit through a resistor R9.
5. The low power OOK data processing apparatus of claim 4, wherein the second switching unit includes a first sub-switching unit and a second sub-switching unit;
The first end of the first sub-switch unit is connected with the wake-up control circuit, the second end of the first sub-switch unit is connected with the first end of the second sub-switch unit, and the third end of the first sub-switch unit is grounded;
The second end of the second sub-switch unit is connected with the power supply unit, and the third end of the second sub-switch unit is connected with the phase-locking unit.
6. The low power OOK data processing apparatus of claim 5, wherein the first sub-switch unit includes a MOS transistor Q3 and a resistor R6;
The grid electrode of the MOS tube Q3 is connected with the wake-up control circuit through the resistor R6, the drain electrode of the MOS tube Q3 is connected with the second sub-switch unit, and the source electrode of the MOS tube Q3 is grounded; and/or
The second sub-switch unit comprises a MOS tube Q2 and a resistor R4;
The grid electrode of the MOS tube Q2 is connected with the first sub-switch unit, the grid electrode of the MOS tube Q2 is also connected with the power supply circuit through the resistor R4, the drain electrode of the MOS tube Q2 is connected with the power supply circuit, and the source electrode of the MOS tube Q2 is connected with the fourth pin of the phase locking unit.
7. The low power OOK data processing apparatus of claim 6, wherein,
The second switch unit further comprises an isolation unit, a second charging unit and a resistor R7;
The first end of the isolation unit is connected with the wake-up control circuit, the second end of the isolation unit is connected with the first end of the second charging unit, and the first end of the second charging unit is connected with the grid electrode of the MOS tube Q3 through the resistor R7.
8. The low power OOK data processing apparatus of claim 7, wherein the isolation unit includes a diode D1, an anode of the diode D1 is connected to the wake-up control circuit, and a cathode of the diode D1 is connected to the second charging unit; and/or
The second charging unit comprises an electrolytic capacitor EC1, the positive electrode of the electrolytic capacitor EC1 is connected with the isolation unit, and the negative electrode of the electrolytic capacitor EC1 is grounded.
9. A communication system, comprising: OOK transmission module and low power OOK data processing device according to any one of claims 1-8;
the OOK transmitting module is used for transmitting OOK data, and the OOK data sequentially comprises a lead code level, preset frequency pulses and useful communication data according to the sequence of transmission time.
10. A low power OOK data processing method, employing a communication system according to claim 9, said method comprising:
The OOK data are transmitted through an OOK transmitting module, and the OOK data sequentially comprise a preamble level, preset frequency pulses and useful communication data according to the transmission time sequence;
The low-power-consumption OOK data processing device receives the OOK data transmitted by the OOK transmitting module and performs the following steps:
Generating a control level according to the preamble level;
Generating a wake-up level according to the control level and the preset frequency pulse;
And waking up a processor according to the wake-up level to process the useful communication data.
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