CN110730006A - LDPC code error correction method and error correction module for MCU - Google Patents
LDPC code error correction method and error correction module for MCU Download PDFInfo
- Publication number
- CN110730006A CN110730006A CN201911023084.XA CN201911023084A CN110730006A CN 110730006 A CN110730006 A CN 110730006A CN 201911023084 A CN201911023084 A CN 201911023084A CN 110730006 A CN110730006 A CN 110730006A
- Authority
- CN
- China
- Prior art keywords
- matrix
- ldpc
- code
- error correction
- code word
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/1177—Regular LDPC codes with parity-check matrices wherein all rows and columns have the same row weight and column weight, respectively
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Abstract
The invention provides an LDPC code error correction method for MCU, which is characterized in that: the method comprises the following steps: s1, constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G; s2, inputting an information sequence X with the length of k; based on the generated matrix G, coding the information sequence X to obtain a code word Y; the code word Y is coded into code word information and transmitted outwards; s3, receiving code word information to obtain a code word Y' with noise; the noisy codeword Y' is directly decoded into codeword X using a deep learning decoding method. The method has stronger error correction capability, enables the MCU to have higher reliability, and reduces the iteration times and complexity of decoding. The invention also provides an error correction module for realizing the LDPC code error correction method.
Description
Technical Field
The present invention relates to the field of electronic communications technologies, and in particular, to an error correction method and an error correction module for an LDPC code of an MCU.
Background
A Micro Control Unit (MCU), also called a Single chip microcomputer (Single chip microcomputer) or a Single chip microcomputer (Single chip microcomputer), is a chip-level computer formed by appropriately reducing the frequency and specification of a Central Processing Unit (CPU), and integrating peripheral interfaces such as a memory, a counter (Timer), a USB, an a/D converter, and even an LCD driving circuit on a Single chip. In order to improve the reliability of communication, an Error Correction Code (ECC) module is equipped inside the MCU, and a hamming code and a BCH code are used in the conventional ECC module to correct errors. With the continued development of MCUs, people are using MCUs for a variety of new and more complex computational tasks; however, hamming codes and BCH codes have limited error correction capability and cannot satisfy more complex computational tasks and more huge data traffic.
The Low Density Parity Check Code (LDPC) is a good Code with performance approaching to Shannon limit, and is an ideal scheme for replacing Hamming codes and BCH codes due to the advantages of strong error correction capability, Low decoding complexity and the like, but the application of the LDPC Code in the technical field of MCU is still blank.
Disclosure of Invention
To overcome the disadvantages and shortcomings of the prior art, an object of the present invention is to provide an error correction method for an LDPC code of an MCU; the method has stronger error correction capability, enables the MCU to have higher reliability, and reduces the iteration times and complexity of decoding. Another objective of the present invention is to provide an error correction module of LDPC code, which has strong error correction capability and high reliability and can reduce the number of decoding iterations and complexity.
In order to achieve the purpose, the invention is realized by the following technical scheme: an error correction method of LDPC code for MCU is characterized in that: the method comprises the following steps:
s1, constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G;
s2, inputting an information sequence X with the length of k; based on the generated matrix G, coding the information sequence X to obtain a code word Y; the code word Y is coded into code word information and transmitted outwards;
s3, receiving code word information to obtain a code word Y' with noise; the noisy codeword Y' is directly decoded into codeword X using a deep learning decoding method.
Preferably, in the step S1, the construction method of the check matrix H is: setting the LDPC code length as n, the check bit length as m and the code rate as R ═ k/n; and constructing a check matrix H by using a maykay construction method.
Preferably, in the step S1, the generating matrix G is obtained by converting the check matrix H, which means: the right half H of the check matrix H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
Preferably, in step S2, based on the generator matrix G, the information sequence X is multiplied by the generator matrix G to obtain a codeword Y with length n:
Y=X×G。
preferably, in step S3, directly decoding the noisy codeword Y' into the codeword X by using a deep learning decoding method, where the method includes: the method comprises the following steps:
and S31, constructing a deep learning model: setting the dimension of an input layer, the number of layers of a hidden layer, the number of neurons of each layer of network and the number of neurons of an output layer of the model by adopting a DNN model, adding an activation function to the output part of the hidden layer, and setting a loss function of the model;
and step S32, training a model: constructing a data set, wherein the data set comprises a plurality of groups of code words Y' with noise, and a label is an information sequence X of an original code word; dividing a data set into a training set and a verification set according to a set proportion; inputting the training set into the DNN model, updating parameters of the model through a back propagation algorithm to enable a loss function to be converged, stopping training when the accuracy of the verification set and the loss function tend to be stable, and storing the model;
and step S33, using the stored model as an error correction model, and decoding the noisy code word Y' into the code word X after passing through the error correction model.
An LDPC code error correction module for implementing the LDPC code error correction method for an MCU is characterized in that: the method comprises the following steps:
the LDPC matrix storage module is used for constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G;
the LDPC encoding module is used for encoding the information sequence X with the length of k to obtain a code word Y based on the generator matrix G;
and the LDPC decoding module is used for receiving the code word Y 'with noise and directly decoding the code word Y' with noise into the code word X by using a deep learning decoding method.
Preferably, in the LDPC matrix storage module, a LDPC code length is set to be n, a check bit length is set to be m, and a code rate is set to be R ═ k/n; and constructing a check matrix H by using a maykay construction method.
Preferably, in the LDPC matrix storage module, the generating matrix G obtained by converting the check matrix H is: the right half H of the check matrix H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
Preferably, in the LDPC encoding module, based on the generator matrix G, the information sequence X is multiplied by the generator matrix G to obtain a codeword Y with a length n:
Y=X×G。
compared with the prior art, the invention has the following advantages and beneficial effects:
1. compared with the traditional mode that Hamming codes and BCH codes are adopted, the invention uses LDPC codes as error control codes, has stronger error correction capability under the condition of the same code length and code rate, and ensures that the MCU has higher reliability;
2. the invention uses deep neural network decoding, compared with the traditional BP iterative decoding, the performance of the LDPC is further improved, and the iteration times and complexity of decoding are reduced.
Drawings
FIG. 1 is a flow chart of the LDPC code error correction method for MCU of the present invention;
FIG. 2 is a block diagram of an LDPC code error correction module for an MCU according to the present invention;
FIG. 3 is a diagram of a deep neural network structure of an LDPC code in an embodiment;
FIG. 4 is a graph comparing the performance of LDPC codes with conventional BCH codes in the embodiments.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Example one
The flow of the LDPC code error correction method for an MCU in this embodiment is shown in fig. 1, and includes the following steps:
and S1, constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generator matrix G, and storing the check matrix H and the generator matrix G.
Specifically, the length of an LDPC code is set to be n, the length of an information sequence X to be input is k, the length of a check bit is m, and a code rate is R ═ k/n; and constructing a check matrix H by using a maykay construction method.
Converting the check matrix H to obtain a generator matrix G, which means: the right half H of the check matrix H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
S2, inputting an information sequence X with the length of k; based on the generated matrix G, coding the information sequence X to obtain a code word Y; and coding the code word Y into code word information and transmitting the code word information outwards.
Specifically, based on the generator matrix G, multiplying the information sequence X by the generator matrix G to obtain a codeword Y of length n:
Y=X×G。
s3, receiving code word information to obtain a code word Y' with noise; the noisy codeword Y' is directly decoded into codeword X using a deep learning decoding method.
Specifically, the deep learning decoding method is used to directly decode the noisy codeword Y' into the codeword X, which means that: the method comprises the following steps:
and S31, constructing a deep learning model: setting the dimension of an input layer, the number of layers of a hidden layer, the number of neurons of each layer of network and the number of neurons of an output layer of the model by adopting a DNN model, adding an activation function to the output part of the hidden layer, and setting a loss function of the model;
and step S32, training a model: constructing a data set, wherein the data set comprises a plurality of groups of code words Y' with noise, and a label is an information sequence X of an original code word; dividing a data set into a training set and a verification set according to a set proportion; inputting the training set into the DNN model, updating parameters of the model through a back propagation algorithm to enable a loss function to be converged, stopping training when the accuracy of the verification set and the loss function tend to be stable, and storing the model;
and step S33, using the stored model as an error correction model, and decoding the noisy code word Y' into the code word X after passing through the error correction model.
Compared with the traditional mode that Hamming codes and BCH codes are adopted, the invention uses LDPC codes as error control codes, has stronger error correction capability under the condition of the same code length and code rate, and ensures that the MCU has higher reliability; the invention uses deep neural network decoding, compared with the traditional BP iterative decoding, the performance of the LDPC is further improved, and the iteration times and complexity of decoding are reduced.
In order to implement the LDPC code error correction method, this embodiment provides an LDPC code error correction module, whose structure is shown in fig. 2, and includes:
the LDPC matrix storage module is used for constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G;
the LDPC encoding module is used for encoding the information sequence X with the length of k to obtain a code word Y based on the generator matrix G;
and the LDPC decoding module is used for receiving the code word Y 'with noise and directly decoding the code word Y' with noise into the code word X by using a deep learning decoding method.
Specifically, in the LDPC matrix storage module, a length of an LDPC code is set to be n, a length of a check bit is set to be m, and a code rate is set to be R ═ k/n; and constructing a check matrix H by using a maykay construction method.
In the LDPC matrix storage module, the generating matrix G obtained by converting the check matrix H is: the right half H of the check matrix H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
In the LDPC coding module, based on a generator matrix G, multiplying an information sequence X by the generator matrix G to obtain a code word Y with the length of n:
Y=X×G。
example two
This embodiment will be described by taking an LDPC code with a code rate of 7/15 as an example. An error correction method of LDPC code for MCU includes the following steps:
step S1, setting LDPC code length n as 15 bits, length k of information sequence X to be input as 7 bits, check bit length m as 8 bits, and code rate R as 7/15; and constructing the LDPC check matrix H by using a maykay construction method according to the code length and the code rate, wherein the dimension is 8 multiplied by 15.
The check matrix H is converted to a corresponding generator matrix G, which is 7 × 15 in dimension.
S2, multiplying the information sequence X with the length of 7 before coding by the LDPC code generating matrix G to obtain a code word Y with the length of 15 after coding; and coding the code word Y into code word information and transmitting the code word information outwards.
S3, receiving code word information to obtain a code word Y' with noise; the codeword Y' is directly decoded into codeword X using a deep learning decoding method. The method comprises the following steps:
and S31, constructing a deep learning model: by adopting a DNN model, the dimension of an input layer of the model is set to be 15, the number of hidden layers is set to be 3, the number of neurons of each layer of network is respectively 2048, 1024 and 1024, the number of neurons of an output layer is set to be 128, and the model structure is shown in FIG. 3. Adding an activation function as a ReLU function at the output part of the hidden layer, and setting a loss function of the model as a cross entropy;
and step S32, training a model: constructing a data set, wherein the data set comprises a plurality of groups of code words Y' with noise, and a label is an information sequence X of an original code word; dividing a data set into a training set and a verification set according to a ratio of 7: 3; inputting the training set into the DNN model, updating parameters of the model through a back propagation algorithm to enable a loss function to be converged, stopping training when the accuracy of the verification set and the loss function tend to be stable, and storing the model;
and S33, taking the stored model as an error correction model, decoding the noisy code word Y' into a code word X after passing through the error correction model, and finishing decoding.
The above embodiments are preferred embodiments of the present invention, but the present invention is not limited to the above embodiments, and any other changes, modifications, substitutions, combinations, and simplifications which do not depart from the spirit and principle of the present invention should be construed as equivalents thereof, and all such changes, modifications, substitutions, combinations, and simplifications are intended to be included in the scope of the present invention.
Claims (9)
1. An error correction method of LDPC code for MCU is characterized in that: the method comprises the following steps:
s1, constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G;
s2, inputting an information sequence X with the length of k; based on the generated matrix G, coding the information sequence X to obtain a code word Y; the code word Y is coded into code word information and transmitted outwards;
s3, receiving code word information to obtain a code word Y' with noise; the noisy codeword Y' is directly decoded into codeword X using a deep learning decoding method.
2. The error correction method of the LDPC code for MCU according to claim 1, wherein: in the step S1, the construction method of the check matrix H is: setting the LDPC code length as n, the check bit length as m and the code rate as R ═ k/n; and constructing a check matrix H by using a maykay construction method.
3. The error correction method of the LDPC code for MCU according to claim 2, wherein: in the step S1, the check matrix H is converted to obtain a generator matrix G, which means: the right half H of the check matrix H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
4. The error correction method of the LDPC code for MCU according to claim 3, wherein: in the step S2, based on the generator matrix G, multiplying the information sequence X by the generator matrix G to obtain a codeword Y with a length n:
Y=X×G。
5. the LDPC code error correction method for an MCU according to claim 4, wherein: in the step S3, directly decoding the noisy codeword Y' into the codeword X by using a deep learning decoding method, which means: the method comprises the following steps:
and S31, constructing a deep learning model: setting the dimension of an input layer, the number of layers of a hidden layer, the number of neurons of each layer of network and the number of neurons of an output layer of the model by adopting a DNN model, adding an activation function to the output part of the hidden layer, and setting a loss function of the model;
and step S32, training a model: constructing a data set, wherein the data set comprises a plurality of groups of code words Y' with noise, and a label is an information sequence X of an original code word; dividing a data set into a training set and a verification set according to a set proportion; inputting the training set into the DNN model, updating parameters of the model through a back propagation algorithm to enable a loss function to be converged, stopping training when the accuracy of the verification set and the loss function tend to be stable, and storing the model;
and step S33, using the stored model as an error correction model, and decoding the noisy code word Y' into the code word X after passing through the error correction model.
6. An LDPC code error correction module that implements the LDPC code error correction method for an MCU of claim 1, characterized by: the method comprises the following steps:
the LDPC matrix storage module is used for constructing a check matrix H of the LDPC according to the set LDPC code length and code rate, converting the check matrix H to obtain a generating matrix G, and storing the check matrix H and the generating matrix G;
the LDPC encoding module is used for encoding the information sequence X with the length of k to obtain a code word Y based on the generator matrix G;
and the LDPC decoding module is used for receiving the code word Y 'with noise and directly decoding the code word Y' with noise into the code word X by using a deep learning decoding method.
7. The LDPC code error correction module for an MCU of claim 6, wherein: in the LDPC matrix storage module, the LDPC code length is set to be n, the check bit length is set to be m, and the code rate is R-k/n; and constructing a check matrix H by using a maykay construction method.
8. The LDPC code error correction module for an MCU of claim 7, wherein: in the LDPC matrix storage module, the generating matrix G obtained by converting the check matrix H is: checking the matrixRight half H of H2Inverting and multiplying by the left half H of the check matrix H1To obtain the right half G of the generator matrix G2(ii) a Generating the left half G of the matrix G1Set as an identity matrix I of size k × k:
the size of the generator matrix G is k × n.
9. The LDPC code error correction module for MCU of claim 8, wherein: in the LDPC coding module, based on a generator matrix G, multiplying an information sequence X by the generator matrix G to obtain a code word Y with the length of n:
Y=X×G。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911023084.XA CN110730006B (en) | 2019-10-25 | 2019-10-25 | LDPC code error correction method and error correction module for MCU |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911023084.XA CN110730006B (en) | 2019-10-25 | 2019-10-25 | LDPC code error correction method and error correction module for MCU |
Publications (2)
Publication Number | Publication Date |
---|---|
CN110730006A true CN110730006A (en) | 2020-01-24 |
CN110730006B CN110730006B (en) | 2023-06-16 |
Family
ID=69223127
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911023084.XA Active CN110730006B (en) | 2019-10-25 | 2019-10-25 | LDPC code error correction method and error correction module for MCU |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110730006B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022083400A1 (en) * | 2020-10-20 | 2022-04-28 | 华为技术有限公司 | Decoding method and apparatus |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140317477A1 (en) * | 2011-12-30 | 2014-10-23 | Huawei Technologies Co., Ltd. | Coding and Decoding Method, Apparatus, and System for Forward Error Correction |
US20160344412A1 (en) * | 2015-05-19 | 2016-11-24 | Samsung Electronics Co., Ltd. | Method and apparatus for encoding and decoding low density parity check codes |
CN106571831A (en) * | 2016-10-28 | 2017-04-19 | 华南理工大学 | LDPC hard decision decoding method based on depth learning and decoder |
CN109361404A (en) * | 2018-09-28 | 2019-02-19 | 华南理工大学 | A kind of LDPC decoding system and interpretation method based on semi-supervised deep learning network |
CN109547032A (en) * | 2018-10-12 | 2019-03-29 | 华南理工大学 | A kind of confidence spread LDPC interpretation method based on deep learning |
-
2019
- 2019-10-25 CN CN201911023084.XA patent/CN110730006B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140317477A1 (en) * | 2011-12-30 | 2014-10-23 | Huawei Technologies Co., Ltd. | Coding and Decoding Method, Apparatus, and System for Forward Error Correction |
US20160344412A1 (en) * | 2015-05-19 | 2016-11-24 | Samsung Electronics Co., Ltd. | Method and apparatus for encoding and decoding low density parity check codes |
CN106571831A (en) * | 2016-10-28 | 2017-04-19 | 华南理工大学 | LDPC hard decision decoding method based on depth learning and decoder |
CN109361404A (en) * | 2018-09-28 | 2019-02-19 | 华南理工大学 | A kind of LDPC decoding system and interpretation method based on semi-supervised deep learning network |
CN109547032A (en) * | 2018-10-12 | 2019-03-29 | 华南理工大学 | A kind of confidence spread LDPC interpretation method based on deep learning |
Non-Patent Citations (2)
Title |
---|
梅艳;张跃进;展爱云;: "基于FEC的LDPC编码在远距离光通信系统中的研究" * |
马慧;吴彦鸿;王宏艳;: "低复杂度LDPC优化译码算法研究" * |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2022083400A1 (en) * | 2020-10-20 | 2022-04-28 | 华为技术有限公司 | Decoding method and apparatus |
Also Published As
Publication number | Publication date |
---|---|
CN110730006B (en) | 2023-06-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Dutta et al. | A unified coded deep neural network training strategy based on generalized polydot codes | |
CN103888148B (en) | A kind of LDPC code Hard decision decoding method of dynamic threshold bit reversal | |
US20230208449A1 (en) | Neural networks and systems for decoding encoded data | |
CN102164025B (en) | Coder based on repeated coding and channel polarization and coding/decoding method thereof | |
CN101958720B (en) | Encoding and decoding methods for shortening Turbo product code | |
CN107026656B (en) | CRC-assisted medium-short code length Polar code effective decoding method based on disturbance | |
CN105207682B (en) | Polarization code belief propagation interpretation method based on dynamic check matrix | |
US9337955B2 (en) | Power-optimized decoding of linear codes | |
CN105763203B (en) | Multi-element LDPC code decoding method based on hard reliability information | |
CN100592639C (en) | Low density parity check coding method, device and parity check matrix generating method | |
CN111541517B (en) | List polarization code propagation decoding method | |
CN108462496B (en) | LDPC decoder based on random bit stream updating | |
CN115664899A (en) | Channel decoding method and system based on graph neural network | |
WO2019096184A1 (en) | Method and device for decoding staircase code, and storage medium | |
Chandra et al. | Universal decoding of quantum stabilizer codes via classical guesswork | |
Deng et al. | Reduced-complexity deep neural network-aided channel code decoder: A case study for BCH decoder | |
CN110730006B (en) | LDPC code error correction method and error correction module for MCU | |
CN110166056A (en) | A kind of Hard decision decoding method of the LDPC code based on match tracing | |
CN111446973B (en) | Polarization code belief propagation decoding method based on multi-flip bit set | |
CN116707707A (en) | Combined polarization detection decoding method and related equipment | |
CN101436864B (en) | Method and apparatus for decoding low density parity check code | |
KR20230040702A (en) | Method and apparatus for generating a decoding position control signal for decoding using polar codes | |
CN101854179A (en) | 5bit quantization method applied to LDPC decoding | |
CN113037296A (en) | LDPC (Low Density parity check) cascade-based coding and decoding method and device | |
Xia et al. | High throughput polar decoding using two-staged adaptive successive cancellation list decoding |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |