CN110729227A - 用于结合基底的真空吸盘和设备以及结合基底的方法 - Google Patents
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- 239000000758 substrate Substances 0.000 title claims abstract description 234
- 238000000034 method Methods 0.000 title claims abstract description 46
- 238000005192 partition Methods 0.000 claims abstract description 27
- 239000004065 semiconductor Substances 0.000 claims description 30
- 238000000137 annealing Methods 0.000 claims description 25
- 230000008878 coupling Effects 0.000 claims description 14
- 238000010168 coupling process Methods 0.000 claims description 14
- 238000005859 coupling reaction Methods 0.000 claims description 14
- 238000005259 measurement Methods 0.000 claims description 8
- 238000001816 cooling Methods 0.000 claims description 7
- 239000011810 insulating material Substances 0.000 claims description 6
- 239000013078 crystal Substances 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- 239000010703 silicon Substances 0.000 claims description 5
- 125000006850 spacer group Chemical group 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 2
- 230000005679 Peltier effect Effects 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 239000012530 fluid Substances 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
提供了用于结合基底的真空吸盘和设备以及结合基底的方法。所述用于结合基底的真空吸盘包括:吸盘板,包括真空孔以保持基底;隔板,布置在吸盘板中,隔板将吸盘板划分为多个区域;以及温度控制构件,位于多个区域中的每个区域中,温度控制构件独立地控制每个区域中的温度,以使基底的与每个区域接触的部分选择性地膨胀或收缩。
Description
于2018年7月16日在韩国知识产权局(KIPO)提交的第10-2018-0082137号且名称为“用于结合基底的真空吸盘、包括真空吸盘的用于结合基底的设备和使用真空吸盘结合基底的方法”的韩国专利申请通过引用全部包含于此。
技术领域
示例实施例涉及用于结合基底的真空吸盘、包括真空吸盘的用于结合基底的设备和使用真空吸盘结合基底的方法。更具体地,示例实施例涉及用于结合半导体基底的真空吸盘、包括真空吸盘的用于结合半导体基底的设备和使用真空吸盘结合半导体基底的方法。
背景技术
为了提高半导体器件的集成度,可以利用结合设备来堆叠包括多个半导体芯片的上半导体基底和下半导体基底。堆叠的上半导体基底和下半导体基底的接触件可以彼此电连接。结合设备可以包括:用于利用真空来保持下半导体基底的下真空吸盘、用于利用真空来保持上半导体基底的上真空吸盘以及用于将上半导体基底压向下半导体基底的结合销。
发明内容
根据示例实施例,可以提供一种用于结合基底的真空吸盘。所述真空吸盘可以包括吸盘板、多个隔板和温度控制构件。吸盘板可以包括用于保持基底的多个真空孔。隔板可以布置在吸盘板中以将吸盘板划分为多个区域。温度控制构件可以布置在每个区域中,以独立地控制区域的温度,从而使基底的与区域接触的部分选择性地膨胀或收缩。
根据示例实施例,可以提供一种用于结合基底的设备。所述设备可以包括上真空吸盘、下真空吸盘和结合销。上真空吸盘可以包括用于保持上基底的上真空孔。下真空吸盘可以包括吸盘板、多个隔板和温度控制构件。吸盘板可以包括用于保持下基底的多个下真空孔。隔板可以布置在吸盘板中,以将吸盘板划分为多个区域。温度控制构件可以布置在每个区域中,以独立地控制区域的温度,从而使下基底的与区域接触的部分选择性地膨胀或收缩。结合销可以布置在上真空吸盘之上以将上基底压向下基底。
根据示例实施例,可以提供一种结合基底的方法。在结合基底的方法中,可以利用上真空吸盘和下真空吸盘使上参考基底和下参考基底彼此结合。可以对上参考基底中的上参考接触件与下参考基底中的下参考接触件之间的参考覆盖进行测量。上真空吸盘可以保持上基底。下真空吸盘可以保持下基底。可以根据参考覆盖选择性地加热或冷却下真空吸盘中的区域,以使下基底的与所述区域对应的部分选择性地膨胀或收缩,从而使上接触件与下接触件彼此对准。然后可以使上基底与下基底彼此结合。
附图说明
通过参照附图详细描述示例性实施例,特征对于本领域技术人员而言将变得明显,在附图中:
图1示出根据示例实施例的用于结合基底的设备的示意性剖视图;
图2示出图1中的设备的上真空吸盘的仰视图;
图3示出图1中的设备的下真空吸盘的平面图;
图4示出图3中的下真空吸盘的剖视图;
图5和图6示出结合的上基底和下基底的接触件的剖视图;
图7示出根据示例实施例的结合设备的下真空吸盘的剖视图;
图8示出图7中的真空吸盘的珀耳帖(Peltier)元件的框图;
图9示出根据示例实施例的结合设备的下真空吸盘的剖视图;以及
图10至图19示出使用图1中的设备来结合基底的方法中的阶段的剖视图。
具体实施方式
在下文中,将参照附图详细解释示例实施例。
【用于结合基底的设备】
图1是示出根据示例实施例的用于结合基底的设备的剖视图,图2是示出图1中的设备的上真空吸盘的仰视图,图3是示出图1中的设备的下真空吸盘的平面图,图4是示出图3中的下真空吸盘的剖视图。
参照图1,该示例实施例的结合设备可以使上基底US和下基底LS彼此结合。例如,上基底US和下基底LS中的每个可以包括半导体基底。在另一示例中,上基底US和下基底LS中的每个可以包括玻璃基底。
多个上接触件USC可以形成在上基底US中。每个上接触件USC可以在上基底US中与对应的半导体芯片电连接。上接触件USC可以通过上基底US的下表面被暴露。
多个下接触件LSC可以形成在下基底LS中。每个下接触件LSC可以在下基底LS中与对应的半导体芯片电连接。下接触件LSC可以通过下基底LS的上表面被暴露。
结合设备可以使上基底US的下表面与下基底LS的上表面结合,以使上接触件USC与下接触件LSC电连接。上基底US和下基底LS中的半导体芯片可以通过使上接触件USC和下接触件LSC彼此电连接而彼此电连接。因此可以根据上接触件USC与下接触件LSC之间的电接触来确定上基底US与下基底LS之间的结合不良。
结合设备可以包括结合单元700、研磨单元400、退火单元500和覆盖测量单元600。例如,参照图1,上基底US和下基底LS可以移动通过结合单元700、研磨单元400、退火单元500和覆盖测量单元600,以完成上基底US与下基底LS之间的结合,例如,覆盖测量单元600可以在工艺结束时使用,或者在其它单元中的每个单元之后使用。
如图1中所示,结合单元700可以包括上真空吸盘100、下真空吸盘200和结合销300。结合销300可以将上真空吸盘100和上基底US推向下真空吸盘200和下基底LS,以使在真空吸盘100和上基底US与下真空吸盘200和下基底LS之间的接触件结合。
详细地,参照图2,上真空吸盘100可以利用真空来保持上基底US。上真空吸盘100可以包括通过其可以引入真空的上真空孔110。上真空孔110可以通过上真空吸盘100的下表面被暴露,以向上基底US的上表面提供真空。在示例实施例中,上真空孔110可以布置在上真空吸盘100的边缘部分处,例如,上真空孔110可以包括沿上真空吸盘100的边缘部分的多个狭缝或单个连续的狭缝(图2)。因此,上真空吸盘100可以例如仅固定上基底US的边缘部分。相反地,上基底US的可以不向其施加真空的中心部分可以不通过上真空吸盘100进行固定。
再次参照图1,结合销300可以布置在上真空吸盘100之上。结合销300可以向下朝向上真空吸盘100移动,以将上基底US例如沿y轴压向(例如推向)下基底LS。通道120可以被形成为通过上真空吸盘100的中心部分。结合销300可以穿过通道120。可以通过致动器使结合销300上下移动。
由于上真空吸盘100可以例如仅固定上基底US的边缘部分,所以通过结合销300加压的上基底US的中心部分可以向下弯曲,例如,相比于上基底US的边缘部分,上基底US的中心部分可以被推动为更远离上真空吸盘100的下表面。因此,通过结合销300会在上基底US中产生局部変形,这又会导致上接触件USC与下接触件LSC之间未对齐。
如图1中所示,下真空吸盘200可以布置在上真空吸盘100之下。下真空吸盘200可以利用真空来保持下基底LS。
参照图3和图4,下真空吸盘200可以包括吸盘板210、多个隔板220和多个温度控制构件230。注意的是,图3至图4示出了同一平面的视图,但图4是与下基底LS平行的吸盘板210的厚度(即,相对于图3沿y轴的不同高度)的剖面。
如图3至图4中所示,吸盘板210可以包括通过其可以将真空引入到下基底LS的下表面的多个下真空孔212,例如,吸盘板210可以由金属制成。下真空孔212可以穿透通过整个吸盘板210,并且可以通过吸盘板210的上表面被暴露。下真空孔212可以以均匀间隙进行布置,以向下基底LS的整个下表面提供均匀的真空。也就是说,下基底LS的整个下表面可以与吸盘板210的上表面紧密地(例如,直接地)进行接触。在示例实施例中,下真空孔212可以同心地布置在吸盘板210中。
隔板220可以布置在吸盘板210中,以将吸盘板210划分为多个区域。例如,如图3至图4中所示,隔板220可以穿透通过例如吸盘板210的在y轴上的整个厚度。吸盘板210的被隔板220划分的区域中的温度可以通过温度控制构件230进行独立地控制。
在示例实施例中,如图3中所示,隔板220可以例如在xz平面上从吸盘板210的中心点径向延伸。隔板220可以通过例如相对于吸盘板210的中心点以基本相同的(例如,均匀的)角度进行布置。例如,隔板220可以被布置为在吸盘板210的中心点周围具有八个相等尺寸的隔板。因此,八个隔板220可以将吸盘板210划分为具有基本相同的弧形形状的八个(例如,相等的)区域R1、R2、R3、R4、R5、R6、R7和R8。然而,隔板220的数量可以不限于特定数量内。此外,隔板220之间的角度可以彼此不同。
被隔板220划分的八个区域R1、R2、R3、R4、R5、R6、R7和R8可以有效地应用于具有(100)晶面的硅基底。具有(100)晶面的硅基底可以在<110>方向、<010>方向以及<100>方向上具有不同的热膨胀系数。因为隔板220可以在<110>方向、<010>方向以及<100>方向上延伸,所以八个区域R1、R2、R3、R4、R5、R6、R7和R8的温度可以在硅基底的<110>方向、<010>方向以及<100>方向上独立地控制。
例如,隔板220可以包括用于阻挡相邻区域R1、R2、R3、R4、R5、R6、R7和R8之间的热交换的绝热材料。绝热材料可以不限于特定材料内。在另一个示例中,隔板220可以包括在半导体制造工艺中使用的绝缘材料。
温度控制构件230可以布置在吸盘板210的区域R1、R2、R3、R4、R5、R6、R7和R8中,例如,一个温度控制构件230可以位于区域R1、R2、R3、R4、R5、R6、R7和R8中的每个区域中。温度控制构件230可以在吸盘板210中独立地控制区域R1、R2、R3、R4、R5、R6、R7和R8的温度,例如,区域R1至区域R8中的相邻区域可以具有彼此不同的温度。
在示例实施例中,温度控制构件230可以包括热管。例如,参照图4,温度控制构件230可以在区域R1、R2、R3、R4、R5、R6、R7和R8中的每个区域中包括U形热管,其中,流体可以进入U形热管的第一端,流过U形热管,并且可以离开U形热管的第二端(例如,箭头表示图4中的区域R6的温度控制构件230的热管中的流动)。例如,如图4中所示,温度控制构件230的热管可以从吸盘板210的外边缘朝向吸盘板210的中心径向延伸,例如,U形热管的第一端和第二端二者都可以在吸盘板210的外部,并且U形热管的中心面对吸盘板210的中心。例如,温度控制构件230的热管可以嵌入吸盘板210内。
通过蒸发工作流体,温度控制构件230的热管可以通过将热量从区域R1、R2、R3、R4、R5、R6、R7和R8之中的一个区域传递出去来使区域R1、R2、R3、R4、R5、R6、R7和R8之中的所述一个区域冷却。由热管的产热部分产生的热量可以通过散热板进行传递,使得热管可以具有有效的冷却能力。
例如,如图5中所示,当上基底US的上接触件USC在使上基底US和下基底LS结合之后由于上基底US和/或下基底LS的局部変形而相对于下基底LS的下接触件LSC位于左侧时,温度控制构件230的位于下面的下基底LS的区域R1、R2、R3、R4、R5、R6、R7和R8之中的与下接触件LSC接触的区域中的热管可以在下面的(例如,随后的)结合工艺之前冷却该区域。冷却后的区域可以使下基底LS的该部分沿径向方向收缩,使得下接触件LSC可以左移。因此,下接触件LSC可以朝向上接触件USC左移,使得下接触件LSC可以位于上接触件USC之下,例如,这样上接触件USC和下接触件LSC可以在下面的(例如,随后的)结合工艺中适当地对准。结果,上接触件USC和下接触件LSC可以精确地彼此连接。
在另一示例中,如图6中所示,当上接触件USC在使上基底US和下基底LS结合之后由于上基底US和/或下基底LS的局部変形而位于下接触件LSC的右侧时,温度控制构件230的位于下面的下基底LS的区域R1、R2、R3、R4、R5、R6、R7和R8之中的与下接触件LSC接触的区域中的热管可以在下面的结合工艺之前加热该区域。加热后的区域可以使下基底LS的该部分沿径向方向膨胀,使得下接触件LSC可以右移。因此,下接触件LSC可以朝向上接触件USC右移,使得下接触件LSC可以位于上接触件USC之下,例如,这样上接触件USC和下接触件LSC可以在下面的结合工艺中适当地对准。结果,上接触件USC和下接触件LSC可以精确地彼此连接。
因此,通过针对区域R1、R2、R3、R4、R5、R6、R7和R8对温度控制构件230的热管的独立地温度控制,上接触件USC和下接触件LSC可以精确地彼此对准。结果,可以确保上接触件USC与下接触件LSC之间的精确连接。
返回参照图1,在使上基底US与下基底LS连接之后,研磨单元400可以部分地去除上基底US和/或下基底LS的背面,例如,使上基底US和下基底LS中的每个与其对应的真空吸盘分离。研磨单元400可以包括被构造为部分地去除上基底US和/或下基底LS的背面的研磨机410。因此,结合的上基底US和下基底LS的厚度可以通过研磨单元400而减小。由研磨单元400执行的研磨工艺会引起上基底US和下基底LS的变形。
在通过研磨单元400执行研磨工艺之后,退火单元500可以使连接的上基底US和下基底LS退火。退火单元500可以包括用于加热上基底US和下基底LS的加热器510。由加热器510加热的上基底US和下基底LS可以被缓慢冷却,以增强上基底US与下基底LS之间的结合强度。由退火单元500执行的退火工艺会引起上基底US和下基底LS的变形。
覆盖测量单元600可以对上基底US与下基底LS之间的在其上执行结合工艺、研磨工艺和退火工艺的覆盖进行测量。也就是说,覆盖测量单元600可以对上基底US的上接触件USC与下基底LS的下接触件LSC之间的覆盖进行测量。覆盖测量单元600可以包括用于测量上接触件USC与下接触件LSC之间的相对位置差的位置传感器610。
由覆盖测量单元600测量的上接触件USC和下接触件LSC之间的覆盖可以应用于下面的(例如,稍后的)上基底US和下基底LS的后续的(例如,接下来的)结合工艺。详细地,温度控制构件230的热管可以在吸盘板210中选择性地控制区域R1、R2、R3、R4、R5、R6、R7和R8的温度。由于可以通过温度控制构件230的热管选择性地加热或冷却下面的下基底LS的区域R1、R2、R3、R4、R5、R6、R7和R8,所以可以在随后的结合工艺之前使下面的下基底LS局部膨胀或收缩。因此,在对下面的上基底US和下基底LS执行例如结合工艺、研磨工艺和退火工艺中的每个之后,下面的上基底US的上接触件USC和下面的下基底LS的下接触件LSC可以精确地彼此对准。结果,下面的上基底US的上接触件USC和下面的下基底LS的下接触件LSC可以精确地彼此连接。
图7是示出根据示例实施例的结合设备的下真空吸盘的剖视图,图8是示出图7中的真空吸盘的珀耳帖元件的框图。
除了下真空吸盘的温度控制构件之外,该示例实施例的结合设备可以包括与图1中的结合设备的元件基本相同的元件。因此,相同的附图标记可以表示相同的元件,并且为了简洁起见,这里可以省略关于相同元件的任何进一步的说明。
参照图7和图8,下真空吸盘200a的温度控制构件240可以包括珀耳帖元件。珀耳帖元件可以布置在吸盘板210的区域R1、R2、R3、R4、R5、R6、R7和R8中的每个区域中。
参照图8,温度控制构件240的珀耳帖元件可以包括第一发热板242和第二发热板242、与第一发热板242和第二发热板242相对的吸热板244、置于吸热板244与第一发热板242之间的N型半导体器件245以及置于吸热板244与第二发热板242之间的P型半导体器件246。电源248(例如,电池)可以电连接到第一发热板242和第二发热板242。
可以将电流从电源248提供到第一发热板242。电流可以通过N型半导体器件245、吸热板244和P型半导体器件246流到第二发热板242。因此,第一发热板242和第二发热板242可以发热。吸热板244可以吸热。这是由于珀耳帖效应。
珀耳帖效应可以被解释为理想气体通过恒熵膨胀进行冷却的原理。当电子从具有高电子浓度的半导体移动到具有低电子浓度的半导体时,电子气体可以膨胀,然后相对于具有基本相同的化学势的两个板之间的势垒工作,从而电冷却物体。可以利用珀耳帖效应在大约195℉的温度下将物体冷却。
图9是示出根据示例实施例的结合设备的下真空吸盘的剖视图。
除了下真空吸盘之外,该示例实施例的结合设备可以包括与图1中的结合设备的元件基本相同的元件。因此,相同的附图标记可以表示相同的元件,并且为了简洁起见,这里可以省略关于相同元件的任何进一步的说明。
参照图9,下真空吸盘200b可以包括吸盘板210、多个隔板222和温度控制构件250。吸盘板210的结构可以与图1中的吸盘板210的结构基本相同。因此,为了简洁起见,这里可以省略关于吸盘板210的任何进一步的说明。
隔板222可以布置在吸盘板210中。每个隔板222以具有环形形状。环形隔板222可以以均匀的(例如,恒定的)间隙进行布置。因此,吸盘板210可以被环形隔板222被划分为多个圆形区域。环形隔板222可以包括绝热材料。
环形隔板222的位置可以与下基底LS的下接触件LSC对应。当下基底LS布置在下真空吸盘200b的上表面上时,每个环形隔板222可以围绕每个下接触件LSC。
温度控制构件250可以布置在吸盘板210的被环形隔板222划分的圆形区域中。温度控制构件250可以包括图4中的热管或图7中的珀耳帖元件。因此,为了简洁起见,这里可以省略关于温度控制构件250的任何进一步的说明。
【结合基底的方法】
图10至图19是示出使用图1中的设备来结合基底的方法中的阶段的剖视图。
参照图10,上真空吸盘100可以保持上参考基底URS。下真空吸盘200可以保持下参考基底LRS。上参考基底URS可以包括上参考接触件URSC,上参考接触件URSC的布置与上基底US的上接触件USC的布置基本相同。下参考基底LRS可以包括下参考接触件LRSC,下参考接触件LRSC的布置与下基底LS的下接触件LSC的布置基本相同。例如,上真空吸盘100和下真空吸盘200可以彼此平行地布置,并且上参考基底URS和下参考基底LRS置于上真空吸盘100与下真空吸盘200之间,使得上参考接触件URSC和下参考接触件LRSC可以彼此对准并且可以彼此面对。
参照图11,结合销300可以将上参考基底URS压向下参考基底LRS,以使上参考基底URS与下参考基底LRS结合。由于结合销300的压力会在上参考基底URS中产生变形。
参照图12,可以将结合的上参考基底URS和下参考基底LRS转移到研磨单元400。研磨单元400可以部分地去除上参考基底URS和/或下参考基底LRS的背面。由于通过研磨单元400执行的研磨工艺,会在结合的上参考基底URS和下参考基底LRS中产生额外的变形。
参照图13,在研磨工艺之后,可以将结合的上参考基底URS和下参考基底LRS转移到退火单元500。退火单元500可以对上参考基底URS和下参考基底LRS执行退火工艺。由于通过退火单元500执行的退火工艺,会在上参考基底URS和下参考基底LRS中产生额外的变形。
参照图14,可以将退火的上参考基底URS和下参考基底LRS转移到覆盖测量单元600。覆盖测量单元600可以对结合的上参考基底URS和下参考基底LRS之间的参考覆盖进行测量。具体地,覆盖测量单元600可以测量上参考接触件URSC与下参考接触件LRSC之间的水平距离。
上参考接触件URSC与下参考接触件LRSC之间的测量的水平距离之中的任何一个会超出允许范围。所述允许范围可以对应于允许上参考接触件URSC与下参考接触件LRSC之间接触的水平距离。参考覆盖可以反映上基底US和下基底LS的结合工艺。
参照图15,上真空吸盘100可以保持上基底US。下真空吸盘200可以保持下基底LS。当参考覆盖可以在允许范围内时,可以不对对应区域中的温度控制构件进行操作。相反地,当参考覆盖会超出允许范围(例如,在允许范围之外)时,在下真空吸盘200的吸盘板210内的对应区域中的温度控制构件可以对吸盘板210的对应区域进行加热或冷却,以调整上参考接触件URSC与下参考接触件LRSC之间的水平距离。因此,如前面参照图5至图6所讨论的,可以使下参考基底LRS的与加热区域或冷却区域接触的部分膨胀或收缩。
例如,如图5中所示,在对上参考基底URS和下参考基底LRS进行退火之后,当上接触件USC会位于下接触件LSC的左侧而超过允许范围时,对应区域中的温度控制构件可以对吸盘板210的对应区域进行冷却。冷却区域可以使下基底LS的该部分沿径向方向收缩,使得下接触件LSC可以通过测量的参考覆盖而左移。
在另一示例中,如图6中所示,在对上参考基底URS和下参考基底LRS进行退火之后,当上接触件USC位于下接触件LSC的右侧而超过允许范围时,对应区域中的温度控制构件可以对吸盘板210的对应区域进行加热。加热区域可以使下基底LS的该部分沿径向方向膨胀,使得下接触件LSC可以通过测量的参考覆盖而右移。
上参考接触件URSC与下参考接触件LRSC可以以与参照图5至图6描述的上参考基底URS和下参考基底LRS的方式相同的方式来进行测量。因此,在使上基底US和下基底LS结合之前,可以测量并提前反映利用上参考基底URS和下参考基底LRS测量的参考覆盖,使得可以根据提前测量的参考覆盖来移动下基底LS的下接触件LSC的位置。
参照图16,结合销300可以将上基底US压向下基底LS以使上基底US与下基底LS结合。结合销300的施加到上基底US和下基底LS的压力可以与结合销300的施加到上参考基底URS和下参考基底LRS的压力基本相同。因此,会在上基底US中产生与由接合销300在上参考基底URS中产生的变形基本相同的变形。
参照图17,可以将结合的上基底US和下基底LS转移到研磨单元400。研磨单元400可以部分地去除上基底US和/或下基底LS的背面。通过研磨单元400对上基底US和下基底LS的变形可以与通过研磨单元400对上参考基底URS和下参考基底LRS的变形基本相同。
参照图18,可以将研磨后的上基底US和下基底LS转移到退火单元500。退火单元500可以对上基底US和下基底LS执行退火工艺。通过退火单元500对上基底US和下基底LS的变形可以与通过退火单元500对上参考基底URS和下参考基底LRS的变形基本相同。
在使上基底US与下基底LS彼此结合之前,通过温度控制构件的操作,可以在下基底LS上反映上基底US和下基底LS中产生的三个变形。因此,可以通过上基底US和下基底LS的三个变形将下接触件LSC精确地定位在上接触件USC之下。结果,在退火工艺之后,上接触件USC和下接触件LSC可以精确地彼此连接。
此外,参照图19,为了检查上接触件USC与下接触件LSC之间的精确连接,可以将退火后的上基底US和下基底LS转移到覆盖测量单元600。覆盖测量单元600可以对结合的上基底US与下基底LS之间的覆盖进行测量。
通过总结和回顾,当上半导体基底和下半导体基底可以彼此结合时,会在上半导体基底和下半导体基底中产生变形。此外,在使上半导体基底和下半导体基底彼此结合之后,可以执行研磨工艺以部分地去除下半导体基底的背面,并且可以对结合的上半导体基底和下半导体基底执行退火工艺,这会引起额外的变形,从而引起上半导体基底和下半导体基底中的接触件之间的潜在分离。
相反地,示例实施例提供了用于结合基底的真空吸盘,真空吸盘能够通过校正基底的变形来确保接触件之间的精确连接。示例实施例还提供了包括上述真空吸盘的用于结合基底的设备。示例实施例还提供了使用上述真空吸盘结合基底的方法。
也就是说,根据示例实施例,温度控制构件可以设置在例如下真空吸盘的吸盘板的区域中,以根据参考覆盖(例如,根据晶圆的晶向)独立地加热或冷却所述区域。因此,基底的与所述区域接触的部分可以选择性地膨胀或收缩(例如,根据晶圆的晶向控制热膨胀(或收缩)量),以对基底的变形(例如,翘曲或扭曲)进行校正。结果,接触件可以精确地彼此连接。
这里已经公开了示例实施例,虽然采用了特定术语,但是仅以一般性和描述性含义来使用和解释它们,而不是出于限制的目的。在某些情况下,如本领域普通技术人员将清楚的是,自提交本申请之时起,结合具体实施例描述的特征、特性和/或元件可以单独使用,或者可以与结合其它实施例描述的特征、特性和/或元件组合起来使用,除非另外特别说明。因此,本领域技术人员将理解的是,在不脱离本发明的由权利要求阐述的精神和范围的情况下,可以做出形式上和细节上的各种改变。
Claims (25)
1.一种用于结合基底的真空吸盘,所述真空吸盘包括:
吸盘板,包括真空孔以保持基底;
隔板,布置在吸盘板中,隔板将吸盘板划分为多个区域;以及
温度控制构件,位于所述多个区域中的每个区域中,温度控制构件独立地控制每个区域中的温度,以使基底的与每个区域接触的部分选择性地膨胀或收缩。
2.根据权利要求1所述的真空吸盘,其中,隔板从吸盘板的中心点径向延伸。
3.根据权利要求2所述的真空吸盘,其中,隔板彼此间隔开均匀的角度。
4.根据权利要求2所述的真空吸盘,其中,温度控制构件平行于吸盘板的底部并相对于吸盘板的中心点沿径向方向延伸。
5.根据权利要求1所述的真空吸盘,其中,隔板包括绝热材料。
6.根据权利要求1所述的真空吸盘,其中,温度控制构件包括在所述多个区域中的每个区域中的热管。
7.根据权利要求1所述的真空吸盘,其中,温度控制构件包括在所述多个区域中的每个区域中的珀耳帖元件。
8.一种用于结合基底的设备,所述设备包括:
上真空吸盘,包括上真空孔以保持上基底;
下真空吸盘,包括:吸盘板,布置在上真空吸盘之下,并且具有下真空孔以保持下基底;隔板,布置在吸盘板中,隔板将吸盘板划分为多个区域;以及温度控制构件,位于所述多个区域中的每个区域中,温度控制构件独立地控制每个区域中的温度,以使下基底的与每个区域接触的部分选择性地膨胀或收缩;以及
结合销,布置在上真空吸盘之上以将上基底压向下基底。
9.根据权利要求8所述的设备,其中,隔板从吸盘板的中心点径向延伸,并且隔板彼此间隔开均匀的角度。
10.根据权利要求8所述的设备,其中,隔板包括绝热材料。
11.根据权利要求8所述的设备,其中,上真空孔位于上真空吸盘的边缘部分处。
12.根据权利要求8所述的设备,其中,上真空吸盘包括通道,结合销穿过通道。
13.根据权利要求12所述的设备,其中,通道通过上真空吸盘。
14.根据权利要求8所述的设备,所述设备还包括覆盖测量单元以测量上基底的上接触件与下基底的下接触件之间的覆盖。
15.根据权利要求14所述的设备,其中,温度控制构件根据覆盖独立地加热或冷却区域,以使上接触件与下接触件对准。
16.根据权利要求8所述的设备,所述设备还包括研磨单元以部分地去除上基底和/或下基底的背面。
17.根据权利要求8所述的设备,所述设备还包括退火单元以使上基底和下基底退火。
18.一种结合基底的方法,所述方法包括以下步骤:
利用上真空吸盘和下真空吸盘使上参考基底和下参考基底彼此结合;
测量上参考基底的上参考接触件与下参考基底的下参考接触件之间的参考覆盖;
将上基底保持到上真空吸盘;
将下基底保持到下真空吸盘;
根据参考覆盖选择性地加热或冷却下真空吸盘中的区域,以使下基底的与所述区域对应的部分选择性地膨胀或收缩,从而使上基底的上接触件与下基底的下接触件彼此对准;以及
使上基底与下基底彼此结合。
19.根据权利要求18所述的方法,所述方法还包括在测量参考覆盖之前部分地去除上参考基底和/或下参考基底的背面的步骤。
20.根据权利要求18所述的方法,所述方法还包括使结合的上参考基底和下参考基底退火的步骤。
21.根据权利要求18所述的方法,其中,上基底和下基底包括含有硅的半导体基底。
22.根据权利要求21所述的方法,其中,加热或冷却下真空吸盘的区域的步骤包括使下基底的所述部分沿硅的晶向膨胀或收缩。
23.根据权利要求18所述的方法,所述方法还包括对在结合的上基底和下基底中的上接触件与下接触件之间的覆盖进行测量的步骤。
24.根据权利要求23所述的方法,所述方法还包括在测量覆盖之前部分地去除上基底和/或下基底的背面的步骤。
25.根据权利要求24所述的方法,所述方法还包括使结合的上基底和下基底退火的步骤。
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