CN110708598B - Video networking terminal and data processing method - Google Patents
Video networking terminal and data processing method Download PDFInfo
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- CN110708598B CN110708598B CN201810751684.7A CN201810751684A CN110708598B CN 110708598 B CN110708598 B CN 110708598B CN 201810751684 A CN201810751684 A CN 201810751684A CN 110708598 B CN110708598 B CN 110708598B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
- H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/44—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs
- H04N21/4402—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display
- H04N21/440218—Processing of video elementary streams, e.g. splicing a video clip retrieved from local storage with an incoming video stream, rendering scenes according to MPEG-4 scene graphs involving reformatting operations of video signals for household redistribution, storage or real-time display by transcoding between formats or standards, e.g. from MPEG-2 to MPEG-4
Abstract
The invention provides a video network terminal and a data processing method, wherein the video network terminal comprises a central processing unit, a field programmable gate array and a video conversion chip; the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips. The invention realizes the expansion of the video output quantity, fully utilizes the decoding capability of the central processing unit and improves the performance of the video networking terminal.
Description
Technical Field
The invention relates to the technical field of video networking, in particular to a video networking terminal and a data processing method.
Background
With the development of science and technology, the video networking technology is widely applied to various industries, such as the fields of office work, remote medical treatment, security protection, emergency command and the like, and the application of the video networking technology brings great convenience.
In the video network, video playing usually depends on a video network terminal, and the video network terminal decodes a received compressed video by using a Central Processing Unit (CPU), and outputs the decoded video to a display screen through a protocol interface of the CPU to implement video playing.
However, as the decoding capability of the central processor is enhanced, the number of videos which can be decoded by a single central processor is far larger than the number of protocol interfaces which can be provided by the central processor, and the protocol interfaces of the central processor limit the number of video outputs, which affects the performance of the video networking terminal.
Disclosure of Invention
In view of the above problems, the present invention is proposed to provide an internet of view terminal and a data processing method that overcome or at least partially solve the above problems, including:
a kind of terminal station of the video network, the said video network terminal station includes central processing unit, field programmable gate array, and video conversion chip;
the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips.
Alternatively,
the central processing unit is used for decoding the compressed video stream into N paths of first uncompressed video streams when receiving the compressed video stream, packaging the selected M paths of first uncompressed video streams into a second uncompressed video stream, and sending the second uncompressed video stream to the corresponding field programmable gate array; wherein N is an integer greater than 0, M is an integer greater than 0 and less than or equal to N;
the field programmable gate array is used for analyzing the received second uncompressed video stream into the M paths of first uncompressed video streams and respectively sending the M paths of first uncompressed video streams to the corresponding video conversion chips;
the video conversion chip is used for carrying out format conversion on the received first non-compressed video stream and sending the format-converted first non-compressed video stream to a display screen.
Optionally, the central processor is further configured to:
for each field programmable gate array, determining selected M video identifications;
determining M paths of first uncompressed video streams corresponding to M video identifications from the N paths of first uncompressed video streams, and packaging the M paths of first uncompressed video streams into a second uncompressed video stream; wherein each first uncompressed video stream has a corresponding video identifier.
Optionally, the central processor is further configured to:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames;
combining the M first video frames into a second video frame;
and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to a corresponding field programmable gate array.
Optionally, the field programmable gate array is further configured to:
extracting the second video frame from the received second uncompressed video stream;
analyzing the second video frames to obtain the M first video frames;
and generating the M paths of first uncompressed video streams corresponding to the M first video frames.
Optionally, the video networking terminal further comprises a memory connected with the field programmable gate array;
the memory is configured to cache the M first video frames after the field programmable gate array parses the second video frame to obtain the M first video frames.
A data processing method is applied to a video network terminal, and the video network terminal comprises a central processing unit, a field programmable gate array and a video conversion chip;
the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips;
the method comprises the following steps:
adopting the central processing unit, decoding the compressed video stream into N paths of first uncompressed video streams when receiving the compressed video stream, packaging the selected M paths of first uncompressed video streams into second uncompressed video streams, and sending the second uncompressed video streams to the corresponding field programmable gate array; wherein N is an integer greater than 0, M is an integer greater than 0 and less than or equal to N;
analyzing the received second uncompressed video stream into the M paths of first uncompressed video streams by adopting the field programmable gate array, and respectively sending the M paths of first uncompressed video streams to corresponding video conversion chips;
and adopting the video conversion chip to convert the format of the received first non-compressed video stream and sending the format-converted first non-compressed video stream to a display screen.
Optionally, the central processing unit selects M first uncompressed video streams by:
for each field programmable gate array, determining selected M video identifications;
determining M paths of first uncompressed video streams corresponding to M video identifications from the N paths of first uncompressed video streams, and packaging the M paths of first uncompressed video streams into a second uncompressed video stream; wherein each first uncompressed video stream has a corresponding video identifier.
Optionally, the step of encapsulating the selected M channels of first uncompressed video streams into second uncompressed video streams and sending the second uncompressed video streams to the corresponding field programmable gate array includes:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames;
combining the M first video frames into a second video frame;
and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to a corresponding field programmable gate array.
Optionally, the parsing the received second uncompressed video stream into the M paths of first uncompressed video streams includes:
extracting the second video frame from the received second uncompressed video stream;
analyzing the second video frames to obtain the M first video frames;
and generating the M paths of first uncompressed video streams corresponding to the M first video frames.
The invention has the following advantages:
in the invention, the video networking terminal comprises a central processing unit, field programmable gate arrays and video conversion chips, wherein the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips, thereby realizing the expansion of video output quantity, fully utilizing the decoding capability of the central processing unit and improving the performance of the video networking terminal.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the description of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic networking diagram of a video network according to an embodiment of the present invention;
fig. 2 is a schematic hardware structure diagram of a node server according to an embodiment of the present invention;
fig. 3 is a schematic hardware structure diagram of an access switch according to an embodiment of the present invention;
fig. 4 is a schematic hardware structure diagram of an ethernet protocol conversion gateway according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a video network terminal according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a video network terminal according to another embodiment of the present invention;
fig. 7 is a flowchart illustrating steps of a method for processing data according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The video networking is an important milestone for network development, is a real-time network, can realize high-definition video real-time transmission, and pushes a plurality of internet applications to high-definition video, and high-definition faces each other.
The video networking adopts a real-time high-definition video exchange technology, can integrate required services such as dozens of services of video, voice, pictures, characters, communication, data and the like on a system platform on a network platform, such as high-definition video conference, video monitoring, intelligent monitoring analysis, emergency command, digital broadcast television, delayed television, network teaching, live broadcast, VOD on demand, television mail, Personal Video Recorder (PVR), intranet (self-office) channels, intelligent video broadcast control, information distribution and the like, and realizes high-definition quality video broadcast through a television or a computer.
To better understand the embodiments of the present invention, the following description refers to the internet of view:
some of the technologies applied in the video networking are as follows:
network technology (network technology)
Network technology innovation in video networking has improved over traditional Ethernet (Ethernet) to face the potentially enormous video traffic on the network. Unlike pure network Packet Switching (Packet Switching) or network Circuit Switching (Circuit Switching), the Packet Switching is adopted by the technology of the video networking to meet the Streaming requirement. The video networking technology has the advantages of flexibility, simplicity and low price of packet switching, and simultaneously has the quality and safety guarantee of circuit switching, thereby realizing the seamless connection of the whole network switching type virtual circuit and the data format.
Switching Technology (Switching Technology)
The video network adopts two advantages of asynchronism and packet switching of the Ethernet, eliminates the defects of the Ethernet on the premise of full compatibility, has end-to-end seamless connection of the whole network, is directly communicated with a user terminal, and directly bears an IP data packet. The user data does not require any format conversion across the entire network. The video networking is a higher-level form of the Ethernet, is a real-time exchange platform, can realize the real-time transmission of the whole-network large-scale high-definition video which cannot be realized by the existing Internet, and pushes a plurality of network video applications to high-definition and unification.
Server technology (Servertechnology)
The server technology on the video networking and unified video platform is different from the traditional server, the streaming media transmission of the video networking and unified video platform is established on the basis of connection orientation, the data processing capacity of the video networking and unified video platform is independent of flow and communication time, and a single network layer can contain signaling and data transmission. For voice and video services, the complexity of video networking and unified video platform streaming media processing is much simpler than that of data processing, and the efficiency is greatly improved by more than one hundred times compared with that of a traditional server.
Storage Technology (Storage Technology)
The super-high speed storage technology of the unified video platform adopts the most advanced real-time operating system in order to adapt to the media content with super-large capacity and super-large flow, the program information in the server instruction is mapped to the specific hard disk space, the media content is not passed through the server any more, and is directly sent to the user terminal instantly, and the general waiting time of the user is less than 0.2 second. The optimized sector distribution greatly reduces the mechanical motion of the magnetic head track seeking of the hard disk, the resource consumption only accounts for 20% of that of the IP internet of the same grade, but concurrent flow which is 3 times larger than that of the traditional hard disk array is generated, and the comprehensive efficiency is improved by more than 10 times.
Network Security Technology (Network Security Technology)
The structural design of the video network completely eliminates the network security problem troubling the internet structurally by the modes of independent service permission control each time, complete isolation of equipment and user data and the like, generally does not need antivirus programs and firewalls, avoids the attack of hackers and viruses, and provides a structural carefree security network for users.
Service Innovation Technology (Service Innovation Technology)
The unified video platform integrates services and transmission, and is not only automatically connected once whether a single user, a private network user or a network aggregate. The user terminal, the set-top box or the PC are directly connected to the unified video platform to obtain various multimedia video services in various forms. The unified video platform adopts a menu type configuration table mode to replace the traditional complex application programming, can realize complex application by using very few codes, and realizes infinite new service innovation.
Networking of the video network is as follows:
the video network is a centralized control network structure, and the network can be a tree network, a star network, a ring network and the like, but on the basis of the centralized control node, the whole network is controlled by the centralized control node in the network.
As shown in fig. 1, the video network is divided into an access network and a metropolitan network.
The devices of the access network part can be mainly classified into 3 types: node server, access switch, terminal (including various set-top boxes, coding boards, memories, etc.). The node server is connected to an access switch, which may be connected to a plurality of terminals and may be connected to an ethernet network.
The node server is a node which plays a centralized control function in the access network and can control the access switch and the terminal. The node server can be directly connected with the access switch or directly connected with the terminal.
Similarly, devices of the metropolitan network portion may also be classified into 3 types: a metropolitan area server, a node switch and a node server. The metro server is connected to a node switch, which may be connected to a plurality of node servers.
The node server is a node server of the access network part, namely the node server belongs to both the access network part and the metropolitan area network part.
The metropolitan area server is a node which plays a centralized control function in the metropolitan area network and can control a node switch and a node server. The metropolitan area server can be directly connected with the node switch or directly connected with the node server.
Therefore, the whole video network is a network structure with layered centralized control, and the network controlled by the node server and the metropolitan area server can be in various structures such as tree, star and ring.
The access network part can form a unified video platform (the part in the dotted circle), and a plurality of unified video platforms can form a video network; each unified video platform may be interconnected via metropolitan area and wide area video networking.
1. Video networking device classification
1.1 devices in the video network of the embodiment of the present invention can be mainly classified into 3 types: server, exchanger (including Ethernet protocol conversion gateway), terminal (including various set-top boxes, code board, memory, etc.). The video network as a whole can be divided into a metropolitan area network (or national network, global network, etc.) and an access network.
1.2 wherein the devices of the access network part can be mainly classified into 3 types: node server, access exchanger (including Ethernet protocol conversion gateway), terminal (including various set-top boxes, coding board, memory, etc.).
The specific hardware structure of each access network device is as follows:
a node server:
as shown in fig. 2, the system mainly includes a network interface module 201, a switching engine module 202, a CPU module 203, and a disk array module 204;
the network interface module 201, the CPU module 203, and the disk array module 204 all enter the switching engine module 202; the switching engine module 202 performs an operation of looking up the address table 205 on the incoming packet, thereby obtaining the direction information of the packet; and stores the packet in a queue of the corresponding packet buffer 206 based on the packet's steering information; if the queue of the packet buffer 206 is nearly full, it is discarded; the switching engine module 202 polls all packet buffer queues for forwarding if the following conditions are met: 1) the port send buffer is not full; 2) the queue packet counter is greater than zero. The disk array module 204 mainly implements control over the hard disk, including initialization, read-write, and other operations on the hard disk; the CPU module 203 is mainly responsible for protocol processing with an access switch and a terminal (not shown in the figure), configuring an address table 205 (including a downlink protocol packet address table, an uplink protocol packet address table, and a data packet address table), and configuring the disk array module 204.
The access switch:
as shown in fig. 3, the network interface module mainly includes a network interface module (a downlink network interface module 301 and an uplink network interface module 302), a switching engine module 303 and a CPU module 304;
wherein, the packet (uplink data) coming from the downlink network interface module 301 enters the packet detection module 305; the packet detection module 305 detects whether the Destination Address (DA), the Source Address (SA), the packet type, and the packet length of the packet meet the requirements, and if so, allocates a corresponding stream identifier (stream-id) and enters the switching engine module 303, otherwise, discards the stream identifier; the packet (downstream data) coming from the upstream network interface module 302 enters the switching engine module 303; the data packet coming from the CPU module 204 enters the switching engine module 303; the switching engine module 303 performs an operation of looking up the address table 306 on the incoming packet, thereby obtaining the direction information of the packet; if the packet entering the switching engine module 303 is from the downstream network interface to the upstream network interface, the packet is stored in the queue of the corresponding packet buffer 307 in association with the stream-id; if the queue of the packet buffer 307 is nearly full, it is discarded; if the packet entering the switching engine module 303 is not from the downlink network interface to the uplink network interface, the data packet is stored in the queue of the corresponding packet buffer 307 according to the guiding information of the packet; if the queue of the packet buffer 307 is nearly full, it is discarded.
The switching engine module 303 polls all packet buffer queues, which in this embodiment of the present invention is divided into two cases:
if the queue is from the downlink network interface to the uplink network interface, the following conditions are met for forwarding: 1) the port send buffer is not full; 2) the queued packet counter is greater than zero; 3) obtaining a token generated by a code rate control module;
if the queue is not from the downlink network interface to the uplink network interface, the following conditions are met for forwarding: 1) the port send buffer is not full; 2) the queue packet counter is greater than zero.
The rate control module 208 is configured by the CPU module 204, and generates tokens for packet buffer queues from all downstream network interfaces to upstream network interfaces at programmable intervals to control the rate of upstream forwarding.
The CPU module 304 is mainly responsible for protocol processing with the node server, configuration of the address table 306, and configuration of the code rate control module 308.
Ethernet protocol conversion gateway：
As shown in fig. 4, the apparatus mainly includes a network interface module (a downlink network interface module 401 and an uplink network interface module 402), a switching engine module 403, a CPU module 404, a packet detection module 405, a rate control module 408, an address table 406, a packet buffer 407, a MAC adding module 409, and a MAC deleting module 410.
Wherein, the data packet coming from the downlink network interface module 401 enters the packet detection module 405; the packet detection module 405 detects whether the ethernet MAC DA, the ethernet MAC SA, the ethernet length or frame type, the video network destination address DA, the video network source address SA, the video network packet type, and the packet length of the packet meet the requirements, and if so, allocates a corresponding stream identifier (stream-id); then, the MAC deletion module 410 subtracts MAC DA, MAC SA, length or frame type (2byte) and enters the corresponding receiving buffer, otherwise, discards it;
the downlink network interface module 401 detects the sending buffer of the port, and if there is a packet, obtains the ethernet MAC DA of the corresponding terminal according to the destination address DA of the packet, adds the ethernet MAC DA of the terminal, the MAC SA of the ethernet protocol gateway, and the ethernet length or frame type, and sends the packet.
The other modules in the ethernet protocol gateway function similarly to the access switch.
A terminal:
the system mainly comprises a network interface module, a service processing module and a CPU module; for example, the set-top box mainly comprises a network interface module, a video and audio coding and decoding engine module and a CPU module; the coding board mainly comprises a network interface module, a video and audio coding engine module and a CPU module; the memory mainly comprises a network interface module, a CPU module and a disk array module.
1.3 devices of the metropolitan area network part can be mainly classified into 2 types: node server, node exchanger, metropolitan area server. The node switch mainly comprises a network interface module, a switching engine module and a CPU module; the metropolitan area server mainly comprises a network interface module, a switching engine module and a CPU module.
2. Video networking packet definition
2.1 Access network packet definition
The data packet of the access network mainly comprises the following parts: destination Address (DA), Source Address (SA), reserved bytes, payload (pdu), CRC.
As shown in the following table, the data packet of the access network mainly includes the following parts:
| DA | SA | Reserved | Payload | CRC |
wherein:
the Destination Address (DA) is composed of 8 bytes (byte), the first byte represents the type of the data packet (such as various protocol packets, multicast data packets, unicast data packets, etc.), there are 256 possibilities at most, the second byte to the sixth byte are metropolitan area network addresses, and the seventh byte and the eighth byte are access network addresses;
the Source Address (SA) is also composed of 8 bytes (byte), defined as the same as the Destination Address (DA);
the reserved byte consists of 2 bytes;
the payload part has different lengths according to different types of datagrams, and is 64 bytes if the datagram is various types of protocol packets, and is 32+1024 or 1056 bytes if the datagram is a unicast packet, of course, the length is not limited to the above 2 types;
the CRC consists of 4 bytes and is calculated in accordance with the standard ethernet CRC algorithm.
2.2 metropolitan area network packet definition
The topology of a metropolitan area network is a graph and there may be 2, or even more than 2, connections between two devices, i.e., there may be more than 2 connections between a node switch and a node server, a node switch and a node switch, and a node switch and a node server. However, the metro network address of the metro network device is unique, and in order to accurately describe the connection relationship between the metro network devices, parameters are introduced in the embodiment of the present invention: a label to uniquely describe a metropolitan area network device.
In this specification, the definition of the Label is similar to that of the Label of MPLS (Multi-Protocol Label Switch), and assuming that there are two connections between the device a and the device B, there are 2 labels for the packet from the device a to the device B, and 2 labels for the packet from the device B to the device a. The label is classified into an incoming label and an outgoing label, and assuming that the label (incoming label) of the packet entering the device a is 0x0000, the label (outgoing label) of the packet leaving the device a may become 0x 0001. The network access process of the metro network is a network access process under centralized control, that is, address allocation and label allocation of the metro network are both dominated by the metro server, and the node switch and the node server are both passively executed, which is different from label allocation of MPLS, and label allocation of MPLS is a result of mutual negotiation between the switch and the server.
As shown in the following table, the data packet of the metro network mainly includes the following parts:
| DA | SA | Reserved | label (R) | Payload | CRC |
Namely Destination Address (DA), Source Address (SA), Reserved byte (Reserved), tag, payload (pdu), CRC. The format of the tag may be defined by reference to the following: the tag is 32 bits with the upper 16 bits reserved and only the lower 16 bits used, and its position is between the reserved bytes and payload of the packet.
Referring to fig. 5, a schematic structural diagram of a video network terminal according to an embodiment of the present invention is shown.
In this embodiment, the terminal of the video network may include a central processing unit 501, a Field Programmable Gate Array (FPGA) 502, and a video conversion chip 503.
The central processing unit 503 has one or more protocol interfaces, the one or more protocol interfaces may be respectively connected to one field programmable gate array 502, and each field programmable gate array 502 may be connected to one or more video conversion chips 503.
In an embodiment of the present invention, as shown in fig. 6, the video networking terminal further includes a network interface 504, one end of the network interface 504 is connected to the central processing unit 501, the other end is external, the video networking terminal further includes a plurality of video output interfaces 505, one end of the video output interface 505 is connected to one video conversion chip 503, and the other end is connected to the display screen.
The following is a detailed description of various components in the video networking terminal:
3.1 Central processing Unit 501
The central processor 501 may be configured to, when receiving the compressed video stream, decode the compressed video stream into N channels of first uncompressed video streams, encapsulate the selected M channels of first uncompressed video streams into a second uncompressed video stream, and send the second uncompressed video stream to the corresponding field programmable gate array 502.
Wherein N is an integer greater than 0, and M is an integer greater than 0 and less than or equal to N.
In a specific implementation, the video networking server may send a compressed video stream to the central processor 501 of the video networking terminal through the network interface, where the compressed video stream may be formed by compressing multiple video streams, such as a video stream of h.264/h.265, and after receiving the compressed video stream, the central processor 501 may decompress the compressed video stream to obtain N paths of first non-compressed video streams, such as a video stream of YUV 422.
After obtaining the first uncompressed video stream, the central processor 501 may determine the selected M channels of first uncompressed video streams, encapsulate the selected M channels of first uncompressed video streams into a second uncompressed video stream, and send the second uncompressed video stream to the corresponding field programmable gate array 502.
In an embodiment of the present invention, the central processing unit 501 may further be configured to:
for each field programmable gate array, determining selected M video identifications; and determining M paths of first uncompressed video streams corresponding to the M video identifications from the N paths of first uncompressed video streams, and encapsulating the M paths of first uncompressed video streams into a second uncompressed video stream.
Wherein each first uncompressed video stream has a corresponding video identifier.
In a specific implementation, a user may select a video identifier corresponding to each display screen to instruct a video stream corresponding to the video identifier to be played on the display screen, and each display screen is connected to the field programmable gate array 502 through the video conversion chip 503, so that the central processing unit 501 may determine M video identifiers corresponding to each field programmable gate array 502.
After determining the video identifiers, the central processing unit 501 may select M first uncompressed video streams corresponding to M video identifiers from the N first uncompressed video streams, and further encapsulate the M first uncompressed video streams to obtain a second uncompressed video stream.
In an embodiment of the present invention, the central processing unit is further configured to:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames; combining the M first video frames into a second video frame; and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to the corresponding field programmable gate array.
In the process of encapsulation, the central processor 501 may extract video frames from the M channels of first uncompressed video streams to obtain M first video frames, then combine the M first video frames into a second video frame, and further encapsulate the second video frame into a second uncompressed video stream by using a bt.1120/bt.656 protocol, and send the second uncompressed video stream to the corresponding fpga 502.
For example, 4 first uncompressed video streams with 1920 × 1080 resolution are encapsulated into 1 second uncompressed video stream with 3840 × 2160 resolution.
3.2 field programmable Gate array 502
The fpga 502 may be configured to parse the received second uncompressed video stream into M paths of first uncompressed video streams, and send the M paths of first uncompressed video streams to corresponding video conversion chips, respectively.
After the received second uncompressed video stream, the fpga 502 may parse the second uncompressed video stream into M first uncompressed video streams, and may use the bt.1120/bt.656 protocol to send the M first uncompressed video streams to corresponding video conversion chips, so that a single protocol interface of the cpu 501 may output multiple video streams, the decoding capability of the cpu 501 is fully utilized, the video processing efficiency is improved, and the fpga is low in cost and simple in structure.
In an embodiment of the invention, the field programmable gate array 502 may further be configured to:
extracting a second video frame from the received second uncompressed video stream; analyzing the second video frame to obtain M first video frames; and generating M paths of first uncompressed video streams corresponding to the M first video frames.
In a specific implementation, the fpga 502 may extract video frames from the second uncompressed video stream to obtain second video frames, analyze the second video frames, extract M first video frames from the second video frames, and generate corresponding first uncompressed video streams to send to the video conversion chip.
In an embodiment of the present invention, as shown in fig. 6, the video networking terminal further includes a memory 506 connected to the field programmable gate array 502, and the memory 506 may be configured to buffer the M first video frames after the field programmable gate array 502 parses the second video frames to obtain the M first video frames.
3.3 video conversion chip 503
The video conversion chip 503 may be configured to perform format conversion on the received first uncompressed video stream, and send the format-converted first uncompressed video stream to the display screen.
After receiving the first non-compressed video stream, the video conversion chip 503 may convert the first non-compressed video stream into a format that can be played by a display screen, such as HDMI/VGA/PAL/NTSC, and send the format-converted first non-compressed video stream to the display screen for playing on the display screen.
In the invention, the video networking terminal comprises a central processing unit, field programmable gate arrays and video conversion chips, wherein the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips, thereby realizing the expansion of video output quantity, fully utilizing the decoding capability of the central processing unit and improving the performance of the video networking terminal.
Referring to fig. 7, a flowchart illustrating steps of a data processing method according to an embodiment of the present invention is shown, and the method is applied to a video network terminal, where the video network terminal includes a central processing unit, a field programmable gate array, and a video conversion chip.
The central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips.
Specifically, the method can comprise the following steps:
and 703, performing format conversion on the received first uncompressed video stream by using a video conversion chip, and sending the format-converted first uncompressed video stream to a display screen.
In an embodiment of the present invention, the cpu selects M first uncompressed video streams as follows:
for each field programmable gate array, determining selected M video identifications;
determining M paths of first uncompressed video streams corresponding to the M video identifiers from the N paths of first uncompressed video streams, and packaging the M paths of first uncompressed video streams into a second uncompressed video stream; wherein each first uncompressed video stream has a corresponding video identifier.
In an embodiment of the present invention, the step of encapsulating the selected M channels of first uncompressed video streams into second uncompressed video streams and sending the second uncompressed video streams to the corresponding field programmable gate array includes:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames;
combining the M first video frames into a second video frame;
and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to the corresponding field programmable gate array.
In an embodiment of the present invention, the parsing the received second uncompressed video stream into M first uncompressed video streams includes:
extracting a second video frame from the received second uncompressed video stream;
analyzing the second video frame to obtain M first video frames;
and generating M paths of first uncompressed video streams corresponding to the M first video frames.
In the invention, the video networking terminal comprises a central processing unit, field programmable gate arrays and video conversion chips, wherein the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips, thereby realizing the expansion of video output quantity, fully utilizing the decoding capability of the central processing unit and improving the performance of the video networking terminal.
An embodiment of the present invention also provides an electronic device, which may include a processor, a memory, and a computer program stored on the memory and capable of running on the processor, wherein the computer program, when executed by the processor, implements the steps of the method for processing data as described above.
An embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, which, when executed by a processor, implements the steps of the method of data processing as above.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The foregoing detailed description is provided for the video networking terminal and the data processing method, and specific examples are applied in the detailed description to explain the principles and embodiments of the present invention, and the descriptions of the foregoing embodiments are only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (9)
1. A video networking terminal is characterized by comprising a central processing unit, a field programmable gate array and a video conversion chip;
the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips;
the central processing unit is used for decoding the compressed video stream into N paths of first uncompressed video streams when receiving the compressed video stream, packaging the selected M paths of first uncompressed video streams into a second uncompressed video stream, and sending the second uncompressed video stream to the corresponding field programmable gate array; wherein N is an integer greater than 0, M is an integer greater than 0 and less than or equal to N;
the field programmable gate array is used for analyzing the received second uncompressed video stream into the M paths of first uncompressed video streams and respectively sending the M paths of first uncompressed video streams to the corresponding video conversion chips;
the video conversion chip is used for carrying out format conversion on the received first non-compressed video stream and sending the format-converted first non-compressed video stream to a display screen.
2. The terminal of claim 1, wherein the central processor is further configured to:
for each field programmable gate array, determining selected M video identifications;
determining M paths of first uncompressed video streams corresponding to M video identifications from the N paths of first uncompressed video streams, and packaging the M paths of first uncompressed video streams into a second uncompressed video stream; wherein each first uncompressed video stream has a corresponding video identifier.
3. The terminal according to claim 1 or 2, wherein the central processor is further configured to:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames;
combining the M first video frames into a second video frame;
and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to a corresponding field programmable gate array.
4. The terminal of claim 3, wherein the field programmable gate array is further configured to:
extracting the second video frame from the received second uncompressed video stream;
analyzing the second video frames to obtain the M first video frames;
and generating the M paths of first uncompressed video streams corresponding to the M first video frames.
5. The terminal of claim 4, wherein the video networking terminal further comprises a memory connected to the field programmable gate array;
the memory is configured to cache the M first video frames after the field programmable gate array parses the second video frame to obtain the M first video frames.
6. The data processing method is characterized by being applied to a video network terminal, wherein the video network terminal comprises a central processing unit, a field programmable gate array and a video conversion chip;
the central processing unit is provided with one or more protocol interfaces, the one or more protocol interfaces are respectively connected with one field programmable gate array, and each field programmable gate array is connected with one or more video conversion chips;
the method comprises the following steps:
adopting the central processing unit, decoding the compressed video stream into N paths of first uncompressed video streams when receiving the compressed video stream, packaging the selected M paths of first uncompressed video streams into second uncompressed video streams, and sending the second uncompressed video streams to the corresponding field programmable gate array; wherein N is an integer greater than 0, M is an integer greater than 0 and less than or equal to N;
analyzing the received second uncompressed video stream into the M paths of first uncompressed video streams by adopting the field programmable gate array, and respectively sending the M paths of first uncompressed video streams to corresponding video conversion chips;
and adopting the video conversion chip to convert the format of the received first non-compressed video stream and sending the format-converted first non-compressed video stream to a display screen.
7. The method of claim 6, wherein the CPU selects the M first uncompressed video streams by:
for each field programmable gate array, determining selected M video identifications;
determining M paths of first uncompressed video streams corresponding to M video identifications from the N paths of first uncompressed video streams, and packaging the M paths of first uncompressed video streams into a second uncompressed video stream; wherein each first uncompressed video stream has a corresponding video identifier.
8. The method according to claim 6 or 7, wherein the step of encapsulating the selected M first uncompressed video streams into a second uncompressed video stream and sending the second uncompressed video stream to the corresponding field programmable gate array comprises:
extracting video frames of the M paths of first uncompressed video streams to obtain M first video frames;
combining the M first video frames into a second video frame;
and generating a second uncompressed video stream corresponding to the second video frame, and sending the second uncompressed video stream to a corresponding field programmable gate array.
9. The method of claim 8, wherein parsing the received second uncompressed video stream into the M-way first uncompressed video stream comprises:
extracting the second video frame from the received second uncompressed video stream;
analyzing the second video frames to obtain the M first video frames;
and generating the M paths of first uncompressed video streams corresponding to the M first video frames.
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