CN110707786A - Charging circuit - Google Patents
Charging circuit Download PDFInfo
- Publication number
- CN110707786A CN110707786A CN201911092767.0A CN201911092767A CN110707786A CN 110707786 A CN110707786 A CN 110707786A CN 201911092767 A CN201911092767 A CN 201911092767A CN 110707786 A CN110707786 A CN 110707786A
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- electrode
- tube
- npn
- resistor
- pmos
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- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention discloses a charging circuit. A charging circuit comprises a first resistor, a first PMOS (P-channel metal oxide semiconductor) transistor, a second PMOS transistor, a first NPN (negative-positive-negative) transistor, a second NPN transistor, a first PNP (positive-negative) transistor, a third PMOS transistor, a second resistor and a battery. The charging circuit provided by the invention can not damage the battery in the charging process, thereby effectively protecting the battery.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a charging circuit.
Background
In order to control the charging current of the battery in the charging process, the battery is prevented from being damaged.
Disclosure of Invention
The invention aims to solve the defects of the prior art and provides a charging circuit.
A charging circuit comprises a first resistor, a first PMOS (P-channel metal oxide semiconductor) transistor, a second PMOS transistor, a first NPN transistor, a second NPN transistor, a first PNP transistor, a third PMOS transistor, a second resistor and a battery:
one end of the first resistor is connected with a power supply voltage VCC, and the other end of the first resistor is connected with the drain electrode of the first PMOS tube, the base electrode and the collector electrode of the first NPN tube and the base electrode of the second NPN tube; the grid electrode of the first PMOS tube is connected with the grid electrode and the drain electrode of the second PMOS tube, the collector electrode of the second NPN tube and the grid electrode of the third PMOS tube, the drain electrode is connected with one end of the first resistor, the base electrode and the collector electrode of the first NPN tube and the base electrode of the second NPN tube, and the source electrode is connected with a power supply voltage VCC; the grid electrode and the drain electrode of the second PMOS tube are connected together and then connected with the grid electrode of the first PMOS tube, the collector electrode of the second NPN tube and the grid electrode of the third PMOS tube, and the source electrode is connected with a power supply voltage VCC; the base electrode and the collector electrode of the first NPN tube are connected together and then connected with one end of the first resistor, the drain electrode of the first PMOS tube and the base electrode of the second NPN tube, and the emitter electrode is grounded; the base electrode of the second NPN tube is connected with one end of the first resistor, the drain electrode of the first PMOS tube, the base electrode of the first NPN tube and the collector electrode of the first NPN tube, the collector electrode is connected with the grid electrode of the first PMOS tube, the grid electrode and the drain electrode of the second PMOS tube and the grid electrode of the third PMOS tube, and the emitter electrode is connected with the emitter electrode of the first PNP tube; the base electrode of the third PNP tube is grounded, the collector electrode of the third PNP tube is grounded, and the emitter electrode of the third PNP tube is connected with the emitter electrode of the second NPN tube; the grid electrode of the third PMOS tube is connected with the grid electrode of the first PMOS tube, the grid electrode and the drain electrode of the second PMOS tube and the collector electrode of the second NPN tube, the drain electrode is connected with one end of the second resistor, and the source electrode is connected with a power supply voltage VCC; one end of the second resistor is connected with the drain electrode of the third PMOS tube, and the other end of the second resistor is connected with the anode of the battery; the positive pole of the battery is connected with one end of the second resistor, and the negative pole of the battery is grounded.
The first resistor plays a role in starting, the resistance value of the first resistor can be larger, and the starting current is small; forming a path through the first resistor and the first NPN tube to generate a current mirror image to the second NPN tube, and then, performing mirror image to the third PMOS tube through the second PMOS tube to charge the battery; the BE junction voltage passing through the first NPN tube is added to a diode formed by the first PNP tube to generate current.
Drawings
Fig. 1 is a circuit diagram of a charging circuit according to the present invention.
Detailed Description
The present invention will be further explained with reference to the accompanying drawings.
A charging circuit, as shown in fig. 1, includes a first resistor 101, a first PMOS transistor 102, a second PMOS transistor 103, a first NPN transistor 104, a second NPN transistor 105, a first PNP transistor 106, a third PMOS transistor 107, a second resistor 108, and a battery 109:
one end of the first resistor 101 is connected to a power supply voltage VCC, and the other end is connected to the drain of the first PMOS transistor 102, the base and collector of the first NPN transistor 104, and the base of the second NPN transistor 105; the gate of the first PMOS transistor 102 is connected to the gate and the drain of the second PMOS transistor 103, the collector of the second NPN transistor 105, and the gate of the third PMOS transistor 107, the drain is connected to one end of the first resistor 101, the base and the collector of the first NPN transistor 104, and the base of the second NPN transistor 105, and the source is connected to the power supply voltage VCC; the gate and the drain of the second PMOS transistor 103 are connected together and then connected to the gate of the first PMOS transistor 102, the collector of the second NPN transistor 105, and the gate of the third PMOS transistor 107, and the source is connected to a power supply voltage VCC; the base electrode and the collector electrode of the first NPN transistor 104 are connected together and then connected to one end of the first resistor 101, the drain electrode of the first PMOS transistor 102 and the base electrode of the second NPN transistor 105, and the emitter electrode is grounded; the base electrode of the second NPN transistor 105 is connected to one end of the first resistor 101, the drain electrode of the first PMOS transistor 102, the base electrode and the collector electrode of the first NPN transistor 104, the collector electrode is connected to the gate electrode of the first PMOS transistor 102, the gate electrode and the drain electrode of the second PMOS transistor 103, and the gate electrode of the third PMOS transistor 107, and the emitter electrode is connected to the emitter electrode of the first PNP transistor 106; the base of the third PNP transistor 106 is grounded, the collector is grounded, and the emitter is connected to the emitter of the second NPN transistor 105; the gate of the third PMOS transistor 107 is connected to the gate of the first PMOS transistor 102, the gate and the drain of the second PMOS transistor 103, and the collector of the second NPN transistor 105, the drain is connected to one end of the second resistor 108, and the source is connected to the power supply voltage VCC; one end of the second resistor 108 is connected to the drain of the third PMOS transistor 107, and the other end is connected to the anode of the battery 109; the positive electrode of the battery 109 is connected to one end of the second resistor 108, and the negative electrode is grounded.
The first resistor 101 plays a role in starting, the resistance value of the first resistor 101 can be larger, and the starting current is small; a path is formed by the first resistor 101 and the first NPN transistor 104 to generate a current mirror image to the second NPN transistor 105, and then the current mirror image is mirrored by the second PMOS transistor 103 to the third PMOS transistor 107 to charge the battery 109; the voltage of the BE junction through the first NPN transistor 104 is applied to the diode formed by the first PNP transistor 106 to generate a current.
The description of the embodiments provided above is merely illustrative of preferred embodiments of the present invention, and it will be apparent to those skilled in the art that the present invention can be implemented or used in light of the above description. It should be noted that, for those skilled in the art, it is possible to make several modifications and variations without departing from the technical principle of the present invention, and any invention that does not depart from the scope of the essential spirit of the present invention should be construed as the scope of the present invention.
Claims (1)
1. A charging circuit, characterized by: comprises a first resistor, a first PMOS transistor, a second PMOS transistor, and a first NPN transistor
The transistor, a second NPN transistor, a first PNP transistor, a third PMOS transistor, a second resistor and a battery;
one end of the first resistor is connected with a power supply voltage VCC, and the other end of the first resistor is connected with the drain electrode of the first PMOS tube, the base electrode and the collector electrode of the first NPN tube and the base electrode of the second NPN tube; the grid electrode of the first PMOS tube is connected with the grid electrode and the drain electrode of the second PMOS tube, the collector electrode of the second NPN tube and the grid electrode of the third PMOS tube, the drain electrode is connected with one end of the first resistor, the base electrode and the collector electrode of the first NPN tube and the base electrode of the second NPN tube, and the source electrode is connected with a power supply voltage VCC; the grid electrode and the drain electrode of the second PMOS tube are connected together and then connected with the grid electrode of the first PMOS tube, the collector electrode of the second NPN tube and the grid electrode of the third PMOS tube, and the source electrode is connected with a power supply voltage VCC; the base electrode and the collector electrode of the first NPN tube are connected together and then connected with one end of the first resistor, the drain electrode of the first PMOS tube and the base electrode of the second NPN tube, and the emitter electrode is grounded; the base electrode of the second NPN tube is connected with one end of the first resistor, the drain electrode of the first PMOS tube, the base electrode of the first NPN tube and the collector electrode of the first NPN tube, the collector electrode is connected with the grid electrode of the first PMOS tube, the grid electrode and the drain electrode of the second PMOS tube and the grid electrode of the third PMOS tube, and the emitter electrode is connected with the emitter electrode of the first PNP tube; the base electrode of the third PNP tube is grounded, the collector electrode of the third PNP tube is grounded, and the emitter electrode of the third PNP tube is connected with the emitter electrode of the second NPN tube; the grid electrode of the third PMOS tube is connected with the grid electrode of the first PMOS tube, the grid electrode and the drain electrode of the second PMOS tube and the collector electrode of the second NPN tube, the drain electrode is connected with one end of the second resistor, and the source electrode is connected with a power supply voltage VCC; one end of the second resistor is connected with the drain electrode of the third PMOS tube, and the other end of the second resistor is connected with the anode of the battery; the positive pole of the battery is connected with one end of the second resistor, and the negative pole of the battery is grounded.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911092767.0A CN110707786A (en) | 2019-11-11 | 2019-11-11 | Charging circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201911092767.0A CN110707786A (en) | 2019-11-11 | 2019-11-11 | Charging circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110707786A true CN110707786A (en) | 2020-01-17 |
Family
ID=69205596
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201911092767.0A Withdrawn CN110707786A (en) | 2019-11-11 | 2019-11-11 | Charging circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110707786A (en) |
-
2019
- 2019-11-11 CN CN201911092767.0A patent/CN110707786A/en not_active Withdrawn
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Legal Events
Date | Code | Title | Description |
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PB01 | Publication | ||
PB01 | Publication | ||
WW01 | Invention patent application withdrawn after publication |
Application publication date: 20200117 |
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WW01 | Invention patent application withdrawn after publication |