CN110704342A - Peripheral chip, application processor, terminal device and communication method - Google Patents

Peripheral chip, application processor, terminal device and communication method Download PDF

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Publication number
CN110704342A
CN110704342A CN201910893303.3A CN201910893303A CN110704342A CN 110704342 A CN110704342 A CN 110704342A CN 201910893303 A CN201910893303 A CN 201910893303A CN 110704342 A CN110704342 A CN 110704342A
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China
Prior art keywords
application processor
peripheral chip
log information
chip
peripheral
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CN201910893303.3A
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Chinese (zh)
Inventor
方攀
陈岩
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Guangdong Oppo Mobile Telecommunications Corp Ltd
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Priority to CN201910893303.3A priority Critical patent/CN110704342A/en
Publication of CN110704342A publication Critical patent/CN110704342A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • G06F13/1673Details of memory controller using buffers

Abstract

The invention provides a communication method of a peripheral chip and an application processor, a computer readable storage medium, a mobile terminal, a communication method and a communication device of the peripheral chip, and a communication method and a communication device of the application processor. The method comprises the following steps: the peripheral chip internally temporarily stores the log information; the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes: the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and the application processor actively reads the log information. The scheme can save system resources.

Description

Peripheral chip, application processor, terminal device and communication method
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a peripheral chip, an application processor, a terminal device, and a communication method.
Background
The periphery of the Application Processor (AP) of the user terminal is usually configured with a dedicated peripheral chip, such as a Digital Signal Processor (DSP) or the like. These chips are mainly used for some special function applications, such as low power audio scene applications. During the above-mentioned interactive work between the application processor and the peripheral chip, the peripheral chip will generate some log information for debugging the code.
In the related art, the log information of the peripheral chip is reported to the user terminal through the serial port by the print command, and is used for debugging the code of the peripheral chip. The files are input into the user terminal in a serial port mode through a printing command, data needs to be written into the user terminal by one byte, and therefore resources of a peripheral chip need to be occupied, and time is consumed.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a peripheral chip, an application processor, a terminal device and a communication method, which can facilitate debugging and save system resources.
In order to solve the above problem, the present invention provides a communication method between a peripheral chip and an application processor, comprising the following steps: the peripheral chip internally temporarily stores the log information; the log information is uploaded to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes: the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and the application processor actively reads the log information.
In order to solve the above problem, the present invention provides a terminal device, including a peripheral chip and an application processor, the peripheral chip and the application processor being configured to execute the following steps: the peripheral chip internally temporarily stores the log information; the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes: the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and the application processor actively reads the log information.
In order to solve the above problems, the present invention provides a communication method of a peripheral chip, which is used for communicating with an application processor, and comprises the following steps: the peripheral chip internally temporarily stores the log information; the peripheral chip uploads the temporarily stored log information to the application processor, the uploading is implemented through a data channel between the peripheral chip and the application processor, and the uploading step is initiated in any one of the following two modes: the peripheral chip actively sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor so as to initiate the uploading step; and the peripheral chip receives the request of reading the log information actively initiated by the application processor and initiates an uploading step.
In order to solve the above problems, the present invention provides a communication method of an application processor, for communicating with a peripheral chip, comprising the steps of: the application processor reads and stores the log information temporarily stored in the peripheral chip, the log information is uploaded to the application processor through a data channel, and the initiation mode of the reading step is selected from any one of the following two modes: the application processor initiates the reading step according to a request of the peripheral chip, and the request is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor; and the application processor actively initiates a request for reading the log information to the peripheral chip.
In order to solve the above problem, the present invention provides a peripheral chip including the following units for communicating with an application processor: the cache unit is used for temporarily storing the log information internally; an uploading unit, configured to upload the temporarily stored log information to the application processor, where the uploading is performed through a data channel between the peripheral chip and the application processor, and a starting condition of the uploading unit is selected from any one of the following two cases: the peripheral chip actively sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor so as to start an uploading unit; and the peripheral chip receives a request for reading the log information, which is actively initiated by the application processor, so as to start an uploading unit.
In order to solve the above problem, the present invention provides an application processor, which is characterized by comprising the following units for communicating with a peripheral chip: the log information reading unit is used for reading and storing the log information temporarily stored in the peripheral chip, the log information is uploaded to the application processor through a data channel, and the starting mode of the log information reading unit is selected from any one of the following two modes: the log information reading unit of the application processor starts the log information reading unit according to a request of the peripheral chip, and the request is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor; and the log information reading unit of the application processor actively initiates a request for reading the log information.
In the technical scheme, the log file is not transmitted by a serial port through a printing protocol, because the processing speed of the serial port is very low and the serial port occupies resources, and peripheral chips are usually small chips and have limited resources. The log information to be uploaded is directly written into the memory of the application processor through the data channel, so that the debugging of the peripheral chip is facilitated, and the operation resource of the peripheral chip is saved. The data channel and the control channel are used for transmission instead of a serial port mode, and limited resources can be completely used for realizing the operation of important functions of the chip, so that system resources are saved.
Drawings
Fig. 1 is a schematic diagram illustrating steps of a communication method between a peripheral chip and an application processor according to an embodiment of the present invention.
Fig. 2 is a schematic diagram illustrating structures of buffers respectively disposed in a digital signal processing chip and an application processor according to an embodiment of the present invention.
Fig. 3 is a schematic diagram illustrating a communication mode between a digital signal processing chip and a control channel of an application processor according to an embodiment of the present invention.
Fig. 4 is a schematic diagram illustrating a data channel communication manner between a digital signal processing chip and an application processor according to an embodiment of the present invention.
Fig. 5 is a schematic diagram illustrating steps of a communication method between a peripheral chip and an application processor according to an embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a user terminal according to an embodiment of the present invention.
Fig. 7 is a schematic diagram illustrating steps of a communication method of a peripheral chip according to an embodiment of the present invention.
Fig. 8 is a schematic diagram illustrating steps of a communication method of a peripheral chip according to an embodiment of the present invention.
Fig. 9 is a schematic diagram illustrating steps of a communication method of an application processor according to an embodiment of the present invention.
Fig. 10 is a schematic diagram illustrating steps of a communication method implemented by an application processor according to an embodiment of the present invention.
Detailed Description
The following describes in detail specific embodiments of a peripheral chip, an application processor, a terminal device, and a communication method according to the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic diagram illustrating implementation steps of a specific embodiment of a communication method between a peripheral chip and an application processor according to the present invention, including: step S10, the peripheral chip internally temporarily stores the log information; step S11, the peripheral chip sends an upload request to the application processor through a control channel between the peripheral chip and the application processor; step S12, the peripheral chip uploads the log information to the application processor through the data channel between the peripheral chip and the application processor; and step S13, the peripheral chip marks the uploaded log information.
In this embodiment, the peripheral chip is a digital signal processing chip, and may be configured to process an audio signal, and the log information is a log file. In other embodiments, the peripheral chip may also be other small chips that need to interact with the application processor, such as an audio/video codec chip, a radio frequency transceiver chip, and the like.
Referring to step S10, the peripheral chip internally buffers the log information. In this embodiment, in order to ensure that there is enough space for storing log information, a buffer area including a plurality of storage units (slots) is provided in the peripheral chip for temporarily storing the log information, and the application processor also allocates a corresponding buffer area from the memory of the application processor. In this embodiment, the buffer structures respectively disposed in the digital signal processing chip 21 and the application processor 20 are as shown in fig. 2. A buffer 211(log buffer) including a plurality of storage units for storing a log file may be divided in a storage area, such as a Static Random Access Memory (SRAM), in the digital signal processing chip 21. In the present embodiment, 8 memory cells are illustrated as 211a to 211 h. In this step, the digital signal processing chip 21 is additionally required to report the setting rule of the buffer 211 to the application processor 20, so that the application processor 20 establishes a corresponding area for storing the log file reported by the digital signal processing chip 21. The setting rule includes, but is not limited to, the total storage space of the buffer 211, the number of included storage units, and the storage space of each storage unit, etc. For example, the size of the buffer may be 1024 bytes, the size of the memory unit is 128 bytes, and there are 8 memory units in the buffer. Similarly, after the digital signal processing chip 21 is initialized, the application processor 20 is notified of the sizes of the buffer and the storage unit of the digital signal processing chip 21, and the application processor 20 also allocates a buffer from the memory of the application processor 20, and divides the buffer into not less than 8 storage units, each of which has a space of not less than 128 bytes and is used for storing log information from the peripheral chip, and in the present embodiment, is used for storing a log file from the digital signal processing chip 21.
Referring to step S11, the peripheral chip sends an upload request to the application processor through a control channel between the peripheral chip and the application processor. This step may be initiated by the peripheral chip obtaining an external command, or by the peripheral chip having been filled with memory locations in the buffer, or by the peripheral chip having reached a threshold level of memory occupancy in the buffer. In this embodiment, the control channel communication mode between the digital signal processing chip 21 and the application processor 20 is as shown in fig. 3. The control channels of the application processor 20 and the digital signal processing chip 21 are mainly implemented by a mailbox (mailbox) hardware communication mechanism, for example, the digital signal processing chip 21 needs to send an interrupt to the application processor 20, and only needs to write the corresponding command (cmd) and data (data) values into the relevant registers. When the application processor 20 reads the commands and data, the interrupt is executed to process the request from the dsp chip 21, which is similar to the workflow of sending and receiving mail. The command is transmitted through the control channel between the chips, and serial port resources are not occupied.
Referring to step S12, the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor. In this embodiment, the data channel communication mode between the digital signal processing chip 21 and the application processor 20 is shown in fig. 4. The communication mode of the data channel between the digital signal processing chip 21 and the application processor 20 is also that the digital signal processing chip 21 notifies the application processor 20 through the mailbox, the buffer address and size on the digital signal processing chip 21 side, and the application processor 20 directly reads and writes the data with the specified address size in the SRAM on the digital signal processing chip 21 side through the SPI2 APB. In this step, the log file is not transmitted through the printing protocol by using the serial port, because the processing speed of the serial port is very slow and occupies resources, and the peripheral chips are usually small chips and have limited resources. The log file is directly written into the memory of the application processor through the data channel, so that the operation resource of the digital signal processing chip is saved, and the limited resource can be completely used for realizing the operation of the important function of the functions of the chip.
Referring to step S13, the peripheral chip marks the uploaded log information. In this embodiment, further, in order to ensure that the log file is not repeatedly read and written, the dsp 21 may establish a slot index (slot index) to mark the occupied status of the current log information to the storage unit, and in case that the dsp 21 actively needs to send the log information to the application processor 20 or the storage unit in the buffer is already occupied, the dsp 21 actively sends a message to the application processor 20 to notify the application processor 20 to read the log information. During the reading process, the dsp 21 may actively update the index of the memory cell to record the condition that the log information is read. The purpose of the recording may be to delete the log file being read, or to prevent repeated reads. Specifically, after the peripheral chip is initialized, any log information (log) is printed, and the log information (log) is stored in a log buffer (log buffer) temporarily by default, each log (log) occupies the space of one storage unit (slot), and the slot index is used for recording that the current log records the number of slots. When the peripheral chip actively wants to send the log to the AP or the slot in the log buffer is used up, the peripheral chip actively sends a message to the AP to inform the AP to read the log. After the AP reads, the peripheral chip records the read slot index into the previous slot index variable to mark the position where the AP reads. For example, if the index is 5, the AP is notified to read, and after reading, the peripheral chip writes 5 into the previous slot index variable, so as to mark the log information read by the AP into the 5 th slot. Subsequently, after writing a log into the log buffer by the peripheral chip, taking the remainder of the value of the total number of the storage units (slot N) through the slot index to determine that the written log is temporarily stored by using the several slots, and adding 1 to the slot index to prepare for the next written log. For example, there are 10 slots in total, then slot N is 10. And the current slot index is 6, after a log is written in, the current slot index takes the remainder of the slot N, the slot N is stored in the 6 th slot, and the value of the slot index is added with 1 to take 7. Thus, when the log is written next time, the 7 th slot can be determined to be used for temporarily storing the log written next time by taking the remainder. The present mechanism also supports the AP to actively read the log on the DSP side as well.
Fig. 5 is a schematic diagram illustrating implementation steps of a specific embodiment of a communication method between a peripheral chip and an application processor according to the present invention, including: step S50, the peripheral chip internally temporarily stores the log information; step S51, the application processor actively initiates a request for reading the log information; step S52, the peripheral chip uploads the log information to the application processor through the data channel between the peripheral chip and the application processor; and step S53, the peripheral chip marks the uploaded log information.
In this embodiment, the peripheral chip is a digital signal processing chip, and may be configured to process an audio signal, and the log information is a log file. In other embodiments, the peripheral chip may be other small chips that need to interact with the application processor.
Referring to step S50, the peripheral chip internally buffers the log information. In this embodiment, in order to ensure that there is enough space for storing log information, a buffer area including a plurality of storage units (slots) is provided in the peripheral chip for temporarily storing the log information, and the application processor also allocates a corresponding buffer area from the memory of the application processor. In this embodiment, the buffer structures respectively disposed in the digital signal processing chip and the application processor can be referred to fig. 2 of the previous embodiment. A buffer 211(log buffer) including a plurality of memory cells for storing a log file may be opened up in the SRAM in the digital signal processing chip 21. The dsp chip 21 reports the setting rule of the buffer 211 to the application processor 20, and the application processor 20 also allocates a buffer from the memory of the application processor 20 for storing the log file from the dsp chip 21.
Referring to step S51, the application processor actively initiates a request to read log information. In this embodiment, referring to fig. 3 of the previous embodiment, the communication mode between the dsp chip 21 and the control channel of the application processor 20 is mainly implemented by mailbox hardware. The request to read the log file is initiated actively by the application processor 20. The application processor 20 actively sends a read request to the digital signal processing chip 21 via the mailbox.
Referring to step S52, the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor. In this embodiment, the communication mode of the digital signal processing chip 21 and the data channel of the application processor 20 can be referred to as shown in fig. 4 of the previous embodiment. The communication mode of the data channel between the digital signal processing chip 21 and the application processor 20 is also that the digital signal processing chip 21 notifies the application processor 20 through the mailbox, the buffer address and size on the digital signal processing chip 21 side, and the application processor 20 directly reads and writes the data with the specified address size in the SRAM on the digital signal processing chip 21 side through the SPI2 APB. SPI2APB refers to the connection mode of the Spi bus and the APB bus.
Referring to step S53, the peripheral chip marks the uploaded log information. In this embodiment, further, in order to ensure that the log file is not repeatedly read and written, the dsp 21 may establish a slot index (slot index) to record the occupation of the current log file to the storage unit, and when the dsp 21 actively needs to send the log file to the application processor 20 or the storage unit in the buffer is already occupied, the dsp 21 actively sends a message to the application processor 20 to notify the application processor 20 to read the log file. During the reading process, the dsp 21 may actively update the index of the storage unit to record the condition that the log file is read. The purpose of the recording may be to delete the log file being read, or to prevent repeated reads.
Fig. 6 is a schematic diagram illustrating an embodiment of the computer-readable storage medium 6 according to the present invention, where the computer-readable storage medium 6 includes a peripheral chip 61 and an application processor 60, and the peripheral chip 61 and the application processor 60 are configured to perform the following steps, and the peripheral chip performs internal temporary storage on log information; the log information is uploaded to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes: the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and the application processor actively reads the log information.
Reference may be made to the foregoing embodiments of steps S10-S13, or steps S50-S53, and the corresponding drawings.
Fig. 6 is a schematic diagram illustrating a specific embodiment of the user terminal according to the present invention, where the user terminal 6 includes a peripheral chip 61 and an application processor 60, and the peripheral chip 61 and the application processor 60 are configured to perform the following steps, and the peripheral chip internally buffers log information; the log information is uploaded to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes: the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and the application processor actively reads the log information.
Reference may be made to the foregoing embodiments of steps S10-S13, or steps S50-S53, and the corresponding drawings.
Fig. 7 is a schematic diagram illustrating implementation steps of a specific embodiment of a communication method for a peripheral chip according to the present invention, for communicating with an application processor, including: step S70, the peripheral chip internally temporarily stores the log information; step S71, the peripheral chip actively sends an upload request to the application processor through a control channel between the peripheral chip and the application processor; and step S72, the peripheral chip uploads the temporarily stored log information to the application processor through a data channel.
Referring to step S70, the peripheral chip internally buffers the log information. In this embodiment, in order to ensure that there is enough space for storing log information, a buffer area including a plurality of storage units (slots) is set in the peripheral chip for temporarily storing the log information, and an external application processor is notified to allocate a corresponding buffer area from a memory of the application processor. The arrangement can be seen with reference to fig. 2.
Referring to step S71, the peripheral chip actively sends an upload request to the application processor through a control channel between the peripheral chip and the application processor. This step may be initiated by the peripheral chip obtaining an external command, or by the peripheral chip having been filled with memory locations in the buffer, or by the peripheral chip having reached a threshold level of memory occupancy in the buffer. In this embodiment, the control channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 3. The control channels of the application processor and the digital signal processing chip are mainly realized through a mailbox (mailbox) hardware communication mechanism. This mechanism is similar to the workflow of sending and receiving mail. The command is transmitted through the control channel between the chips, and serial port resources are not occupied.
Referring to step S72, the peripheral chip uploads the temporarily stored log information to the application processor through a data channel. In this embodiment, the data channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 4. The digital signal processing chip and the application processor data channel also communicate in such a way that the digital signal processing chip 21 informs the application processor 20 via the mailbox. The log file is directly written into the memory of the application processor through the data channel, so that the operation resource of the digital signal processing chip is saved, and the limited resource can be completely used for realizing the operation of the important function of the functions of the chip.
Fig. 8 is a schematic diagram illustrating implementation steps of a specific embodiment of a communication method for a peripheral chip according to the present invention, for communicating with an application processor, including: step S80, the peripheral chip internally temporarily stores the log information; step S81, the peripheral chip receives the request of the application processor actively initiating the reading of the log information through the control channel; and step S82, the peripheral chip uploads the temporarily stored log information to the application processor through a data channel.
Referring to step S80, the peripheral chip internally buffers the log information. In this embodiment, in order to ensure that there is enough space for storing log information, a buffer area including a plurality of storage units (slots) is set in the peripheral chip for temporarily storing the log information, and an external application processor is notified to allocate a corresponding buffer area from a memory of the application processor. The arrangement can be seen with reference to fig. 2.
Referring to step S81, the peripheral chip receives a request for the application processor to actively initiate reading log information through the control channel. In this embodiment, reference may be made to fig. 3 of the foregoing embodiment for a communication manner between the digital signal processing chip and the control channel of the application processor, where the communication is mainly implemented by mailbox hardware. The request to read the log file is initiated actively by the application processor. The application processor actively sends a reading request to the digital signal processing chip through the mailbox.
And step S82, the peripheral chip uploads the temporarily stored log information to the application processor through a data channel. In this embodiment, the communication mode of the digital signal processing chip and the data channel of the application processor can be referred to as fig. 4 of the foregoing embodiment. The communication mode of the data channel between the digital signal processing chip and the application processor is also that the digital signal processing chip informs the application processor through the mailbox. The data channel is adopted to save the operation resources of the digital signal processing chip, and the limited resources can be completely used for realizing the operation of the important functions of the chip.
The method of the embodiments corresponding to fig. 7 and 8 may be used to configure a peripheral chip, and includes the following elements for communicating with an application processor: the cache unit is used for temporarily storing the log information internally; an uploading unit, configured to upload the temporarily stored log information to the application processor, where the uploading is performed through a data channel between the peripheral chip and the application processor, and a starting condition of the uploading unit is selected from any one of the following two cases: the peripheral chip actively sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor so as to start an uploading unit; and the application processor actively initiates an uploading request to the peripheral chip through the control channel so as to start the uploading unit.
Fig. 9 is a schematic diagram illustrating implementation steps of an embodiment of a communication method of an application processor according to the present invention, for communicating with a peripheral chip, including: step S91, the application processor initiates a reading step according to the request of the peripheral chip, the request is sent to the application processor by the peripheral chip through the control channel between the peripheral chip and the application processor; step S92, the application processor reads and stores the log information temporarily stored in the peripheral chip through the data channel.
Referring to step S91, the application processor initiates a reading step according to a request of the peripheral chip, which is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor. In this embodiment, the control channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 3. The control channels of the application processor and the digital signal processing chip are mainly realized through a mailbox (mailbox) hardware communication mechanism. This mechanism is similar to the workflow of sending and receiving mail. The command is transmitted through the control channel between the chips, and serial port resources are not occupied.
Referring to step S92, the application processor reads and stores the log information temporarily stored in the peripheral chip through the data channel. In this embodiment, the data channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 4. The digital signal processing chip and the application processor data channel also communicate in such a way that the digital signal processing chip 21 informs the application processor 20 via the mailbox. The log file is directly written into the memory of the application processor through the data channel, so that the operation resource of the digital signal processing chip is saved, and the limited resource can be completely used for realizing the operation of the important function of the functions of the chip.
Fig. 10 is a schematic diagram illustrating implementation steps of an embodiment of a communication method of an application processor according to the present invention, for communicating with a peripheral chip, including: step S1001, the application processor actively initiates a request for reading log information through a control channel; step S1002, the application processor reads and stores the log information temporarily stored in the peripheral chip through the data channel.
Referring to step S1001, the application processor actively initiates a request for reading log information through a control channel. In this embodiment, the control channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 3. The control channels of the application processor and the digital signal processing chip are mainly realized through a mailbox (mailbox) hardware communication mechanism. This mechanism is similar to the workflow of sending and receiving mail. The command is transmitted through the control channel between the chips, and serial port resources are not occupied.
Referring to step S1002, the application processor reads and stores the log information temporarily stored in the peripheral chip through the data channel. In this embodiment, the data channel communication mode between the digital signal processing chip and the application processor can be referred to the aforementioned fig. 4. The digital signal processing chip and the application processor data channel also communicate in such a way that the digital signal processing chip 21 informs the application processor 20 via the mailbox. The log file is directly written into the memory of the application processor through the data channel, so that the operation resource of the digital signal processing chip is saved, and the limited resource can be completely used for realizing the operation of the important function of the functions of the chip.
The method of the embodiments corresponding to fig. 9 and 10 may be used to configure an application processor, and includes the following elements for communicating with a peripheral chipset: the log information reading unit is used for reading and storing the log information temporarily stored in the peripheral chip, the log information is uploaded to the application processor through a data channel, and the starting mode of the log information reading unit is selected from any one of the following two modes: the log information reading unit of the application processor starts the log information reading unit according to a request of the peripheral chip, and the request is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor; and the log information reading unit of the application processor actively initiates a request for acquiring the log information.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (12)

1. A communication method of a peripheral chip and an application processor is characterized by comprising the following steps:
the peripheral chip internally temporarily stores the log information;
the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes:
the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and
the application processor actively reads log information.
2. The method of claim 1, wherein the peripheral chip is a digital signal processing chip and the log information is a log file.
3. The method according to claim 1, wherein a buffer area including a plurality of storage units is disposed in the peripheral chip, and the buffer area is used for temporarily storing the log information and reporting a setting rule of the buffer area to the application processor, so that the application processor establishes a corresponding area for storing the log information reported by the peripheral chip.
4. The method of claim 3, wherein the setting rule comprises a total storage space of the buffer, a number of the storage units included, and a storage space of each of the storage units.
5. The method according to claim 3, wherein the log information includes a plurality of log information, and each of the storage units is configured to store one of the log information.
6. The method according to claim 5, wherein the peripheral chip records the number of the stored log information, and initiates an upload request in a manner of sending the upload request to the application processor through a control channel between the peripheral chip and the application processor when the number of the log information reaches a set threshold; wherein the threshold is not greater than the number of memory cells.
7. The method according to claim 1, 5 or 6, wherein the log information comprises a plurality of log information, and the uploaded log information is marked by the peripheral chip to avoid repeated uploading.
8. A terminal device comprising a peripheral chip and an application processor, wherein the peripheral chip and the application processor are configured to perform the steps of:
the peripheral chip internally temporarily stores the log information;
the peripheral chip uploads the log information to the application processor through a data channel between the peripheral chip and the application processor, and the initiating mode of the step is selected from any one of the following two modes:
the peripheral chip sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor; and
the application processor actively reads log information.
9. A communication method for a peripheral chip, for communicating with an application processor, comprising the steps of:
the peripheral chip internally temporarily stores the log information;
the peripheral chip uploads the temporarily stored log information to the application processor, the uploading is implemented through a data channel between the peripheral chip and the application processor, and the uploading step is initiated in any one of the following two modes:
the peripheral chip actively sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor so as to initiate the uploading step; and
and the peripheral chip receives a request for reading the log information, which is actively initiated by the application processor, and initiates an uploading step.
10. A communication method for an application processor, for communicating with a peripheral chip, comprising the steps of:
the application processor reads and stores the log information temporarily stored in the peripheral chip, the log information is uploaded to the application processor through a data channel, and the initiation mode of the reading step is selected from any one of the following two modes:
the application processor initiates the reading step according to a request of the peripheral chip, and the request is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor; and
and the application processor actively initiates a request for reading the log information to the peripheral chip.
11. A peripheral chip comprising the following elements for communicating with an application processor: the cache unit is used for temporarily storing the log information internally;
an uploading unit, configured to upload the temporarily stored log information to the application processor, where the uploading is performed through a data channel between the peripheral chip and the application processor, and a starting condition of the uploading unit is selected from any one of the following two cases:
the peripheral chip actively sends an uploading request to the application processor through a control channel between the peripheral chip and the application processor so as to start an uploading unit; and
and the peripheral chip receives a request for reading the log information, which is actively initiated by the application processor, so as to start an uploading unit.
12. An application processor comprising the following elements for communicating with a peripheral chip: the log information reading unit is used for reading and storing the log information temporarily stored in the peripheral chip, the log information is uploaded to the application processor through a data channel, and the starting mode of the log information reading unit is selected from any one of the following two modes:
the log information reading unit of the application processor starts the log information reading unit according to a request of the peripheral chip, and the request is sent to the application processor by the peripheral chip through a control channel between the peripheral chip and the application processor; and
and the log information reading unit of the application processor actively initiates a request for reading the log information.
CN201910893303.3A 2019-09-20 2019-09-20 Peripheral chip, application processor, terminal device and communication method Pending CN110704342A (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050138471A1 (en) * 2003-11-17 2005-06-23 International Business Machines Corporation Apparatus, method, and system for logging diagnostic information
CN104216806A (en) * 2014-07-24 2014-12-17 英方软件(上海)有限公司 Capture and transmission method for serialized operation logs of file system and system thereof
CN104424144A (en) * 2013-08-21 2015-03-18 展讯通信(上海)有限公司 Log data processing system and processing method
CN107577542A (en) * 2017-09-13 2018-01-12 广东欧珀移动通信有限公司 Log information report method, device, storage medium and mobile terminal
CN107609117A (en) * 2017-09-13 2018-01-19 广东欧珀移动通信有限公司 Log information report method, device and storage medium, ADSP and terminal

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050138471A1 (en) * 2003-11-17 2005-06-23 International Business Machines Corporation Apparatus, method, and system for logging diagnostic information
CN104424144A (en) * 2013-08-21 2015-03-18 展讯通信(上海)有限公司 Log data processing system and processing method
CN104216806A (en) * 2014-07-24 2014-12-17 英方软件(上海)有限公司 Capture and transmission method for serialized operation logs of file system and system thereof
CN107577542A (en) * 2017-09-13 2018-01-12 广东欧珀移动通信有限公司 Log information report method, device, storage medium and mobile terminal
CN107609117A (en) * 2017-09-13 2018-01-19 广东欧珀移动通信有限公司 Log information report method, device and storage medium, ADSP and terminal

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