CN110704006B - Multi-screen picture display method and device, terminal equipment and storage medium - Google Patents
Multi-screen picture display method and device, terminal equipment and storage medium Download PDFInfo
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- CN110704006B CN110704006B CN201910931724.0A CN201910931724A CN110704006B CN 110704006 B CN110704006 B CN 110704006B CN 201910931724 A CN201910931724 A CN 201910931724A CN 110704006 B CN110704006 B CN 110704006B
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Abstract
The method calculates the reference current under the current resistance value according to the path resistance between the video output module and the target screen by adjusting the driving capability of the video output module, and outputs the corresponding driving current, thereby realizing the display requirement of video output on a plurality of screens. Compared with an active driving shunt mode, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, and the corresponding reference current is obtained by depending on the resistance of the obtaining circuit, so that the cost advantage is obvious.
Description
Technical Field
The application belongs to the technical field of video transmission, and particularly relates to a multi-screen picture display method, a device, terminal equipment and a storage medium.
Background
The homologous multi-screen display means that one video output picture can be displayed on a plurality of video input devices, and pictures on a plurality of display devices are homologous. For example, in a security system, a video recorder device has a scene that multiple displays play the same video at the same time, and at this time, video signals need to be transmitted to multiple display screens by a branching technique through outputting a video signal of a master control original single channel. In the prior art, the master video output is usually not directly connected to the display, but is output to an active driving unit, and then connected to a plurality of displays through the active driving unit to play the homologous video signals. Although the voltage of the display terminal is normal due to the addition of the active driving circuit, the picture display effect is normal, and the picture display accords with the video transmission standard (Video Graphics Array, VGA), the addition of an additional driving circuit part is required, more device cost is increased, and the stability of the added circuit part also affects the stability of the whole display system.
In summary, the current homologous multi-screen display has the problems of complex system structure and unstable display system.
Disclosure of Invention
The embodiment of the application provides a multi-screen picture display method, a multi-screen picture display device, terminal equipment and a storage medium, which can solve the problems of complex system structure and unstable display system of homologous multi-screen display.
In a first aspect, an embodiment of the present application provides a multi-screen display method, including:
transmitting the video signal to a target screen;
acquiring path resistance between the video signal and the target screen from the video output module;
adjusting a reference current according to the resistance value of the path resistor;
and outputting a corresponding driving current to the target screen.
In one embodiment, before the step of transmitting the video signal to the target screen, the method comprises:
establishing an output path between the target screen and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship;
acquiring a screen access signal transmitted by the first path; the screen access signal is used for determining that the target screen is accessed to the video output module;
And transmitting the RGB video signals to a target screen through the second path.
In an embodiment, the first path includes a detection unit connected to the insertion pin;
the step of obtaining the screen access signal transmitted by the first path comprises the following steps:
acquiring the level state of the inserted pin;
if the level state is a high level state, judging that the inserted pin is not connected with the target screen;
and if the level state is a low level state, judging that the insertion pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.
In an embodiment, the obtaining the path resistance of the video signal from the video output module to the target screen includes:
acquiring a video output resistor built in the video output module;
acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel;
calculating a first final resistance value according to the video output resistor and the screen matching resistor; the first final resistance is the resistance of the path resistor.
In an embodiment, the target screens have N, where N is a positive integer greater than 1, and screen matching resistors in the N target screens are connected in parallel with each other;
The step of obtaining the screen matching resistor built in the target screen comprises the following steps:
acquiring all built-in screen matching resistors of the target screen;
calculating second final resistance values of all the screen matching resistors in the parallel state; and the second final resistance value is the screen matching resistance of all the target screens.
In one embodiment, one of the target screens is connected to one of the plug-in pins;
the step of calculating the second final resistance value of all the screen matching resistors in the parallel state comprises the following steps:
acquiring the level states of all the inserted pins at preset time intervals;
determining the number of the accessed target screens according to the level state;
and calculating second final resistance values of all the screen matching resistors in the parallel state according to the number of the target screens.
In one embodiment, the step of adjusting the reference current according to the resistance of the path resistor includes:
and calculating the value of the reference current under the current resistance value of the path resistor according to a video transmission standard protocol.
In a second aspect, an embodiment of the present application provides a multi-screen display device, including:
the first transmission module is used for transmitting the video signal to the target screen;
The first acquisition module is used for acquiring the path resistance between the video signal from the video output module to the target screen;
the second acquisition module is used for adjusting the reference current according to the resistance value of the path resistor;
and the output module is used for outputting corresponding driving current to the target screen.
In a third aspect, an embodiment of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the multi-screen display method according to any one of the first aspects when the processor executes the computer program.
In a fourth aspect, embodiments of the present application provide a computer readable storage medium storing a computer program which, when executed by a processor, implements a multi-screen display method according to any one of the first aspects.
In a fifth aspect, embodiments of the present application provide a computer program product, which when run on a terminal device, causes the terminal device to perform the multi-screen display method according to any one of the first aspects above.
It will be appreciated that the advantages of the second to fifth aspects may be found in the relevant description of the first aspect, and are not described here again.
Compared with the prior art, the embodiment of the application has the beneficial effects that: according to the method and the device, the driving capability of the video output module is adjusted, the reference current under the current resistance is calculated according to the path resistance between the video output module and the target screen, and the corresponding driving current is output, so that the requirement that video output is displayed on a plurality of screens is met. Compared with an active driving shunt mode, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, and the corresponding reference current is obtained by depending on the resistance of the obtaining circuit, so that the cost advantage is obvious.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required for the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic flow chart of an implementation of a multi-screen display method according to an embodiment of the present application;
fig. 2 is a schematic flow chart of another implementation of the multi-screen display method provided in the embodiment of the present application;
fig. 3 is a schematic structural diagram of a multi-screen display device according to an embodiment of the present application;
fig. 4 is another schematic structural diagram of a multi-screen display device according to an embodiment of the present application;
FIG. 5 is an annotation diagram of VGA interface in a multi-screen display device according to an embodiment of the present application;
fig. 6 is a schematic flowchart of still another implementation of the multi-screen display method according to the embodiment of the present application;
fig. 7 is a schematic view of a part of a structure of a multi-screen display device according to an embodiment of the present application;
fig. 8 is a schematic flow chart of still another implementation of the multi-screen display method according to the embodiment of the present application;
fig. 9 is a schematic diagram of a simple structure of parallel connection in the multi-screen display method according to the embodiment of the present application;
fig. 10 is a schematic diagram of a simple structure of a serial connection in the multi-screen display method according to the embodiment of the present application;
fig. 11 is a schematic structural diagram of a multi-screen display device according to an embodiment of the present disclosure;
fig. 12 is a schematic structural diagram of a terminal device provided in an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system configurations, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
The execution subject of the flow in the application is a video output module, and the video output module can be specifically applied to devices such as a DVD player, a computer device, a tablet computer, a smart phone, and the like, which is not limited. Fig. 1 shows a flowchart of an implementation of the multi-screen display method provided in embodiment 1 of the present invention, which is described in detail below:
S101, transmitting a video signal to a target screen.
In this embodiment, the above-mentioned video signals include, but are not limited to, three primary colors (RGB) signals, luminance (Y) signals, composite video signals (CVBS), radio frequency signals (RF), etc., and the video signals used in this application are RGB video signals, specifically, each of RGB (red, green, blue) colors may be represented by three variables for representing intensities of red, green, and blue colors, for recording and displaying color images, and outputting RGB video signals to a target screen so as to display color graphics on the target screen.
The target screen includes, but is not limited to, a computer display, a television display, a camera display, etc., and is configured to establish a connection with the video output module, receive the RGB video signal transmitted by the video output module, and display a corresponding picture on the display, which is not limited thereto.
S102, acquiring path resistance between the video signal and the target screen from the video output module.
In application, the path resistance is all the resistances between the RGB video signals output by the video output module and the target screen, and may be considered as all the resistances passed when the current output by the video output module flows into the target screen, which is not limited. The output of the video output module contains a display standard digital-to-analog converter (VGADAC) using analog signals, where VGA is a video transmission sign and DAC is a device that converts digital signals into analog signals (in the form of current, voltage or charge) that can be converted into analog signals so that they can be recognized by the outside world (not a digital system). In this application, VGADAC is used to output standard RGB video signals to a target screen, and the path resistances of the RGB video signals will not be uniform according to the resistance values of the path resistances flowing into different numbers of screens, which is not limited.
S103, adjusting the reference current according to the resistance value of the path resistor.
In application, the video output module comprises a current type video output module and a voltage type video output module, wherein the current type video output module is used for outputting certain current. If the magnitude of the reference current value output by the current type output module is unchanged under normal conditions, namely, when a change instruction is not received, the magnitude of the maximum current value output by the current type output module is unchanged, but when the current type output module receives the change instruction and detects that the magnitude of the reference current needs to be changed, the magnitude of the reference current can be changed, the voltage type output module is used for outputting a certain voltage, and the magnitude of the reference voltage value of the voltage type output module can be adjusted.
In application, the current-mode output module is adopted in the application, because the current-mode signal is not affected by the voltage drop of the transmission line, and if the voltage signal is transmitted, the input impedance of the current-mode output module is large (in order to reduce the influence of the resistance on the transmission line), and the voltage division on the line is not small. In normal operation, the video output module outputs the driving current to enable the display image quality of the target screen to conform to the VGA standard protocol, and when the number of the target screens is changed, or the resistance value of the resistance of the target screen is changed, namely the resistance value of the path resistance is changed, the video output module adjusts the corresponding reference current according to the actual resistance value of the path resistance, if the value of the reference current is increased, then if the resistance value of the path resistance is unchanged, the reference current under the condition is maintained unchanged.
Step S104, outputting corresponding driving current to the target screen.
In application, the driving current is the current output by the output end of the video output module, that is, VGADAC is also used for outputting the driving current signal. The VGADAC can be automatically adjusted according to the value of the reference current, the reference current is calculated according to the acquired path resistance, when the path resistance is transmitted to change, the reference current is changed, the output driving current is correspondingly changed, the voltage amplitude of a screen end signal formed by the current received by all the target screens meets the protocol standard of VGA, and the output effect of the target screen picture is consistent.
According to the embodiment, the driving capability of the video output module is adjusted, the reference current under the current resistance value is calculated according to the path resistance between the video output module and the target screen, and the corresponding driving current is output, so that the requirement that video output is displayed on a plurality of screens is met. Compared with an active driving shunt mode, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, and the corresponding reference current is obtained by depending on the resistance of the obtaining circuit, so that the cost advantage is obvious.
Referring to fig. 2, fig. 2 is another flowchart of the multi-screen display method in embodiment 2 of the present application, specifically as follows:
prior to step S101, it includes:
s201, establishing an output path between the target screen and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship.
In the application, the resistance value of the output path corresponds to the resistance value of the path resistance, the single-to-single association relationship is an output path established between the target screen and the screen output module, only one output path exists between the target screen and the screen output module, and one output path only comprises a first path and a second path.
S202, acquiring a screen access signal transmitted by the first path; the screen access signal is used for determining that the target screen is accessed to the video output module.
In application, the first path is used for acquiring a screen access signal transmitted by the first path when the video output module is connected with the target screen. The first path is provided with a detection circuit, and the detection circuit is used for detecting whether a target screen is accessed or not, and acquiring the resistance value of a corresponding path resistor, so that the reference current of VGADAC is correspondingly adjusted, and a corresponding driving current is output, as shown in fig. 3.
S203, transmitting the video signal to a target screen through the second path.
The second path is used for transmitting the RGB video signals and the current signals output by the screen output module. Specifically, the second path is configured to output an RGB video signal from a VGADAC port of the video output module to an RGB video signal receiving port of the target screen through an electrostatic discharge (ESD) circuit, where the ESD circuit is configured to prevent damage caused by electrostatic discharge of all components between the video output module and the target screen, as shown in fig. 3 and fig. 4.
In application, the ESD can be specifically regarded as a circuit inside the video output module, the ESD is connected with the target screen through a VGA connection line, that is, the ESD is located inside the video output module, the VGADAC inside the video output module outputs RGB video signals through the video output resistor, then through the ESD, and finally located at the VGA interface of the video output module, while the target screen has a corresponding VGA interface, the two VGA interfaces are connected through a VGA connection line, and are used for the video output module to output corresponding RGB video signals to the target screen, and a specific connection diagram is shown in fig. 4, and fig. 4 shows a connection structure diagram of one path of video output module and the target screen. The specific numerical meaning of each pin of the VGA interface is shown in fig. 5, and the pins have detailed comments and functional descriptions thereon, which are not described in detail. In fig. 3, the RGB video signals include R video signals, G video signals, and B video signals, and the VGADAC has an R (R character on the right of the VGADAC in fig. 3) output port, a G (G character on the right of the VGADAC in fig. 3) output port, and a B (B character on the right of the VGADAC in fig. 3) output port, respectively, for outputting the corresponding video signals, and the target screen has a corresponding R (R character in the target screen in fig. 3) access port, a G (G character in the target screen in fig. 3) access port, and a B (B character in the target screen in fig. 3) access port, respectively, for accessing the corresponding video signals.
Referring to fig. 6, fig. 6 is a flowchart of a multi-screen display method in embodiment 3 of the present application, which is specifically as follows:
the first path comprises a detection unit, and the detection unit is connected with an insertion pin; s202 includes:
s301, acquiring the level state of the inserted pin.
S302, if the level state is a high level state, judging that the inserted pin is not connected with the target screen.
And S303, if the level state is a low level state, judging that the insertion pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.
In application, the detection unit may be a device of a main chip in the video output module, or may be a device connected to the main chip, and the detection unit may be connected to the insertion pin, or may be a part of the detection unit, which is not limited.
In this embodiment, the insertion pin is defined to connect to a detection unit, where the detection unit is part of a main chip in the video output module, and in addition, VGADAC is also part of the main chip in the video output module.
In an application, the detection unit in the first path is provided on a main chip in the video output module. Specifically, the VGA interface of the video output module is connected to the VGA interface of the target screen end through a VGA connection line, as shown in fig. 4, and referring to fig. 5, the VGA interface of the video output module has 15 pins, and the definition of the pins is shown in the table in fig. 5. Referring to fig. 7, pins specifically referred to in this embodiment are 1 (R), 2 (G), 3 (B), 6 (RGND), 7 (GGND), 8 (BGND), one end of 6 (RGND) in the VGA interface of the video output module is connected to an idle IO port (not shown in the figure) of the detection unit in the main chip, and 7 (GGND) and 8 (BGND) in the VGA interface of the video output module are grounded. Referring to fig. 4, a pull-up resistor R1 is added to the other end of RGND in the VGA interface of the video output module to the high level VCC, and the RGND may be connected to RGND in the target screen (pin 6 on the right side of the VGA connection line in fig. 4) after being connected through a plug-in pin, while RGND in the target screen is always connected to ground. In other embodiments, any two of RGND, GGND and BGND may be grounded, and the other one may be connected to the plug-in pin, which is not limited. When the external target screen is not accessed, the inserted pin is at a high level, when the external target screen is accessed, the RGND of the target screen end is connected to the ground, the inserted pin is pulled to a low level, a detection unit in the main chip detects that the inserted pin is at a low level, namely, the inserted pin is connected with the target screen, a screen access signal is sent to the main chip, and the current output capacity of the VGADAC is adjusted in time, so that the current amplitude of the target screen end can meet VGA protocol standards.
In this embodiment, a simple connection circuit inserted with a pin is added to connect with an IO port inside the video output module, so as to detect the number of accessed target screens, and adjust the reference current in time, thereby realizing the requirement of video output on multiple screens.
Referring to fig. 8, fig. 8 is a flowchart of a multi-screen display method in embodiment 4 of the present application, which is specifically as follows: step S102 includes:
s401, acquiring a video output resistor built in the video output module.
S402, acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel.
S403, calculating a first final resistance value according to the video output resistor and the screen matching resistor; the first final resistance is the resistance of the path resistor.
In application, referring to fig. 9, the video output module is a current-type video output module, one end of a video output resistor R2 inside the video output module is connected to a B video output signal of the vgaac, and the other end is grounded at the same time. Also, one end of the screen matching resistor R3 is connected to the B video input signal (not shown) of the target screen, the other end is grounded at the same time, and the B video signal output interface of the VGADAC is connected to the B video signal input interface of the target screen, that is, the video output resistor R2 and the screen matching resistor R3 are connected in parallel, which is not shown in fig. 3 and 4 and grounded, specifically, fig. 9 is referred to, and for convenience of explanation, the video output resistor R2 is drawn outside the video output module.
In other embodiments, if the video output module adopts a voltage type video output module, one end of the video output resistor R2 in the video output module is connected to the B video signal output interface of the video output module, and the other end is directly connected to the screen matching resistor R3, that is, the video output resistor R2 and the screen matching resistor R3 are connected in series, and refer to fig. 10 specifically. Different connection modes and resistance calculation methods are adopted for different video output modules, and the resistance values of the screen matching resistor and the video output resistor can be the same or different, so that the method is not limited. The video output resistor and the screen matching resistor in the parallel state are calculated according to a parallel resistance calculation formula and are preset in a main chip in the video output module.
In this embodiment, the first final resistance value of the video output resistor and the screen matching resistor is calculated, and the reference current of the VGADAC is calculated and adjusted according to the VGA protocol standard, so that the reference current obtained by the target screen meets the VGA protocol standard, and the picture display effect is normal.
In one embodiment, the target screen has N, N is a positive integer greater than 1, and the screen matching resistances in the N target screens are connected in parallel to each other, and step S402 includes:
And acquiring all the built-in screen matching resistors of the target screen.
In application, the number of the target screens may be one or more, and the multiple target screens are connected with the video output module through different paths, where the connection mode includes, but is not limited to, transmitting RGB video signals by means of baseband, transmitting RGB video signals by means of frequency bands, directly transmitting RGB analog signals by means of VGA connection lines, and transmitting video signals by means of carrier waves.
Calculating second final resistance values of all the screen matching resistors in the parallel state; and the second final resistance value is the screen matching resistance of all the target screens.
In application, the target screens of different paths are connected in parallel by screen matching resistors. Specifically, as shown in fig. 3, after a path of RGB video signal signals is output by a VGADAC port of the video output module, the second path is further subjected to a matching load, the corresponding matching load is a video output resistor in the video output module, the video output module is directly divided into multiple paths of RGB video signals on a physical layer after being connected with the matching load, each path of RGB video signal is correspondingly connected with one target screen, the video output module obtains a screen matching resistor of each target screen, and the second final resistance of all target screens is calculated according to a parallel resistance calculation formula.
In this embodiment, the above RGB video signals may be divided into multiple paths of RGB video signals by a passive splitting manner, unlike an active splitting manner, the main control video output module is not directly connected to the target screen, but is output to one active driving unit, and then connected to multiple target screens by the active driving unit to play the homologous RGB video signals, which aims at that the passive splitting manner does not need to add additional driving devices, and has a certain cost advantage.
In one embodiment, one of the target screens is connected to one of the plug-in pins; the step of calculating the second final resistance value of all the screen matching resistors in the parallel state comprises the following steps:
and acquiring the level states of all the inserted pins at preset time intervals.
The target screen is connected with an inserting pin without adding an extra connecting device. The preset time includes, but is not limited to, preset time preset by the video output module and preset time input by a user, for example, the preset time is 1S, and the level state of each inserted pin is queried every 1S, which is not limited.
Determining the number of the accessed target screens according to the level state;
When the level state is a low level state, the detection unit can judge that the insertion pin is connected with the target screen, the detection unit can send a screen access signal to a main chip in the video output module, the video output module judges that one target screen is accessed, the number of the received screen access signals is counted, and the number of the accessed target screens can be known.
And calculating second final resistance values of all the screen matching resistors in the parallel state according to the number of the target screens.
The second final resistance value is calculated according to the number of the target screens, specifically, the resistance values of the screen matching resistors of each target screen can be consistent or inconsistent, and the resistance values of the screen matching resistors are preset in the video output module.
In other applications, the second final resistance may be obtained according to other manners, if the resistances of the video output resistors of the plurality of target screens are inconsistent, then the unique identification numbers of the target screens are obtained, each unique identification number corresponds to one target screen, the screen matching resistor resistance associated with each unique identification number is obtained, and the second final resistance is calculated according to all the obtained screen matching resistor resistances.
In this embodiment, the resistance values of all the target screens are consistent, so that the second final resistance value can be calculated only by detecting the number of the target screens, and the detection device is simple and has a certain cost advantage.
In one embodiment, step S103 includes:
and calculating the value of the reference current under the current resistance value of the path resistor according to a video transmission standard protocol.
In application, the video transmission standard protocol outputs a certain current to the video output module, and a certain voltage value is finally formed on R, G, B signals of the target screen end through the impedance of the self equipment and the target screen, wherein the voltage value is required to be in accordance with 0mV-700mV, and the corresponding RGB voltage signals can ensure that the bright color of the picture meets the requirement.
In a specific application, the screen matching resistor and the video output resistor have the same resistance value, and the resistance values are 75 omega. Specifically, assuming that the video output resistance of the VGADAC output terminal is Rout75 ohms, the screen matching resistance of the screen 1 is Rin1, the built-in screen matching resistance of the screen 2 is Rin2, and the screen matching resistance of the screen N is Rin. When one screen is connected, the VGADAC (taking a current type DAC as an example) reference current is I1 (mA), when two screens are connected, the reference current is I2 (mA), when N screens are connected, the reference current is IN, and when the screen is output IN pure white, the maximum value of the VGADAC output driving current is equal to the reference current value, and the constraint conditions to be met at the moment are as follows:
I1*(Rout//Rin1)＝700mV；
I2*(Rout//Rin1//Rin2)＝700mV；
……；
IN*(Rout//Rin1//Rin2//…//RinN)＝700mV；
Wherein Rout// Rin1 represents the video output resistance in parallel with the screen matching resistance.
In an embodiment, the VGADAC includes a driving current, and the path resistance change can correspondingly cause a reference current change, thereby adjusting the magnitude of the driving current. Specifically, assuming that the VGA DAC is N bits and the binary code word is D N D N-1 …D 2 D, there are:
VGADAC output drive current=reference current× [ (D) N *2 N-1 +D N-1 *2 N-2 +…+D1)/2 N ]；
When VGADAC outputs, binary code word valid bit is all 1, in order to meet VGA protocol standard, then there are:
700mV＝drive current r=reference current (2 N-1 +2 N-2 +…+2+1)/2 N *R；
700mv≡reference current R with multi-bit vgadc;
it is considered that the reference current of the VGADAC is adjusted according to the path resistance R, and the driving current output by the VGADAC changes accordingly after the reference current changes.
According to the embodiment, the driving capability of the video output module is adjusted, the reference current under the current resistance is calculated according to the path resistance between the video output module and the target screen, and the corresponding driving current is output, so that the requirement that video output is displayed on a plurality of screens is met. Compared with an active driving shunt mode, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, and the corresponding reference current is obtained by depending on the resistance of the obtaining circuit, so that the cost advantage is obvious.
As shown in fig. 11, the present embodiment provides a multi-screen display device 100 including:
a first transmission module 10 for transmitting a video signal to a target screen;
a first obtaining module 20, configured to obtain a path resistance between the video signal from the video output module to the target screen;
a second obtaining module 30, configured to adjust a reference current according to a resistance value of the path resistor;
and an output module 40 for outputting a corresponding driving current to the target screen.
In one embodiment, the multi-screen display device 100 further includes:
the building module is used for building an output path between the building module and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship;
the third acquisition module is used for acquiring the screen access signal transmitted by the first path; the screen access signal is used for determining that the target screen is accessed to the video output module;
and the second transmission module is used for transmitting the video signal to a target screen through the second path.
In an embodiment, the first path includes a detection unit connected to the insertion pin; the third acquisition module is further configured to:
Acquiring the level state of the inserted pin;
if the level state is a high level state, judging that the inserted pin is not connected with the target screen;
and if the level state is a low level state, judging that the insertion pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.
In an embodiment, the first acquisition module 20 is further configured to:
acquiring a video output resistor built in the video output module;
acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel;
calculating a first final resistance value according to the video output resistor and the screen matching resistor; the first final resistance is the resistance of the path resistor.
In an embodiment, the target screens have N, where N is a positive integer greater than 1, and screen matching resistors in the N target screens are connected in parallel with each other; the first acquisition module 20 is further configured to:
acquiring all built-in screen matching resistors of the target screen;
calculating second final resistance values of all the screen matching resistors in the parallel state; and the second final resistance value is the screen matching resistance of all the target screens.
In one embodiment, one of the target screens is connected to one of the plug-in pins; the first acquisition module 20 is further configured to:
acquiring the level states of all the inserted pins at preset time intervals;
determining the number of the accessed target screens according to the level state;
and calculating second final resistance values of all the screen matching resistors in the parallel state according to the number of the target screens.
In an embodiment, the second acquisition module 30 is further configured to:
and calculating the value of the reference current under the current resistance value of the path resistor according to a video transmission standard protocol.
According to the embodiment, the driving capability of the video output module is adjusted, the reference current under the current resistance value is calculated according to the path resistance between the video output module and the target screen, and the corresponding driving current is output, so that the requirement that video output is displayed on a plurality of screens is met. Compared with an active driving shunt mode, the output driving current is changed by adjusting the reference current of the video output module, no additional driving device is needed, and the corresponding reference current is obtained by depending on the resistance of the obtaining circuit, so that the cost advantage is obvious.
An embodiment of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and capable of running on the processor, where the processor implements the multi-screen display method according to any one of the first aspect when executing the computer program.
Fig. 12 is a schematic diagram of a terminal device 80 according to an embodiment of the present application. As shown in fig. 12, the terminal device 80 of this embodiment includes: a processor 803, a memory 801 and a computer program 802 stored in said memory 801 and executable on said processor 803. The processor 803, when executing the computer program 802, implements the steps in the various method embodiments described above, such as steps S101 to S103 shown in fig. 1. Alternatively, the processor 803, when executing the computer program 802, performs the functions of the modules/units in the above-described apparatus embodiments.
Embodiments of the present application provide a computer readable storage medium storing a computer program which, when executed by a processor, implements a multi-screen display method as described in any one of the first aspects above.
Embodiments of the present application provide a computer program product for causing a terminal device to execute the multi-screen display method according to any one of the first aspect above when the computer program product is run on the terminal device.
By way of example, the computer program 802 may be partitioned into one or more modules/units that are stored in the memory 801 and executed by the processor 803 to complete the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing the specified functions, which instruction segments are used to describe the execution of the computer program 802 in the terminal device 80. For example, the computer program 802 may be divided into a first transmission module, a first acquisition module, a second acquisition module, and an output module, where each module specifically functions as follows:
the first transmission module is used for transmitting the video signal to the target screen;
the first acquisition module is used for acquiring path resistance between the video signal and the target screen from the video output module;
the second acquisition module is used for adjusting the reference current according to the resistance value of the path resistor;
And the output module is used for outputting corresponding driving current to the target screen.
The terminal device 80 may be a computing device such as a desktop computer, a notebook computer, a palm computer, and a cloud server. The terminal device may include, but is not limited to, a processor 803, a memory 801. It will be appreciated by those skilled in the art that fig. 12 is merely an example of a terminal device 80 and is not intended to limit the terminal device 80, and may include more or fewer components than shown, or may combine certain components, or different components, e.g., the terminal device may further include an input-output device, a network access device, a bus, etc.
The processor 803 may be a central processing unit (Central Processing Unit, CPU), but may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 801 may be an internal storage unit of the terminal device 80, such as a hard disk or a memory of the terminal device 80. The memory 801 may be an external storage device of the terminal device 80, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card) or the like, which are provided on the terminal device 80. In one embodiment, the memory 801 may also include both internal and external storage units of the terminal device 80. The memory 801 is used for storing the computer program and other programs and data required by the terminal device. The memory 801 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/communication terminal and method may be implemented in other manners. For example, the apparatus/communication terminal embodiments described above are merely illustrative, e.g., the division of the modules or units is merely a logical function division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated modules/units, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above embodiment, or may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of each method embodiment described above. Wherein the computer program comprises computer program code which may be in source code form, object code form, executable file or some intermediate form etc. The computer readable medium may include: any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), an electrical carrier signal, a telecommunications signal, a software distribution medium, and so forth. It should be noted that the computer readable medium contains content that can be appropriately scaled according to the requirements of jurisdictions in which such content is subject to legislation and patent practice, such as in certain jurisdictions in which such content is subject to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (9)
1. A multi-screen display method, which is applied to a video output module, the method comprising:
transmitting the video signal to a target screen;
acquiring path resistance between the video signal and the target screen from the video output module;
adjusting a reference current according to the resistance value of the path resistor;
outputting a corresponding driving current to the target screen;
before the step of transmitting the video signal to the target screen, comprising:
establishing an output path between the target screen and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship;
Acquiring a screen access signal transmitted by the first path; the screen access signal is used for determining that the target screen is accessed to the video output module;
and transmitting the video signal to a target screen through the second path.
2. The multi-screen display method of claim 1, wherein the first path includes a detection unit, the detection unit being connected to an add-in pin;
the step of obtaining the screen access signal transmitted by the first path comprises the following steps:
acquiring the level state of the inserted pin;
if the level state is a high level state, judging that the inserted pin is not connected with the target screen;
and if the level state is a low level state, judging that the insertion pin is connected with the target screen, and receiving a screen access signal sent by the detection unit.
3. The multi-screen display method of claim 1, wherein the obtaining a path resistance of the video signal from the video output module to the target screen comprises:
acquiring a video output resistor built in the video output module;
acquiring a screen matching resistor built in the target screen; the video output resistor is connected with the screen matching resistor in parallel;
Calculating a first final resistance value according to the video output resistor and the screen matching resistor; the first final resistance is the resistance of the path resistor.
4. A multi-screen picture display method as claimed in claim 3, wherein said target screen has N, said N being a positive integer greater than 1, screen matching resistors in N of said target screens being connected in parallel with each other;
the step of obtaining the screen matching resistor built in the target screen comprises the following steps:
acquiring all built-in screen matching resistors of the target screen;
calculating second final resistance values of all the screen matching resistors in the parallel state; and the second final resistance value is the screen matching resistance of all the target screens.
5. The multi-screen display method of claim 4, wherein one of the target screens is connected to one of the insert pins;
the step of calculating the second final resistance value of all the screen matching resistors in the parallel state comprises the following steps:
acquiring the level states of all the inserted pins at preset time intervals;
determining the number of the accessed target screens according to the level state;
and calculating second final resistance values of all the screen matching resistors in the parallel state according to the number of the target screens.
6. The multi-screen display method according to claim 1, wherein the step of adjusting the reference current according to the resistance value of the path resistor comprises:
and calculating the value of the reference current under the current resistance value of the path resistor according to a video transmission standard protocol.
7. A multi-screen display device, comprising:
the first transmission module is used for transmitting the video signal to the target screen;
the first acquisition module is used for acquiring the path resistance between the video signal from the video output module to the target screen;
the second acquisition module is used for adjusting the reference current according to the resistance value of the path resistor;
the output module is used for outputting corresponding driving current to the target screen;
the multi-screen picture display device further includes:
the building module is used for building an output path between the building module and the target screen; the output path comprises a first path and a second path, and the first path and the second path are in a single-to-single association relationship;
the third acquisition module is used for acquiring the screen access signal transmitted by the first path; the screen access signal is used for determining that the target screen is accessed to the video output module;
And the second transmission module is used for transmitting the video signal to a target screen through the second path.
8. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 1 to 6 when executing the computer program.
9. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the method according to any one of claims 1 to 6.
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| CN106713866A (en) * | 2016-12-28 | 2017-05-24 | 浙江大华技术股份有限公司 | Analog video signal transmission device and transmission method thereof |
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