CN110690251B - Light emitting device package structure and method for manufacturing the same - Google Patents
Light emitting device package structure and method for manufacturing the same Download PDFInfo
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- CN110690251B CN110690251B CN201810731232.2A CN201810731232A CN110690251B CN 110690251 B CN110690251 B CN 110690251B CN 201810731232 A CN201810731232 A CN 201810731232A CN 110690251 B CN110690251 B CN 110690251B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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Abstract
A light emitting element packaging structure comprises a protection substrate, a circuit structure layer, a light emitting element, a first circuit redistribution layer, a conductive connecting piece, a second circuit redistribution layer and a chip. The circuit structure layer is arranged on the protective substrate and comprises a first circuit layer. The light-emitting element is arranged on the circuit structure layer and is electrically connected with the first circuit layer. The first redistribution layer is disposed on the light emitting element and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connecting piece is connected with the first circuit layer and the second circuit layer. The second redistribution layer is disposed on the first redistribution layer, and the second redistribution layer includes a third circuit layer contacting the conductive contact. The chip is arranged on the second circuit redistribution layer and is electrically connected with the third circuit layer. The light-emitting element packaging structure disclosed herein can effectively reduce the frame area of the display device.
Description
Technical Field
The invention relates to a light-emitting element packaging structure and a manufacturing method thereof.
Background
Conventionally, a driving chip is disposed in a bezel area of a display device such as a mobile phone, a tablet computer, and the like. However, this design requires the display device to have a frame area with a sufficient area, which results in the display area of the display device being compressed accordingly. In recent years, in order to achieve a narrow frame of a display device, a chip-on-film (COF) technology is adopted, in which a portion of a flexible circuit board (FPC) is connected to a front surface of a substrate of the display device, and another portion of the FPC is bent to a back surface of the substrate. The driving chip is arranged on the flexible circuit board on the back surface, so that the area required by the frame area can be reduced.
However, the bending causes stress concentration on the portion of the flexible printed circuit board in contact with the substrate, which causes problems such as easy peeling or breaking of the portion, and easy breaking of the circuit on the flexible printed circuit board. In addition, in order to connect the flexible circuit board to the substrate of the display device, a portion of the substrate to which the flexible circuit board is connected is still required to be reserved. Therefore, the bezel area of the display device cannot be effectively reduced.
It is apparent that there are inconveniences and disadvantages to the above-described conventional method, and improvements are desired. In order to solve the above problems, the related art has not been able to make a thorough effort to solve the above problems, but appropriate solutions have not been developed for a long time.
Disclosure of Invention
The invention provides a light-emitting element packaging structure which comprises a protection substrate, a circuit structure layer, a light-emitting element, a first circuit redistribution layer, a conductive connecting piece, a second circuit redistribution layer and a chip. The circuit structure layer is arranged on the protective substrate and comprises a first circuit layer. The light-emitting element is arranged on the circuit structure layer or between the protective substrate and the circuit structure layer and is electrically connected with the first circuit layer. The first redistribution layer is disposed on the light emitting element and includes a second circuit layer and a conductive contact contacting the second circuit layer. The conductive connecting piece is connected with the first circuit layer and the second circuit layer. The second redistribution layer is disposed on the first redistribution layer, and the second redistribution layer includes a third circuit layer contacting the conductive contact. The chip is arranged on the second circuit redistribution layer and is electrically connected with the third circuit layer.
Preferably, the first redistribution layer further includes a first insulating layer covering the second redistribution layer. The first insulating layer has a via hole exposing a portion of the second circuit layer, and the conductive contact is filled in the via hole to contact the second circuit layer.
Preferably, the second redistribution layer further includes a second insulating layer covering the third circuit layer. The second insulating layer has an opening exposing a portion of the third circuit layer, and the chip is electrically connected to the third circuit layer through the opening.
Preferably, the line width and the line distance of the second circuit layer are less than 8 microns, and the line width and the line distance of the third circuit layer are less than 8 microns.
The invention also provides a light-emitting element packaging structure which comprises a protection substrate, a light-emitting element, a first circuit redistribution layer, a second circuit redistribution layer and a chip. The light emitting element is disposed on the protective substrate. The first redistribution layer is disposed on the light emitting device and includes a first circuit layer electrically connected to the light emitting device. The second redistribution layer is disposed over the first redistribution layer, and the second redistribution layer includes a second circuit layer and a conductive contact contacting the first circuit layer and the second circuit layer. The chip is arranged on the second circuit redistribution layer and electrically connected with the second circuit layer.
Preferably, the second redistribution layer further includes an insulating layer covering the first circuit layer. The insulating layer is provided with a via hole exposing a part of the first circuit layer, and the conductive contact piece is filled in the via hole so as to contact the first circuit layer and the second circuit layer.
Preferably, the line width and line spacing of the first circuit layer are less than 8 microns, and the line width and line spacing of the second circuit layer are less than 8 microns.
The invention also provides a manufacturing method of the light-emitting element packaging structure, which comprises the following steps: (i) providing a circuit redistribution structure; (ii) providing a first substrate; (iii) forming a circuit structure layer on the first substrate, wherein the circuit structure layer comprises a first circuit layer; (iv) before or after step (ii), disposing a light emitting device between the first substrate and the circuit structure layer or on the circuit structure layer, wherein the light emitting device is electrically connected to the first circuit layer; and (v) disposing a redistribution structure on the light-emitting device, wherein the redistribution structure comprises a first redistribution layer, a second redistribution layer, and a chip, the first redistribution layer comprises a second circuit layer and a conductive contact contacting the second circuit layer, the second circuit layer is electrically connected to the first circuit layer via the conductive contact, the second redistribution layer comprises a third circuit layer contacting the conductive contact, and the third circuit layer is electrically connected to the chip.
Preferably, the step (i) includes the following sub-steps: (a) forming a first redistribution layer on the second substrate; (b) forming a second redistribution layer on the first redistribution layer; (c) arranging a chip on the second circuit redistribution layer; and (d) stripping the second substrate to expose the second circuit layer, thereby forming a circuit redistribution structure.
The invention also provides a manufacturing method of the light-emitting element packaging structure, which comprises the following steps: (i) providing a circuit redistribution structure having a substrate, a first circuit redistribution layer disposed over the substrate, the first circuit redistribution layer including a first circuit layer and a conductive contact contacting the first circuit layer, and a second circuit redistribution layer disposed over the first circuit redistribution layer, the second circuit redistribution layer including a second circuit layer contacting the conductive contact; (ii) arranging a light-emitting element on the second circuit redistribution layer, wherein the light-emitting element is electrically connected with the second circuit redistribution layer; (iii) (iii) stripping the substrate to expose the first circuitry layer, either before or after step (ii); and (iv) disposing the chip under the first circuit redistribution layer, wherein the chip is electrically connected to the first circuit redistribution layer.
The above description will be described in detail by embodiments, and further explanation will be provided for the technical solution of the present invention.
Drawings
Fig. 1 is a schematic cross-sectional view of a light emitting device package structure according to a first embodiment of the invention.
Fig. 2 is a schematic cross-sectional view of a light emitting device package structure according to a second embodiment of the invention.
Fig. 3 is a schematic cross-sectional view of a light emitting device package structure according to a third embodiment of the invention.
Fig. 4 to 7 are schematic cross-sectional views of various stages of a method for forming a line redistribution structure according to an embodiment of the present invention.
Fig. 8 is a schematic cross-sectional view of a stage of a method for forming a light emitting device package structure according to a first embodiment of the present invention.
Fig. 9 to 11 are schematic cross-sectional views of the method for forming a light emitting device package structure according to the second embodiment of the present invention at various stages.
Fig. 12 to 14 are schematic cross-sectional views of the method for forming a light emitting device package structure according to the third embodiment of the present invention at various stages.
Fig. 15 to 18 are schematic cross-sectional views of the method of forming a light emitting device package according to the fourth embodiment of the present invention at various stages.
[ description of main element symbols ]
10 light-emitting element packaging structure
100. 710, 720, 730, 740: substrate 200: circuit structure layer
210: line layer 210 a: groove
211: bottom portion 212: side wall part
220. 220': dielectric layer 220 a: opening of the container
300: light-emitting element 400: conductive connecting piece
500: line redistribution structure 510: circuit redistribution layer
511: the circuit layer 512: insulating layer
512 a: via hole 513: conductive contact
520: line redistribution layer 521: line layer
522: insulating layer 522 a: opening of the container
522 b: via hole 523: conductive contact
530: chip 540: protective layer
600: transparent adhesive layer 610: adhesive layer
Detailed Description
In order to make the disclosure more complete and complete, the following description is provided for illustrative purposes of implementing aspects and embodiments of the invention; it is not intended to be the only form in which the embodiments of the invention may be practiced or utilized. The various embodiments disclosed below may be combined with or substituted for one another where appropriate, and additional embodiments may be added to one embodiment without further recitation or description. In the following description, numerous specific details are set forth to provide a thorough understanding of the following embodiments. However, embodiments of the invention may be practiced without these specific details.
The embodiments of the present invention will be described in detail below, but the present invention is not limited to the scope of the examples.
Fig. 1 is a schematic cross-sectional view illustrating a light emitting device package structure 10 according to a first embodiment of the invention. As shown in fig. 1, the light emitting device package structure 10 includes a protection substrate 100, a circuit structure layer 200, a light emitting device 300, a conductive connector 400, and a circuit redistribution structure 500.
The protective substrate 100 may be a transparent substrate commonly used in general display devices. In some embodiments, the protection substrate 100 is a flexible substrate, such as a Polyimide (PI) substrate. In other embodiments, the protection substrate 100 is a rigid substrate, such as a glass substrate or a plastic substrate.
The circuit structure layer 200 is disposed on the protection substrate 100. Specifically, the circuit structure layer 200 includes a first circuit layer 210 and a dielectric layer 220, and the first circuit layer 210 is disposed on an upper surface of the dielectric layer 220. In some embodiments, the first circuit layer 210 includes any conductive material, such as a metal, e.g., copper, nickel, or silver. It should be noted that the dielectric layer 220 should be transparent so that light emitted from the light emitting element 300 can pass through the dielectric layer 220 and the protective substrate 100 to the outside of the structure. In some embodiments, the dielectric layer 220 comprises a transparent photosensitive dielectric material (PID). As shown in fig. 1, the dielectric layer 220 has an opening 220a, and the first circuit layer 210 includes a bottom portion 211 and a sidewall portion 212 disposed on a bottom surface and sidewalls of the opening 220 a. In detail, the width of the opening 220a gradually narrows from the top to the bottom, and has a ladder shape with a wide top and a narrow bottom. And the bottom portion 211 and the sidewall portion 212 of the first circuit layer 210 conform to the opening 220a, such that the bottom portion 211 and the sidewall portion 212 of the first circuit layer 210 define a recess 210a having substantially the same shape as the opening 220 a. The sidewall portions 212 of the first wiring layer 210 are adjacent to the outer side of the bottom portion 211 and extend upward beyond the upper surface of the bottom portion 211. In other words, an included angle between the inner sidewall of the sidewall portion 212 and the upper surface of the bottom portion 211 is an obtuse angle, and the width of the groove 210a gradually narrows from the top toward the bottom, taking a trapezoidal shape with a wide top and a narrow bottom. It should be noted that the width of the groove 210a gradually narrows from the top to the bottom to provide specific technical effects, which will be described in detail below.
The light emitting device 300 is disposed on the circuit structure layer 200 and electrically connected to the first circuit layer 210. In some embodiments, the light emitting element 300 comprises an organic light emitting diode element. It should be noted that although the light emitting device 300 is shown in fig. 1 without contacting the first circuit layer 210, it should be understood that the light emitting device 300 may be electrically connected to the first circuit layer 210 in any manner in other views at different angles. For example, in some embodiments, the light emitting device 300 is attached to and electrically connected to the first circuit layer 210 by a conductive adhesive. Alternatively, in other embodiments, the light emitting device 300 may be connected and electrically connected to the first circuit layer 210 by other methods.
The circuit redistribution structure 500 is disposed on the light emitting device 300, and the circuit redistribution structure 500 includes a first circuit redistribution layer 510, a second circuit redistribution layer 520, and a chip 530.
The first redistribution layer 510 is disposed on the light emitting device 300. Specifically, the first wiring redistribution layer 510 includes a second wiring layer 511, a first insulating layer 512, and a conductive contact 513. In some embodiments, the second circuit layer 511 comprises any conductive material, such as a metal, e.g., copper, nickel, or silver. In some embodiments, the line width and line spacing of the second line layer 511 is less than 8 microns, such as 7 microns, 6 microns, 5 microns, 4 microns, 3 microns, 2 microns, 1 micron, or 0.5 microns. The first insulating layer 512 covers the second circuit layer 511, and the first insulating layer 512 has a via hole 512 a. In some embodiments, the first insulating layer 512 comprises a photosensitive dielectric material. The via hole 512a exposes a portion of the second circuit layer 511, and the conductive contact 513 is filled in the via hole 512a, so that the conductive contact 513 contacts the second circuit layer 511. The conductive contact 513 may be a metal pillar, and the metal is, for example, a conductive metal such as copper, nickel, or silver. As shown in fig. 1, the width of the conductive contact 513 is gradually narrowed from the top toward the bottom, and takes a trapezoidal shape that is wide at the top and narrow at the bottom, but the shape of the conductive contact 513 is not limited thereto.
The second redistribution layer 520 is disposed on the first redistribution layer 510. Specifically, the second wire redistribution layer 520 includes a third wire layer 521 and a second insulation layer 522. The third wiring layer 521 contacts the conductive contact 513. In some embodiments, the third circuit layer 521 includes any conductive material, such as a metal, e.g., copper, nickel, or silver. In some embodiments, the line width and line spacing of the third circuit layer 521 is less than 8 microns, such as 7 microns, 6 microns, 5 microns, 4 microns, 3 microns, 2 microns, 1 micron, or 0.5 microns. The second insulating layer 522 covers the third wiring layer 521, and the second insulating layer 522 has an opening 522 a. In some embodiments, the second insulating layer 522 comprises a photosensitive dielectric material. Specifically, the opening 522a exposes a portion of the third wiring layer 521.
The chip 530 is disposed on the second redistribution layer 520 and electrically connected to the third circuit layer 521 through the opening 522 a. Specifically, the lower surface of the chip 530 is provided with a plurality of metal bumps (e.g., chip pins), and the metal bumps are bonded to the exposed portion of the third wiring layer 521 via a solder material, so that the chip 530 is electrically connected to the third wiring layer 521. It should be understood that although the light emitting device package structure 10 shown in fig. 1 includes two chips 530, in other embodiments, the number of the chips 530 may be less than two or more than two.
The conductive connection member 400 connects the first line layer 210 and the second line layer 511. In the case where the light emitting device 300 includes polysilicon (for example, the light emitting device 300 is an organic light emitting diode device), the process temperature for forming the conductive connection member 400 is between room temperature and 600 ℃. When the temperature exceeds 600 c, the crystal structure of the polysilicon may be damaged. When the temperature is lower than the room temperature, the connection between the conductive connector 400 and the first circuit layer 210 is unstable and is easily peeled off. Thus, the conductive connector 400 may be a solder ball comprising a solder material having a melting point below 600 ℃, such as tin bismuth. As previously mentioned, the tapering of the width of the groove 210a from the top towards the bottom provides certain technical effects. Specifically, the bottom of the conductive connection member 400 is embedded in the groove 210a, so that the conductive connection member 400 can be stably fixed on the first circuit layer 210 without being easily peeled off. Furthermore, in some embodiments, the conductive connector 400 may be a metal pillar, such as a copper pillar. In embodiments where the conductive connector 400 is a metal pillar, the forming of the metal pillar may include (a) forming a metal block connected to the second circuit layer 511, wherein the bottom width of the metal block is greater than the width of the bottom surface of the groove 210a, (b) aligning the metal block with the groove 210a, and (c) thermally pressing the metal block with the first circuit layer 210 to form the metal pillar connected to the first circuit layer 210. Since the width of the groove 210a gradually narrows from the top toward the bottom, and the bottom width of the metal block is greater than the width of the bottom surface of the groove 210a, when the metal block and the first circuit layer 210 are thermally pressed, the bottom of the metal block first contacts the sidewall portion 212 of the first circuit layer 210 and is pressed. The pressure applied to the bottom of the metal block may lower the melting point of the pressed portion of the metal block. Thus, the bottom of the metal block may be melted to form a metal pillar connecting the first and second wiring layers 210 and 511 at a temperature that does not affect the light emitting element 300.
In some embodiments, the light emitting device package structure 10 further includes a protective layer 540. The protection layer 540 covers the chip 530 and the second insulation layer 522, and fills a gap between the chip 530 and the second insulation layer 522. Therefore, the protective layer 540 can protect the bonding between the metal bumps of the chip 530 and the third circuit layer 521, thereby preventing the peeling. On the other hand, the passivation layer 540 can also block moisture and prevent oxidation of the metal bump, the solder material, and the third circuit layer 521. In some embodiments, the protective layer 540 comprises a resin.
Fig. 2 is a schematic cross-sectional view of a light emitting device package structure 10 according to a second embodiment of the invention. The light emitting device package structure 10 of fig. 2 is similar to that of fig. 1, except that the light emitting device 300 of fig. 2 is disposed between the protection substrate 100 and the circuit structure layer 200. In addition, the light emitting device package structure 10 further includes a transparent adhesive layer 600. The transparent adhesive layer 600 covers the sidewall of the light emitting device 300 and is disposed between the protection substrate 100 and the circuit structure layer 200. In some embodiments, the transparent adhesive layer 600 includes Optically Clear Adhesive (OCA). In fig. 2, the same or similar elements as those in fig. 1 are given the same reference numerals, and the description thereof is omitted. In the light emitting device package 10 of fig. 2, the dielectric layer 220 may be transparent or non-transparent. In some embodiments, dielectric layer 220 comprises a transparent photosensitive dielectric material or a non-transparent photosensitive dielectric material.
Fig. 3 is a schematic cross-sectional view of a light emitting device package structure 10 according to a third embodiment of the invention. As shown in fig. 3, the light emitting device package structure 10 includes a protection substrate 100, a light emitting device 300, a transparent adhesive layer 600, and a circuit redistribution structure 500. The light emitting device 300 is disposed on the protection substrate 100. The transparent adhesive layer 600 covers the sidewalls of the light emitting device 300 and is disposed on the protection substrate 100. The redistribution structure 500 is disposed on the light emitting device 300 and the transparent adhesive layer 600, and the redistribution structure 500 includes a first redistribution layer 510, a second redistribution layer 520, and a chip 530. It should be noted that the materials or types of the protection substrate 100, the light emitting device 300, and the transparent adhesive layer 600 are as described above, and will not be described again.
The first redistribution layer 510 is disposed on the light emitting device 300 and the transparent adhesive layer 600. The first wire redistribution layer 510 includes a first wire layer 511. The first circuit layer 511 is electrically connected to the light emitting device 300. In some embodiments, the first circuit layer 511 comprises any conductive material, such as a metal, e.g., copper, nickel, or silver. In some embodiments, the line width and line spacing of the first line layer 511 is less than 8 microns, such as 7 microns, 6 microns, 5 microns, 4 microns, 3 microns, 2 microns, 1 micron, or 0.5 microns. It should be noted that although the light emitting device 300 is shown in fig. 3 without contacting the first circuit layer 511, it should be understood that the light emitting device 300 may be electrically connected to the first circuit layer 511 in any manner in other views at different angles.
The second redistribution layer 520 is disposed on the first redistribution layer 510. Specifically, the second wire redistribution layer 520 includes a second wire layer 521, an insulating layer 522, and conductive contacts 523. In some embodiments, the second circuit layer 521 includes any conductive material, such as a metal, e.g., copper, nickel, or silver. In some embodiments, the line width and line spacing of the second line layer 521 is less than 8 microns, such as 7 microns, 6 microns, 5 microns, 4 microns, 3 microns, 2 microns, 1 micron, or 0.5 microns. The insulating layer 522 covers the first wiring layer 511, and the insulating layer 522 has a via hole 522 b. In some embodiments, insulating layer 522 comprises a photosensitive dielectric material. The via hole 522b exposes a portion of the first circuit layer 511, and the conductive contact 523 is filled in the via hole 522b, so that the conductive contact 523 contacts the first circuit layer 511 and the second circuit layer 521. The conductive contact 523 may be a metal post, and the metal is a conductive metal such as copper, nickel, or silver. As shown in fig. 3, the width of the conductive contact 523 becomes gradually wider from the top toward the bottom, and takes a trapezoidal shape with a narrow top and a wide bottom, but the shape of the conductive contact 523 is not limited thereto.
The chip 530 is disposed on the second redistribution layer 520 and electrically connected to the second circuit layer 521. Specifically, the lower surface of the chip 530 is provided with a plurality of metal bumps (e.g., chip pins), and the metal bumps are bonded to the second circuit layer 521 via a solder material.
In some embodiments, the light emitting device package structure 10 further includes a protective layer 540. The protection layer 540 covers the chip 530, the second circuit layer 521 and the insulation layer 522, and fills a gap between the chip 530 and the insulation layer 522. Therefore, the protection layer 540 can protect the bonding between the metal bumps of the chip 530 and the second circuit layer 521, thereby preventing the peeling. On the other hand, the passivation layer 540 can also block moisture and prevent oxidation of the metal bump, the solder material, and the second circuit layer 521.
The present invention also provides a method for manufacturing the light emitting device package structure 10. Fig. 4-7 are schematic cross-sectional views illustrating various stages of a method for forming a line redistribution structure 500 according to an embodiment of the invention.
As shown in fig. 4, a first circuit layer 511 is formed on a first substrate 710. For example, a conductive material is formed on the first substrate 710, and the conductive material is patterned to form the first circuit layer 511. In some embodiments, the conductive material is formed by electroplating, chemical vapor deposition, physical vapor deposition, and the like, but not limited thereto. Next, a first insulating layer 512 is formed to cover the first circuit layer 511, and the first insulating layer 512 includes a via hole 512a exposing a portion of the first circuit layer 511. For example, a dielectric material is formed on the first circuit layer 511, and the dielectric material is patterned to form the via hole 512 a. In some embodiments, the method of forming the dielectric material includes, but is not limited to, chemical vapor deposition, physical vapor deposition, and the like. In some embodiments, methods of patterning conductive and dielectric materials include depositing a photoresist over a layer to be patterned, and exposing and developing to form a patterned photoresist layer. Then, the patterned photoresist layer is used as an etching mask to etch the layer to be patterned. Finally, the patterned photoresist layer is removed. Alternatively, in embodiments where the dielectric material is a photosensitive dielectric material, a portion of the photosensitive dielectric material may be removed by exposure and development to complete the patterning.
Next, as shown in fig. 5, a second circuit layer 521 is formed on the first insulating layer 512, and a conductive contact 513 is formed in the via hole 512 a. For example, a conductive material is formed on the first insulating layer 512 and filled in the via hole 512 a. Next, the conductive material is patterned to form a second line layer 521 and a conductive contact 513. It should be noted that the manner of forming the conductive material and patterning the conductive material is as described above, and will not be described in detail.
Next, as shown in fig. 6, a second insulating layer 522 is formed to cover the second wiring layer 521 and the first insulating layer 512, and the second insulating layer 522 includes an opening 522a exposing a portion of the second wiring layer 521. For example, a dielectric material is formed on the second circuit layer 521 and the first insulating layer 512, and the dielectric material is patterned to form the opening 522 a. It should be noted that the manner of forming the dielectric material and patterning the dielectric material is as described above, and will not be described in detail. Next, the chip 530 is disposed on the second circuit layer 521 and the second insulating layer 522. Specifically, the chip 530 is disposed in the opening 522a and electrically connected to the exposed portion of the second circuit layer 521. For example, a plurality of metal bumps (e.g., chip pins) disposed on the lower surface of the chip 530 and the second circuit layer 521 are bonded by using a solder material.
Next, as shown in fig. 7, a protective layer 540 is formed to cover the chip 530 and the second insulating layer 522, and the protective layer 540 is filled between the chip 530 and the gap of the second insulating layer 522. In addition, the first substrate 710 is stripped to expose the first circuit layer 511, thereby forming the circuit redistribution structure 500.
Fig. 8 is a schematic cross-sectional view of a stage of the method for forming the light emitting device package structure 10 according to the first embodiment of the invention. As shown in fig. 8, a dielectric layer 220 is formed on the second substrate 100, and the dielectric layer 220 includes an opening 220 a. For example, a dielectric material is formed on the second substrate 100, and the dielectric material is patterned to form the opening 220 a. It should be noted that the manner of forming the dielectric material and patterning the dielectric material is as described above, and will not be described in detail. Subsequently, a third circuit layer 210 is formed on the dielectric layer 220, and on the bottom surface and the sidewalls of the opening 220 a. For example, a conductive material is conformally formed on the dielectric layer 220 and on the bottom surface and sidewalls of the opening 220 a. Next, the conductive material is patterned, thereby forming a third wiring layer 210 including a bottom portion 211 and sidewall portions 212. And the bottom portion 211 and the sidewall portion 212 define a recess 210 a. It should be noted that the manner of forming the conductive material and patterning the conductive material is as described above, and will not be described in detail. Finally, the light emitting device 300 is disposed on the dielectric layer 220, and the light emitting device 300 is electrically connected to the third circuit layer 210.
Next, the circuit redistribution structure 500 shown in fig. 7 is disposed on the light emitting device 300 shown in fig. 8, and the third circuit layer 210 is electrically connected to the first circuit layer 511 through the conductive connection member 400, so as to form the light emitting device package structure 10 shown in fig. 1. For example, a metal block or a solder material connected to the first wiring layer 511 in the wiring redistribution structure 500 of fig. 7 is formed first. Next, a metal block or welding material is aligned with the groove 210 a. Finally, the metal bump or solder material is thermocompressed with the third wiring layer 210 to form metal posts or solder balls connected with the first wiring layer 511 and the third wiring layer 210.
Fig. 9 to 11 are schematic cross-sectional views illustrating stages of a method for forming a light emitting device package structure 10 according to a second embodiment of the invention. As shown in fig. 9, a dielectric layer 220' is formed on the first substrate 720. Next, the light emitting device 300 is disposed on the dielectric layer 220'.
Next, as shown in fig. 10, the second substrate 100 is bonded on the light emitting device 300 and the dielectric layer 220'. For example, the second substrate 100, the light emitting device 300 and the dielectric layer 220' are bonded using an optically transparent adhesive, thereby forming the transparent adhesive layer 600.
Next, as shown in fig. 11, the structure of fig. 10 is inverted, and the first substrate 720 is peeled off to expose the dielectric layer 220'. Subsequently, the dielectric layer 220' is patterned to form the dielectric layer 220 having the opening 220 a. Next, a third circuit layer 210 is formed on the dielectric layer 220 and on the bottom surface and the sidewalls of the opening 220a, such that the light emitting device 300 is electrically connected to the third circuit layer 210. For example, a conductive material is conformally formed on the dielectric layer 220 and on the bottom surface and sidewalls of the opening 220 a. Next, the conductive material is patterned, thereby forming a third wiring layer 210 including a bottom portion 211 and sidewall portions 212. And the bottom portion 211 and the sidewall portion 212 define a recess 210 a.
Next, the circuit redistribution structure 500 shown in fig. 7 is disposed on the third circuit layer 210 and the dielectric layer 220 of fig. 11, and the third circuit layer 210 is electrically connected to the first circuit layer 511 through the conductive connecting member 400, so as to form the light emitting device package structure 10 shown in fig. 2. For example, a metal block or a solder material connected to the first wiring layer 511 in the wiring redistribution structure 500 of fig. 7 is formed first. Next, a metal block or welding material is aligned with the groove 210 a. Finally, the metal bump or solder material is thermocompressed with the third wiring layer 210 to form metal posts or solder balls connected with the first wiring layer 511 and the third wiring layer 210.
Fig. 12 to 14 are schematic cross-sectional views illustrating stages of a method for forming a light emitting device package structure 10 according to a third embodiment of the invention. As shown in fig. 12, first, a first circuit layer 521 is formed on the first substrate 730. For example, a conductive material is formed on the first substrate 730 and patterned to form the first circuit layer 521. Next, an insulating layer 522 is formed to cover the first wiring layer 521, and the insulating layer 522 includes a via hole 522b exposing a portion of the first wiring layer 521. For example, a dielectric material is formed on the first circuit layer 521 and patterned to form the via 522 b. Subsequently, a second wiring layer 511 is formed on the insulating layer 522, and a conductive contact 523 is formed in the via hole 522 b. For example, a conductive material is formed on the insulating layer 522 and filled in the via 522 b. Next, the conductive material is patterned to form the second line layer 511 and the conductive contact 523. It should be noted that the manner of forming the conductive material and the dielectric material and patterning the conductive material and the dielectric material are as described above, and will not be described in detail.
Next, as shown in fig. 13, the light emitting device 300 is disposed on the insulating layer 522, such that the light emitting device 300 is electrically connected to the second circuit layer 511. Then, the second substrate 100 is bonded on the light emitting device 300, the insulating layer 522, and the second circuit layer 511. For example, the transparent adhesive layer 600 is formed by bonding the second substrate 100 and the light emitting device 300, the insulating layer 522, and the second circuit layer 511 by using an optically transparent adhesive.
Next, as shown in fig. 14, the structure of fig. 13 is turned over, and the first substrate 730 is peeled off to expose the first wiring layer 521 and the insulating layer 522.
Next, a chip 530 and a protective layer 540 are disposed on the first circuit layer 521 and the insulating layer 522, thereby forming the light emitting device package structure 10 shown in fig. 3. Specifically, the chip 530 is disposed on the first circuit layer 521 and the insulating layer 522, such that the chip 530 is electrically connected to the first circuit layer 521. For example, a plurality of metal bumps (e.g., chip pins) disposed on the lower surface of the chip 530 and the first circuit layer 521 are bonded by using a solder material. However, as described above, in the case where the light emitting element 300 includes polysilicon, when the temperature of the bonding die 530 and the first circuit layer 521 is too high, the crystal structure of the polysilicon may be damaged. Thus, the solder material used should have a melting point below 600 ℃, e.g. tin bismuth. Next, a protection layer 540 is formed to cover the chip 530, the first circuit layer 521 and the insulating layer 522, and the protection layer 540 is filled between the chip 530 and the insulating layer 522.
Fig. 15-18 are schematic cross-sectional views illustrating stages in another method for forming the light emitting device package structure 10 shown in fig. 3. Fig. 15 is continued with fig. 12, and a second substrate 740 is bonded on the second circuit layer 511 and the insulating layer 522. For example, the second substrate 740 is bonded with the second circuit layer 511 and the insulating layer 522 using an adhesive, thereby forming the adhesive layer 610.
Next, as shown in fig. 16, the structure of fig. 15 is turned over, and the first substrate 730 is peeled off to expose the first wiring layer 521 and the insulating layer 522.
Next, as shown in fig. 17, the chip 530 is disposed on the first circuit layer 521 and the insulating layer 522, such that the chip 530 is electrically connected to the first circuit layer 521. Next, a protection layer 540 is formed to cover the chip 530, the first circuit layer 521 and the insulating layer 522, and the protection layer 540 is filled between the chip 530 and the insulating layer 522.
Next, as shown in fig. 18, the structure of fig. 17 is inverted, and the second substrate 740 and the adhesive layer 610 are removed to expose the second circuit layer 511 and the insulating layer 522. Next, the light emitting device 300 is disposed on the insulating layer 522, such that the light emitting device 300 is electrically connected to the second circuit layer 511. Next, the third substrate 100 is bonded on the light emitting device 300, the insulating layer 522, and the second circuit layer 511, thereby forming the light emitting device package structure 10 shown in fig. 3.
In the light emitting device package structure disclosed herein, the redistribution structure is used to electrically connect the light emitting device and the chip, instead of the conventional chip-on-film package technology. Therefore, the problems that the contact part of the flexible circuit board and the substrate is easy to peel off or break, the circuit on the flexible circuit board is easy to break and the like when the chip-on-film packaging technology is adopted are avoided. In addition, a portion of the substrate for connecting the flexible printed circuit board is not required to be reserved, so that the frame area of the display device can be effectively reduced.
Although the present invention has been described with reference to a preferred embodiment, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A light emitting device package, comprising:
a protective substrate;
a circuit structure layer disposed on the protection substrate, wherein the circuit structure layer includes a first circuit layer;
the light-emitting element is arranged on the circuit structure layer or between the protective substrate and the circuit structure layer and is electrically connected with the first circuit layer;
a first redistribution layer disposed on the light emitting element, wherein the first redistribution layer includes a second circuit layer and a conductive contact contacting the second circuit layer;
the conductive connecting piece is connected with the first circuit layer and the second circuit layer;
a second redistribution layer disposed over the first redistribution layer, wherein the second redistribution layer includes a third circuit layer contacting the conductive contact; and
and the chip is arranged on the second circuit redistribution layer and is electrically connected with the third circuit layer.
2. The light emitting device package structure of claim 1, wherein the first redistribution layer further comprises a first insulating layer covering the second circuit layer, the first insulating layer having a via hole exposing a portion of the second circuit layer, and the conductive contact is filled in the via hole to contact the second circuit layer.
3. The light emitting device package structure of claim 1, wherein the second redistribution layer further comprises a second insulating layer covering the third circuit layer, the second insulating layer has an opening exposing a portion of the third circuit layer, and the chip is electrically connected to the third circuit layer through the opening.
4. The light emitting device package structure of claim 1, wherein the second circuit layer has a line width and a line spacing of less than 8 microns, and the third circuit layer has a line width and a line spacing of less than 8 microns.
5. A light emitting device package, comprising:
a protective substrate;
a light emitting element disposed on the protective substrate;
a first redistribution layer disposed on the light emitting device, wherein the first redistribution layer includes a first circuit layer electrically connected to the light emitting device, and a line width and a line distance of the first circuit layer are less than 8 μm;
a second redistribution layer disposed over the first redistribution layer, wherein the second redistribution layer comprises a second circuit layer and a conductive contact contacting the first circuit layer and the second circuit layer, and a line width and a line spacing of the second circuit layer are less than 8 microns; and
and the chip is arranged on the second circuit redistribution layer and is electrically connected with the second circuit layer.
6. The light emitting device package structure according to claim 5, wherein the second redistribution layer further comprises an insulating layer covering the first circuit layer, the insulating layer has a via hole exposing a portion of the first circuit layer, and the conductive contact is filled in the via hole to contact the first circuit layer and the second circuit layer.
7. A manufacturing method of a light emitting element packaging structure is characterized by comprising the following steps:
(i) providing a circuit redistribution structure;
(ii) providing a first substrate;
(iii) forming a circuit structure layer on the first substrate, wherein the circuit structure layer comprises a first circuit layer;
(iv) before or after step (ii), disposing a light emitting device between the first substrate and the circuit structure layer or on the circuit structure layer, wherein the light emitting device is electrically connected to the first circuit layer; and
(v) the circuit redistribution structure is arranged on the light-emitting element and comprises a first circuit redistribution layer, a second circuit redistribution layer and a chip, wherein the first circuit redistribution layer comprises a second circuit layer and a conductive contact piece contacting the second circuit layer, the second circuit layer is electrically connected with the first circuit layer through the conductive contact piece, the second circuit redistribution layer comprises a third circuit layer contacting the conductive contact piece, and the third circuit layer is electrically connected with the chip.
8. The method of manufacturing a light emitting device package according to claim 7, wherein the step (i) comprises the substeps of:
(a) forming the first redistribution layer on the second substrate;
(b) forming the second redistribution layer on the first redistribution layer;
(c) disposing the chip on the second redistribution layer; and
(d) and stripping the second substrate to expose the second circuit layer, thereby forming the circuit redistribution structure.
9. A manufacturing method of a light emitting element packaging structure is characterized by comprising the following steps:
(i) providing a circuit redistribution structure having a substrate, a first circuit redistribution layer disposed on the substrate, the first circuit redistribution layer including a first circuit layer and a conductive contact contacting the first circuit layer, and a second circuit redistribution layer including a second circuit layer contacting the conductive contact;
(ii) arranging a light-emitting element on the second circuit redistribution layer, wherein the light-emitting element is electrically connected with the second circuit layer;
(iii) (iii) stripping the substrate to expose the first circuit layer before or after step (ii); and
(iv) a chip is disposed under the first circuit redistribution layer, wherein the chip is electrically connected to the first circuit redistribution layer.
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| CN201810731232.2A CN110690251B (en) | 2018-07-05 | 2018-07-05 | Light emitting device package structure and method for manufacturing the same |
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| CN201810731232.2A CN110690251B (en) | 2018-07-05 | 2018-07-05 | Light emitting device package structure and method for manufacturing the same |
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| CN110690251B true CN110690251B (en) | 2022-03-18 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201340290A (en) * | 2012-03-22 | 2013-10-01 | Kun Hsin Technology Inc | Light emitting device |
| TW201443525A (en) * | 2013-05-07 | 2014-11-16 | Au Optronics Corp | Back light module and display device using the same |
| TW201638911A (en) * | 2015-04-23 | 2016-11-01 | 國際液晶有限公司 | Display |
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| US10720415B2 (en) * | 2016-11-01 | 2020-07-21 | Innolux Corporation | Display device and method for forming the same |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201340290A (en) * | 2012-03-22 | 2013-10-01 | Kun Hsin Technology Inc | Light emitting device |
| TW201443525A (en) * | 2013-05-07 | 2014-11-16 | Au Optronics Corp | Back light module and display device using the same |
| TW201638911A (en) * | 2015-04-23 | 2016-11-01 | 國際液晶有限公司 | Display |
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