CN110690118A - Amorphous indium gallium zinc oxide thin film transistor and manufacturing method thereof - Google Patents
Amorphous indium gallium zinc oxide thin film transistor and manufacturing method thereof Download PDFInfo
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- CN110690118A CN110690118A CN201910927388.2A CN201910927388A CN110690118A CN 110690118 A CN110690118 A CN 110690118A CN 201910927388 A CN201910927388 A CN 201910927388A CN 110690118 A CN110690118 A CN 110690118A
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- 239000010409 thin film Substances 0.000 title claims abstract description 22
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 title claims abstract description 20
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 title claims abstract description 10
- 229910052733 gallium Inorganic materials 0.000 title claims abstract description 10
- 229910052738 indium Inorganic materials 0.000 title claims abstract description 10
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 title claims abstract description 10
- 239000011787 zinc oxide Substances 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 21
- 239000010408 film Substances 0.000 claims abstract description 20
- 238000001755 magnetron sputter deposition Methods 0.000 claims abstract description 18
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims abstract description 16
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 16
- 229910052681 coesite Inorganic materials 0.000 claims abstract description 15
- 229910052906 cristobalite Inorganic materials 0.000 claims abstract description 15
- 229910052682 stishovite Inorganic materials 0.000 claims abstract description 15
- 229910052905 tridymite Inorganic materials 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims abstract description 13
- 238000001259 photo etching Methods 0.000 claims abstract description 11
- 239000000463 material Substances 0.000 claims abstract description 9
- 238000002360 preparation method Methods 0.000 claims abstract description 9
- 238000005566 electron beam evaporation Methods 0.000 claims abstract description 8
- 239000002202 Polyethylene glycol Substances 0.000 claims abstract description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims abstract description 3
- 229920001223 polyethylene glycol Polymers 0.000 claims abstract description 3
- KKEYFWRCBNTPAC-UHFFFAOYSA-L terephthalate(2-) Chemical compound [O-]C(=O)C1=CC=C(C([O-])=O)C=C1 KKEYFWRCBNTPAC-UHFFFAOYSA-L 0.000 claims abstract description 3
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 12
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 5
- 229910052593 corundum Inorganic materials 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229910001845 yogo sapphire Inorganic materials 0.000 claims description 5
- 235000012239 silicon dioxide Nutrition 0.000 claims description 4
- 238000004026 adhesive bonding Methods 0.000 claims description 3
- 239000003292 glue Substances 0.000 claims description 3
- 239000013077 target material Substances 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 229920003023 plastic Polymers 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005452 bending Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66969—Multistep manufacturing processes of devices having semiconductor bodies not comprising group 14 or group 13/15 materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
- H01L21/441—Deposition of conductive or insulating materials for electrodes
- H01L21/443—Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/107—Substrate region of field-effect devices
- H01L29/1075—Substrate region of field-effect devices of field-effect transistors
- H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/401—Multistep manufacturing processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
Abstract
The invention belongs to the field of flexible devices, and provides a flexible three-layer material bottom gate structure transistor which greatly enriches the use of the transistor as a circuit component, so that the application of the flexible device in large-scale integrated circuits and photoelectric devices is possible. Therefore, the invention discloses an amorphous indium gallium zinc oxide thin film transistor and a manufacturing method thereof, wherein a magnetron sputtering process is adopted to form an Indium Tin Oxide (ITO) bottom gate electrode on a polyethylene glycol terephthalate (PET) substrate and form Al in sequence2O3/TiO2/SiO2Gate dielectric film, followed by magnetron sputteringIn SiO2And forming an active layer IGZO thin film on the gate dielectric film, and finally forming source and drain electrodes on the active layer IGZO in a photoetching and vacuum electron beam evaporation mode, so that the preparation of the transistor is completed. The invention is mainly applied to the design and manufacture occasions of flexible electronic devices.
Description
Technical Field
The invention belongs to the field of flexible devices, and particularly relates to a structural design and a preparation method of a bottom gate thin film transistor taking amorphous IGZO-based multilayer materials as gate dielectric layers.
Background
Flexible electronics is a new electronic technology for manufacturing organic and inorganic electronic devices on flexible and ductile plastic or thin metal substrates, and has wide application in the fields of information, energy, medical treatment, national defense and the like. Such as printed radio frequency identification tags (RFID), electronic surface stickers, organic light emitting diodes OLEDs, flexible electronic displays, and the like. As with conventional Integrated Circuit (IC) technology, the primary driver for the development of flexible electronic technology is the fabrication process and equipment. It is critical to manufacture flexible electronic devices with smaller feature sizes at lower cost on larger substrates. The invention adopts a novel process based on amorphous IGZO preparation, forms a bottom gate electrode by magnetron sputtering, forms a gate dielectric layer and an active layer by magnetron sputtering, and then forms a metal source drain electrode by photoetching and vacuum electron beam evaporation technology, thereby being expected to be widely applied in the aspects of wearable electronics, large-scale flexible integrated circuits and the like.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to provide a bottom gate structure transistor of a heterogeneous gate dielectric layer made of three layers of materials based on a flexible PET substrate, a low-temperature magnetron sputtering process is adopted, a flexible thin film transistor with a bottom drive is designed and prepared in a simpler process, the use of the transistor as a circuit component is greatly enriched, and the application of the flexible device in large-scale integrated circuits and photoelectric devices is possible. Therefore, the technical scheme adopted by the invention is that the manufacturing method of the amorphous indium gallium zinc oxide thin film transistor adopts a magnetron sputtering process to form an Indium Tin Oxide (ITO) bottom gate electrode on a polyethylene glycol terephthalate (PET) substrate and sequentially form Al2O3/TiO2/SiO2A gate dielectric film, followed by magnetron sputtering on SiO2And forming an active layer IGZO thin film on the gate dielectric film, and finally forming source and drain electrodes on the active layer IGZO in a photoetching and vacuum electron beam evaporation mode, so that the preparation of the transistor is completed.
The specific manufacturing process is as follows:
a. selecting a PET flexible material as a substrate, firstly putting PET into a beaker filled with an acetone solution, then cleaning the PET in an ultrasonic cleaner for 5 minutes, and then cleaning the acetone in the ultrasonic cleaner by using an isopropanol solution to obtain a cleaner substrate;
b. plating an ITO film with the thickness of 200nm and SiO2/TiO2/Al2O3 with the thickness of 30nm on a PET substrate by adopting magnetron sputtering, wherein each layer is 10nm and is used as a bottom gate dielectric layer;
c. forming an IGZO film as an active layer above the dielectric layer by adopting a magnetron sputtering method, wherein the selected target material is InGaZnO 4;
d. gluing the IGZO active layer, aligning photoetching to form photoetching patterns of the source and drain electrodes, forming a 100nm metal source and drain electrode layer by adopting a vacuum electron beam evaporation mode, and removing the glue to finish the preparation of the device.
The amorphous indium gallium zinc oxide thin film transistor comprises a PET substrate, an ITO bottom gate electrode and Al from bottom to top in sequence2O3Gate dielectric film, TiO2Gate dielectric film, SiO2A gate dielectric film, followed by magnetron sputtering on SiO2An active layer IGZO thin film is formed on the gate dielectric film, and a source drain electrode is formed on the active layer IGZO.
The invention has the characteristics and beneficial effects that:
the amorphous indium gallium zinc oxide thin film transistor provided by the invention controls the current between the source and the drain of the device by controlling the voltage between the source and the drain, namely the saturation current. In addition, the flexible substrate can reduce the parasitic effect of the traditional silicon-based substrate transistor, can work under different bending degrees, and provides possibility for large-scale integration of high-performance flexible circuits and wide application of wearable electronic equipment.
Description of the drawings:
fig. 1 is a cross-sectional view of a thin film transistor with a flexible bottom-gate multilayer material as a gate dielectric layer.
Fig. 2 is a schematic diagram of the operation of the present invention, and the meaning represented by each part area in the diagram has been labeled in the figure.
Detailed Description
The technical scheme of the invention is that the PET substrate is formed by adopting a magnetron sputtering processTo form ITO bottom gate electrode and SiO2/TiO2/Al2O3And forming an active layer IGZO thin film by a magnetron sputtering method, and finally forming source and drain electrodes by photoetching and vacuum electron beam evaporation, thereby completing the preparation of the transistor.
The main working principle of the flexible bottom gate thin film transistor of the IGZO thin film is based on silicon dioxide (SiO)2) The principle of the transistor of (1) is different in that the device is a depletion mode device, whereas conventional SiO2The device belongs to an enhancement type device, and the working principle of the depletion type device is that when bias voltage is not applied, a conductive channel is formed at the position, close to the surface of a gate oxide, of an amorphous IGZO film, the device is conducted, the device can be closed only by applying negative bias voltage to a gate electrode, whether the device is closed or not is controlled through the gate voltage, and current between a source electrode and a drain electrode of the device, namely saturation current, is controlled through voltage between the source electrode and the drain electrode. In addition, the flexible substrate can reduce the parasitic effect of the traditional silicon-based substrate transistor, can work under different bending degrees, and provides possibility for large-scale integration of high-performance flexible circuits and wide application of wearable electronic equipment.
When bias is not applied to the ITO bottom gate electrode, a conducting channel is generated on the surface of the amorphous IGZO thin film close to the gate dielectric layer, and when a certain negative bias is applied to the ITO bottom gate electrode, along with the gradual increase of the applied voltage, more and more holes are accumulated on the surface of the amorphous IGZO thin film close to the gate dielectric layer due to the attraction effect of the negative voltage, so that the conducting channel between the source and the drain is pinched off, and the device is closed. The transistor in the invention adopts a gate dielectric layer material with high dielectric constant, and compared with the traditional dielectric layer material, the transistor can be made thinner, has better performance and higher current switching ratio, so that the device has higher integration level and wider application. In addition, the invention is a transistor device integrated on the plastic substrate, when the plastic substrate is bent, the normal operation of the device can be still met, and the transistor device can be widely applied to the aspects of intelligent wearing, artificial skin, biomedical treatment, photoelectric devices and the like.
The specific manufacturing process is as follows:
e. selecting a PET flexible material as a substrate, firstly putting PET into a beaker filled with an acetone solution, then cleaning the PET in an ultrasonic cleaner for 5 minutes, and then cleaning the acetone in the ultrasonic cleaner by using an isopropanol solution to obtain a cleaner substrate.
f. A200 nm thick ITO film and a 30nm thick SiO2/TiO2/Al2O3 are plated on a PET substrate by magnetron sputtering, and each layer is 10nm and serves as a bottom gate dielectric layer.
g. And forming an IGZO thin film as an active layer above the dielectric layer by adopting a magnetron sputtering method, wherein the selected target material is InGaZnO 4.
h. Gluing the IGZO active layer, aligning photoetching to form photoetching patterns of the source and drain electrodes, forming a 100nm metal source and drain electrode layer by adopting a vacuum electron beam evaporation mode, and removing the glue to finish the preparation of the device.
Claims (3)
1. A method for manufacturing amorphous indium gallium zinc oxide thin film transistor is characterized in that a magnetron sputtering process is adopted to form an Indium Tin Oxide (ITO) bottom gate electrode on a polyethylene glycol terephthalate (PET) substrate and to form Al in sequence2O3/TiO2/SiO2A gate dielectric film, followed by magnetron sputtering on SiO2And forming an active layer IGZO thin film on the gate dielectric film, and finally forming source and drain electrodes on the active layer IGZO in a photoetching and vacuum electron beam evaporation mode, so that the preparation of the transistor is completed.
2. The method for manufacturing the amorphous indium gallium zinc oxide thin film transistor according to claim 1, wherein the specific manufacturing process comprises the following steps:
selecting a PET flexible material as a substrate, firstly putting PET into a beaker filled with an acetone solution, then cleaning the PET in an ultrasonic cleaner for 5 minutes, and then cleaning the acetone in the ultrasonic cleaner by using an isopropanol solution to obtain a cleaner substrate;
plating an ITO film with the thickness of 200nm and SiO2/TiO2/Al2O3 with the thickness of 30nm on a PET substrate by adopting magnetron sputtering, wherein each layer is 10nm and is used as a bottom gate dielectric layer;
forming an IGZO film as an active layer above the dielectric layer by adopting a magnetron sputtering method, wherein the selected target material is InGaZnO 4;
gluing the IGZO active layer, aligning photoetching to form photoetching patterns of the source and drain electrodes, forming a 100nm metal source and drain electrode layer by adopting a vacuum electron beam evaporation mode, and removing the glue to finish the preparation of the device.
3. The amorphous indium gallium zinc oxide thin film transistor is characterized in that the amorphous indium gallium zinc oxide thin film transistor sequentially comprises a PET substrate, an ITO bottom gate electrode and Al from bottom to top2O3Gate dielectric film, TiO2Gate dielectric film, SiO2A gate dielectric film, followed by magnetron sputtering on SiO2An active layer IGZO thin film is formed on the gate dielectric film, and a source drain electrode is formed on the active layer IGZO.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8685815B2 (en) * | 2005-12-08 | 2014-04-01 | Micron Technology, Inc. | Hafnium tantalum titanium oxide films |
| CN104701383A (en) * | 2015-03-24 | 2015-06-10 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and manufacturing method thereof and display device |
| CN109801975A (en) * | 2019-01-15 | 2019-05-24 | 天津大学 | Flexible thin-film transistor and its manufacturing method based on amorphous indium gallium zinc film |
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- 2019-09-27 CN CN201910927388.2A patent/CN110690118A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8685815B2 (en) * | 2005-12-08 | 2014-04-01 | Micron Technology, Inc. | Hafnium tantalum titanium oxide films |
| CN104701383A (en) * | 2015-03-24 | 2015-06-10 | 京东方科技集团股份有限公司 | Thin film transistor, array substrate and manufacturing method thereof and display device |
| CN109801975A (en) * | 2019-01-15 | 2019-05-24 | 天津大学 | Flexible thin-film transistor and its manufacturing method based on amorphous indium gallium zinc film |
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Application publication date: 20200114 |