CN110674579A - Satellite peripheral interface simulation system and method - Google Patents
Satellite peripheral interface simulation system and method Download PDFInfo
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Abstract
The invention provides a satellite peripheral interface simulation system and a method, on-board software, CPU simulation software, the satellite peripheral interface simulation system, a single machine and a power module are sequentially connected, the on-board software, the CPU simulation software and the power module are external software, and the single machine is a fixed coding module; the satellite peripheral interface simulation system realizes the corresponding read function and write function of a register according to an address, and comprises a configurable module and a configuration file, wherein the configurable module comprises a register address module and other peripheral interface configuration modules, the register address module is used for storing a register address, and the other peripheral interface configuration modules are used for storing related design parameters; the configuration file is respectively connected with the register address module and other configuration modules of the peripheral interface, and the configuration file is used for initializing the register address module and other configuration modules of the peripheral interface according to configuration.
Description
Technical Field
The invention relates to the technical field of satellite system simulation, in particular to a satellite peripheral interface simulation system and method.
Background
With the rapid development of information technology and space technology, the complexity and new technology content of the satellite are continuously improved, the development period is further shortened, the on-orbit service life and reliability requirements are higher, the difficulty of satellite development is continuously increased, and the national economic construction and national defense construction of China present higher requirements for the satellite development. In order to meet the requirements of the nation and users on space technology, support national economic construction and support the change from national defense acceleration to informatization, the aerospace industry department of China faces the challenges of time tightness, heavy tasks and complex technology. Therefore, more advanced technology must be adopted, the technology and the management capability are improved, the development work of the satellite is completed quickly, well and economically, and the requirements of users are met to the maximum extent. Under the background, by utilizing the increasingly mature system simulation technology, the working efficiency and the accuracy are improved in the aspects of concept research, scheme demonstration, design research and development, integrated test, on-orbit maintenance and the like of the satellite.
The satellite simulation system mainly comprises the following four parts: chip model library, peripheral interface (such as CAN, etc.) model library, single machine model library and subsystem (such as dynamics, etc.) model library. Simulation modeling of the peripheral interface is one of important links for building a satellite simulation system. The peripheral interfaces used by satellites can be divided into two broad categories, functional components: interrupts, clocks, watchdog, etc., interface components: synchronous serial ports, asynchronous serial ports, CAN, etc. The hardware has fixed functions, for example, CAN has standard protocol regulation, so that the product consistency of each manufacturer is better, but the realization of each manufacturer has larger difference like synchronous/asynchronous serial ports, clocks and the like. Therefore, a general modeling method for the simulation model of the peripheral interface can be completely compatible with various peripheral interfaces with and without standard protocols, realizes rapid modeling, and is particularly important for the reliability, reusability, maintainability and the like of the peripheral interface model.
Because the application amount of the hardware in the aerospace is small, the hardware is difficult to produce in a large scale like civil use, and the normalization degree is low. The peripheral interface simulation of the existing satellite is oriented to the peripheral interface used in a specific satellite model, and the reusability is poor. In the process of peripheral interface simulation development, software codes need to be changed, and then, the peripheral interface simulation needs to invest larger development manpower and test manpower in satellite system simulation. Further, satellite high-fidelity fault simulation with extremely high value is caused, and the platform is difficult to realize. In the face of increasing civil microsatellite requirements, a satellite simulation system is difficult to implement. Therefore, a general modeling method for a peripheral interface simulation model is lacked at present, repeated development can be avoided, and a reliable-quality and general satellite single-machine model is opened.
Disclosure of Invention
The invention aims to provide a satellite peripheral interface simulation system and a satellite peripheral interface simulation method, which aim to solve the problem that the existing satellite peripheral interface simulation system is poor in reusability.
In order to solve the technical problem, the invention provides a satellite peripheral interface simulation system, on-board software, CPU simulation software, the satellite peripheral interface simulation system, a single machine and a power module are connected in sequence, wherein:
the satellite software, the CPU simulation software and the power module are external software, and the single computer is a fixed coding module;
the satellite peripheral interface simulation system realizes the corresponding read function and write function of a register according to an address, and comprises a configurable module and a configuration file, wherein the configurable module comprises a register address module and other peripheral interface configuration modules, the register address module is used for storing a register address, and the other peripheral interface configuration modules are used for storing related design parameters;
the configuration file is respectively connected with the register address module and other configuration modules of the peripheral interface, and the configuration file is used for initializing the register address module and other configuration modules of the peripheral interface according to configuration.
Optionally, in the satellite peripheral interface simulation system, the peripheral interface includes a functional component and an interface component, where:
the functional components comprise an interrupt module, a clock module and a watchdog module;
the interface component comprises a synchronous serial port module, an asynchronous serial port module and a CAN bus.
Optionally, in the satellite peripheral interface simulation system, the relevant design parameters include address offset and baud rate.
Optionally, in the satellite peripheral interface simulation system, the satellite peripheral interface simulation system further includes a timer, a functional function module, and a register read-write function module;
the timer and the function module are used for storing function functions;
the register read-write function module is used for storing the register read-write function.
The invention also provides a satellite peripheral interface simulation method based on the satellite peripheral interface simulation system,
stripping the register address and the related design parameters from peripheral interface code to enable the register address and the related design parameters to be configured by the configuration file.
Optionally, in the satellite peripheral interface simulation method, the receiving/sending buffer queue of the interface component is stripped from the peripheral interface code, and configured through the configuration file;
and stripping the interrupt of the interface component and the functional component from the peripheral interface code, and configuring through the configuration file.
Optionally, in the satellite peripheral interface simulation method, a model is constructed according to the number of registers of the peripheral interface, and the function of a specific register is configured through a configuration file.
Optionally, in the satellite peripheral interface simulation method, multiple operations corresponding to multiple register values are stripped from the peripheral interface code, and the read operation content or write operation content of each register is configured through a configuration file;
all operations are solidified into function codes in an enumeration mode, and then corresponding operation functions are triggered according to configuration matching register values.
Optionally, in the satellite peripheral interface simulation method, the baud rate function of the interface component and the periodic trigger function of the functional component are implemented by the timer and the functional function module, and the baud rate function of the interface component and the periodic trigger function of the functional component are configured by the configuration file;
solidifying all functions into function codes in an enumeration mode, triggering the rest function functions of the satellite peripheral interface simulation system according to the configuration matching register value, and configuring and calling through the configuration file.
Optionally, in the satellite peripheral interface simulation method, the satellite peripheral interface simulation system is in a class of C + + language, read operation, write operation, and function functions of the satellite peripheral interface simulation system are private member functions of the class, and register values and a receiving/sending buffer queue of the satellite peripheral interface simulation system are private member variables of the class;
in the process of initializing the object creation of the class, dynamically creating variables of corresponding data types according to the configuration in the configuration file, and repeatedly initializing the variables according to the initialization variables configured in the configuration file until all configuration items of the satellite peripheral interface simulation system in the configuration file are initialized.
The invention provides a satellite peripheral interface simulation system and a method, a general model modeling method for peripheral interface simulation is realized by a configurable module comprising a register address module and other configuration modules of a peripheral interface, the register address module stores register addresses, the other configuration modules of the peripheral interface store related design parameters, and a configuration file initializes the register address module and the other configuration modules of the peripheral interface according to configuration, a reusable and configurable peripheral interface model is built by the method, the method solves the problems that the existing aerospace-level peripheral interface has large difference, is lack of standardization and is difficult to generalize in simulation, the peripheral interface model built by the method can realize the quality control and the performance index accuracy of the peripheral interface simulation, and the peripheral interface model built by the method can be used for iterative development and verification when the peripheral interface function or performance is innovated, a simulation model library of the peripheral interfaces can be formed, the problem of modularized peripheral interface simulation of a satellite simulation system is solved, and the problem of generalization of fault simulation of the peripheral interfaces can be solved.
The configurable peripheral interface model only needs to spend extra time for variable initialization during initialization; in the subsequent simulation operation process, the corresponding variable can be directly used, and the operation speed of the model is not affected by the configuration and is slowed down.
Drawings
FIGS. 1-2 are schematic diagrams of a satellite peripheral interface simulation system according to an embodiment of the invention;
FIG. 3 is a diagram illustrating asynchronous serial port configuration according to an embodiment of the present invention;
shown in the figure: 10-software on board; 20-CPU simulation software; 30-satellite peripheral interface simulation system; 31-a configurable module; 311-register address module; 312-peripheral interface other configuration modules; 32-configuration file; 33-timer and function module; 34-a register read-write function module; 40-single machine; 50-power module.
Detailed Description
The satellite peripheral interface simulation system and method according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The core idea of the invention is to provide a satellite peripheral interface simulation system and a method thereof, so as to solve the problem of poor reusability of the existing satellite peripheral interface simulation system.
In order to realize the thought, the invention provides a satellite peripheral interface simulation system and a method, on-board software, CPU simulation software, the satellite peripheral interface simulation system, a single machine and a power module are connected in sequence, wherein: the satellite software, the CPU simulation software and the power module are external software, and the single computer is a fixed coding module; the peripheral interface realizes the corresponding read function and write function of the register according to the address, the peripheral interface comprises a configurable module and a configuration file, the configurable module comprises a register address module and other configuration modules of the peripheral interface, the register address module is used for storing the register address, and the other configuration modules of the peripheral interface are used for storing the related design parameters; the configuration file is respectively connected with the register address module and other configuration modules of the peripheral interface, and the configuration file is used for initializing the register address module and other configuration modules of the peripheral interface according to configuration.
< example one >
The present embodiment provides a satellite peripheral interface simulation system, as shown in fig. 1, a satellite software 10, a CPU simulation software 20, the satellite peripheral interface simulation system 30, a stand-alone machine 40, and a power module 50 are connected in sequence, where: the on-board software 10, the CPU simulation software 20 and the power module 50 are external software, and the single machine 40 is a fixed encoding module; the satellite peripheral interface simulation system 30 implements a corresponding read function and a write function of a register according to an address, the satellite peripheral interface simulation system 30 includes a configurable module 31 and a configuration file 32, the configurable module 31 includes a register address module 311 and a peripheral interface other configuration module 312, the register address module 311 is used for storing a register address, and the peripheral interface other configuration module 312 is used for storing a related design parameter; the configuration file 32 is respectively connected to the register address module 311 and the other configuration modules 312 of the peripheral interfaces, and the configuration file 32 is configured to initialize the register address module 311 and the other configuration modules 312 of the peripheral interfaces according to configuration.
Specifically, in the satellite peripheral interface simulation system, the peripheral interface includes a functional component and an interface component, where: the functional components comprise an interrupt module, a clock module and a watchdog module; the interface component comprises a synchronous serial port module, an asynchronous serial port module and a CAN bus.
Further, in the satellite peripheral interface simulation system, the relevant design parameters include address offset and baud rate. The satellite peripheral interface simulation system 30 further includes a timer and function module 33, and a register read-write function module 34; the timer and function module 33 is used for storing function functions; the register read-write function module 34 is used for storing register read-write functions.
The innovation points of the satellite peripheral interface simulation system of the embodiment include:
firstly, abstracting a peripheral interface into a data processing process, designing a method for configuring design parameters of a satellite peripheral interface simulation system through a configuration file and carrying out code solidification on a functional part, and realizing a generalized peripheral interface model modeling method.
Secondly, the satellite peripheral interface simulation system model dynamically creates a register in a constructor of the model class object according to the configuration of the configuration file, and initializes a corresponding read/write function pointer.
The same kind of peripheral interface equipment can be respectively modeled according to the number of registers; and all register names and read/write functions appearing in the external devices with the same number of registers are solidified by using codes in an enumeration manner.
Fourthly, the baud rate of the satellite peripheral interface simulation system equipment can be realized by setting a corresponding timer period through configuration.
And fifthly, the satellite peripheral interface simulation system model of the system needs extra time to initialize the configuration in the configuration file only when the model is initialized, and the simulation speed cannot be reduced when the simulation runs.
And sixthly, the configuration file can use any format as a storage file format, and is not limited to the XML format in the specific implementation.
And seventhly, the satellite peripheral interface simulation system model construction method is not limited to satellite peripheral interface modeling, and is also suitable for single-machine modeling of similar aerospace/aircraft.
In the satellite peripheral interface simulation system provided by this embodiment, the configurable module 31 includes the register address module 311 and the peripheral interface other configuration module 312, the register address module 311 stores register addresses, the peripheral interface other configuration module 312 stores related design parameters, and the configuration file 32 initializes the register address module 311 and the peripheral interface other configuration module 312 according to configuration, so as to implement a general model modeling method for peripheral interface simulation, and build a reusable and configurable satellite peripheral interface simulation system model by using the method, which will solve the current situations that the aerospace-level peripheral interface has large difference, lacks standardization, and simulation is difficult to generalize, the satellite peripheral interface simulation system model built by the method can realize the quality control and performance index accuracy of peripheral interface simulation, and the satellite peripheral interface simulation system model built by the method, the method can be used for iterative development and verification during peripheral interface function or performance innovation, can form a peripheral interface simulation model library, solves the problem of modularized peripheral interface simulation modularization of a satellite simulation system, and can solve the problem of generalization of peripheral interface fault simulation.
The configurable satellite peripheral interface simulation system model of the embodiment only needs to spend extra time for variable initialization during initialization; in the subsequent simulation operation process, the corresponding variable can be directly used, and the operation speed of the model is not affected by the configuration and is slowed down.
In summary, the above embodiments have described the different configurations of the satellite peripheral interface simulation system in detail, and it is needless to say that the present invention includes, but is not limited to, the configurations listed in the above embodiments, and any modifications made on the configurations provided in the above embodiments are within the scope of the present invention. One skilled in the art can take the contents of the above embodiments to take a counter-measure.
< example two >
The present embodiment further provides a satellite peripheral interface simulation method based on the satellite peripheral interface simulation system according to the previous embodiment, and the register address and the related design parameter are stripped from the peripheral interface 30 code, so that the register address and the related design parameter can be configured by the configuration file 32. Since interface units often have a use case where a plurality of identical units are connected to different addresses. Therefore, the address is configured through the configuration file and is one of the bases of the universal model of the peripheral interface. Due to different spacecraft design requirements, the design parameters of the peripheral interface are greatly changed and cannot be standardized, and the parameters are stripped from the generation and configured through configuration files.
Specifically, in the satellite peripheral interface simulation method, a receive/transmit buffer queue (FIFO) of the interface component is stripped from peripheral interface codes and configured through the configuration file 32; because the interface components need to receive and forward data, the hardware is internally provided with a receiving/transmitting buffer queue (FIFO), and parameters such as the size, half-full definition and the like of the FIFO of the interface components cannot be standardized due to the consideration of performance and cost, and the parameters need to be configurable. And stripping the interrupt of the interface component and the functional component from the peripheral interface code, and configuring the interrupt through the configuration file 32. Whether the interface component or the functional component is an interface component or a functional component, the interrupt IO of the chip may need to be interfaced, the interrupt trigger condition is set according to the requirement, even the same chip and peripheral interface component are used in different models, but due to design considerations such as PCBA wiring and the like, different interrupt IO can be interfaced, so that the parameters and the use setting need to be configurable. And constructing a model according to the number of registers of the peripheral interface, and configuring the functions of the specific registers through a configuration file 32. The device is classified according to different components of the peripheral interface, each type of device constructs different models according to different numbers of registers, and the functions of specific registers can be configured through configuration files. For example, the synchronous serial port has different types such as 3 registers, 5 registers, 7 registers and the like, a peripheral interface model is constructed for each type, and the specific function of each register is made configurable.
Furthermore, in the satellite peripheral interface simulation method, a plurality of operations corresponding to a plurality of register values are stripped from peripheral interface codes, and the read operation content or the write operation content of each register is configured through a configuration file 32; all operations are solidified into function codes in an enumeration mode, and then corresponding operation functions are triggered according to configuration matching register values. Different values in the register correspond to different operations or states, and the different values of the register correspond to different operations and are stripped from the code and can be configured. And all operations are solidified with function codes in an enumeration mode, so that the corresponding operation functions are triggered by matching register values only according to configuration. The baud rate function of the interface part and the function (such as the second pulse of the clock part) of the functional part needing periodic triggering are realized by a microsecond-level timer which is common to the system, and the settings can be configured through a configuration file. The baud rate function of the interface component and the periodic trigger function of the functional component are realized through the timer and the functional function module, and the baud rate function of the interface component and the periodic trigger function of the functional component are configured through the configuration file 32; all functions are solidified into function codes in an enumeration mode, the rest function functions of the satellite peripheral interface simulation system 30 are triggered according to the configuration matching register values, and the configuration calling is carried out through the configuration file 32.
In addition, in the satellite peripheral interface simulation method, the satellite peripheral interface simulation system 30 is a class in the C + + language, the read operation, write operation, and function of the satellite peripheral interface simulation system 30 are private member functions of the class, and the register value and the receiving/sending buffer queue of the satellite peripheral interface simulation system 30 are private member variables of the class; in the process of initializing the object creation of the class, according to the configuration in the configuration file 32, dynamically creating variables of corresponding data types, and repeatedly performing initialization according to the initialization variables configured in the configuration file 32 until all configuration items of the satellite peripheral interface simulation system 30 in the configuration file 32 are initialized. The simulation system model of the satellite peripheral interface is designed into a C + + class, the read/write operation and function of the simulation system of the satellite peripheral interface are private member functions of the class, and the register, FIFO and the like of the simulation system of the satellite peripheral interface are private member variables of the class. Therefore, the simulation of the peripheral interface can be converted into the object creation of the corresponding peripheral interface model. In the initialization process of the external interface model object creation, variables of corresponding data types need to be dynamically created according to the configuration in the configuration file, the variables are initialized according to the initial values configured in the configuration file, and the process is repeated until all configuration items of the satellite external interface simulation system in the configuration file are completely initialized.
Referring to the example, as shown in fig. 3, for an asynchronous serial port, an XML file is used as a configuration file, and a general model method for peripheral interface simulation is used to perform modeling.
Firstly, extracting design parameters in the asynchronous serial port, configuring in XML, and matching initial values according to the design of the asynchronous serial port, as shown in FIG. 3.
Second, this asynchronous serial port is the first version of the 5 registers, hence the name msAsyncR 51. And during initialization, creating a corresponding asynchronous serial port model class object according to the class name configured in the XML. And starting to enable the asynchronous serial port according to the setting of the enable item: 0 is off and 1 is on.
And thirdly, the address offset and default values of 5 registers are configured in XML. In the constructor of the class object creation, 5 corresponding register memory spaces are created. If one register is read/written corresponding to two different registers but corresponding to the same address, two registers are allocated during configuration, the address offset is the same, and the register names are distinguished by r and w.
And fourthly, 5 groups of read/write function pointers are created when the model class object is created, then the register read/write functions with solidified codes in the model are matched according to the register names, and the corresponding register read/write function pointers are initialized by the matched read/write function addresses.
Fifthly, since more than one asynchronous serial port with 5 registers is used, in the asynchronous serial port model of msAsyncR51, the corresponding register name and read/write function are added in an enumeration manner, and are solidified in a code manner, and each register and the corresponding read/write function are stored by using a linked list for initialization.
Sixthly, defining TX: receiving data from the chip for the interface component and sending to the external device; defining RX: the interface unit receives data from an external device and then transmits the data to the chip. And configuring the simplex/duplex working mode and the data transceiving direction of the interface component by using a mode item. And creates a corresponding FIFO whose attributes are set according to the configuration in XML.
Seventhly, according to the XML configuration, an interrupt signal and a trigger condition are initialized, and as shown in FIG. 3, the interrupt condition generated by the asynchronous serial port is that the data in the TX FIFO is reduced to 64 bytes. Establishing a timer when the asynchronous serial port model object is created, calculating the time length of taking out one byte from a TX FIFO as a timer trigger period according to the setting of a baud rate, starting the timer once the TX FIFO has data, taking out the data from the TX FIFO, judging whether the data in the TX FIFO is less than or equal to 64 bytes or not when the data in the TX FIFO is taken out one byte, calling an interrupt trigger function of an external interrupt model object if the condition is met, taking an interrupt number 3 as a function parameter, and simulating a corresponding IO port by the interrupt model object to generate an interrupt number 3. Because of the pure software emulation, there is no need to emulate the type of triggering of the interrupt (e.g., rising or falling of an edge, high or low of a level).
Eighthly, because the asynchronous serial port supports various baud rates, in the asynchronous serial port model class, the baud rate needs to be initialized in a linked list mode, and the value of the register and the corresponding baud rate are used as data of one node. In the write operation function of the baud rate setting register, the written value is compared with the value of each node in the linked list one by one, if the values are matched, the baud rate value in the node is taken, the baud rate value is converted into a time value required for transmitting one byte according to the main frequency of the chip, and the time value is used for setting the period triggered by the timer. Therefore, the asynchronous serial port can transmit data according to the corresponding baud rate.
And ninthly, solidifying other function functions of the asynchronous serial port through codes so as to be called by the read/write function of the timer and the register, thereby realizing the corresponding serial port function.
Repeating the method can model various peripheral interface devices, classify the obtained models, and obtain a peripheral interface model library which is comprehensive, reliable, accurate in performance index and reusable through accumulation.
In the satellite peripheral interface simulation system and method provided by the invention, the configurable module 31 comprises a register address module 311 and a peripheral interface other configuration module 312, the register address module 311 stores register addresses, the peripheral interface other configuration module 312 stores related design parameters, and the configuration file 32 initializes the register address module 311 and the peripheral interface other configuration module 312 according to configuration, so as to realize a universal model modeling method for peripheral interface simulation, and a reusable and configurable peripheral interface model is built by using the method, so that the problems that the existing aerospace-level peripheral interfaces have large difference, lack standardization and difficult generalization of simulation are solved, the peripheral interface model built by the method can realize the quality control and the performance index accuracy of peripheral interface simulation, and the peripheral interface model built by the method can be used for iterative development and verification during peripheral interface function or performance innovation, a simulation model library of the peripheral interfaces can be formed, the problem of modularized peripheral interface simulation of a satellite simulation system is solved, and the problem of generalization of fault simulation of the peripheral interfaces can be solved.
The configurable peripheral interface model only needs to spend extra time for variable initialization during initialization; in the subsequent simulation operation process, the corresponding variable can be directly used, and the operation speed of the model is not affected by the configuration and is slowed down.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the system disclosed by the embodiment, the description is relatively simple because the system corresponds to the method disclosed by the embodiment, and the relevant points can be referred to the method part for description.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. The satellite peripheral interface simulation system is characterized in that satellite software, CPU simulation software, the satellite peripheral interface simulation system, a single machine and a power module are sequentially connected, wherein:
the satellite software, the CPU simulation software and the power module are external software, and the single computer is a fixed coding module;
the satellite peripheral interface simulation system realizes the corresponding read function and write function of a register according to an address, and comprises a configurable module and a configuration file, wherein the configurable module comprises a register address module and other peripheral interface configuration modules, the register address module is used for storing a register address, and the other peripheral interface configuration modules are used for storing related design parameters;
the configuration file is respectively connected with the register address module and other configuration modules of the peripheral interface, and the configuration file is used for initializing the register address module and other configuration modules of the peripheral interface according to configuration.
2. The satellite peripheral interface emulation system of claim 1, wherein the peripheral interface comprises a functional component and an interface component, wherein:
the functional components comprise an interrupt module, a clock module and a watchdog module;
the interface component comprises a synchronous serial port module, an asynchronous serial port module and a CAN bus.
3. The satellite peripheral interface emulation system of claim 2, wherein the relevant design parameters comprise address offset and baud rate.
4. The satellite peripheral interface simulation system according to claim 3, wherein the satellite peripheral interface simulation system further comprises a timer and function module, and a register read-write function module;
the timer and the function module are used for storing function functions;
the register read-write function module is used for storing the register read-write function.
5. A satellite peripheral interface simulation method based on the satellite peripheral interface simulation system according to claim 4,
stripping the register address and the related design parameters from peripheral interface code to enable the register address and the related design parameters to be configured by the configuration file.
6. The satellite peripheral interface simulation method of claim 5, wherein a receive/transmit buffer queue of the interface component is stripped from peripheral interface codes and configured via the configuration file;
and stripping the interrupt of the interface component and the functional component from the peripheral interface code, and configuring through the configuration file.
7. The satellite peripheral interface simulation method according to claim 5, wherein a model is constructed according to the number of registers of the peripheral interface, and the function of a specific register is configured by a configuration file.
8. The satellite peripheral interface simulation method according to claim 5, wherein a plurality of operations corresponding to a plurality of register values are stripped from the peripheral interface code, and a read operation content or a write operation content of each register is configured by a configuration file;
all operations are solidified into function codes in an enumeration mode, and then corresponding operation functions are triggered according to configuration matching register values.
9. The satellite peripheral interface simulation method according to claim 5, wherein the baud rate function of the interface component and the function component cycle trigger function are realized by the timer and the function module, and the baud rate function of the interface component and the function component cycle trigger function are configured by the configuration file;
solidifying all functions into function codes in an enumeration mode, triggering the rest function functions of the satellite peripheral interface simulation system according to the configuration matching register value, and configuring and calling through the configuration file.
10. The satellite peripheral interface simulation method according to claim 5, wherein the satellite peripheral interface simulation system is a class of C + + language, the read operation, write operation, and function of the satellite peripheral interface simulation system are private member functions of the class, and the register value and the receiving/sending buffer queue of the satellite peripheral interface simulation system are private member variables of the class;
in the process of initializing the object creation of the class, dynamically creating variables of corresponding data types according to the configuration in the configuration file, and repeatedly initializing the variables according to the initialization variables configured in the configuration file until all configuration items of the satellite peripheral interface simulation system in the configuration file are initialized.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112989740A (en) * | 2021-04-23 | 2021-06-18 | 北京欣博电子科技有限公司 | Simulation method and device, computer equipment and storage medium |
| CN113806279A (en) * | 2021-10-19 | 2021-12-17 | 天津津航计算技术研究所 | Modeling method for achieving iMX6Q SoC on-chip serial port based on SystemC |
| CN113806279B (en) * | 2021-10-19 | 2024-04-30 | 天津津航计算技术研究所 | Modeling method for realizing iMX Q on-chip serial port of SoC based on SystemC |
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