CN110673986A - Memory operation abnormity capturing method, device, terminal and storage medium - Google Patents

Memory operation abnormity capturing method, device, terminal and storage medium Download PDF

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Publication number
CN110673986A
CN110673986A CN201910900078.1A CN201910900078A CN110673986A CN 110673986 A CN110673986 A CN 110673986A CN 201910900078 A CN201910900078 A CN 201910900078A CN 110673986 A CN110673986 A CN 110673986A
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memory
memory operation
value
address
memory address
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Chinese (zh)
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宋金时
田力
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Beijing ByteDance Network Technology Co Ltd
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Beijing ByteDance Network Technology Co Ltd
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Priority to CN201910900078.1A priority Critical patent/CN110673986A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level

Abstract

The embodiment of the disclosure provides a memory operation exception capturing method, a memory operation exception capturing device, a memory operation exception capturing terminal and a memory medium. The method for capturing the memory operation exception comprises the following steps: a registration signal processor; saving a stack environment of memory addresses; performing memory operation; when the signal processor receives the abnormal signal, determining whether memory operation is performed or not; when a memory operation is determined to be in progress, the stack context is restored to the saved memory address. The method disclosed by the invention registers the signal processor before the memory operation, keeps the stacking environment of the memory address, and ignores the fatal signal by directly jumping to the stored stacking environment when the memory operation occurs, so that the purpose of capturing the abnormity is achieved, and the user experience is further improved.

Description

Memory operation abnormity capturing method, device, terminal and storage medium
Technical Field
The embodiment of the disclosure relates to the technical field of computers, and more particularly, to a method, an apparatus, a terminal and a storage medium for capturing an exception of a memory operation.
Background
The bottom layer code written by C/C + + language can directly carry out the operation of memory address by pointer. For the wild pointer, the address pointed by the pointer has no read-write operation authority or the memory address which may be changed because the code synchronization cannot be carried out, if the pointer operation is used for directly accessing the memory address, a fatal signal such as when the memory operation of SIGSEG V fails occurs, and the program is crashed. In addition, the program in C/C + + language does not provide language-level exception capture for such fatal or exception signals when a memory operation fails, which is a drawback for both program developers and applications.
Disclosure of Invention
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
In order to solve the above problems, the present disclosure provides an anomaly capture method, an anomaly capture device, a terminal, and a storage medium for memory operations.
According to an embodiment of the present disclosure, there is provided a method for capturing an exception of a memory operation, including: a registration signal processor; saving a stack environment of memory addresses; performing memory operation; when the signal processor receives an abnormal signal, determining whether memory operation is performed or not; and when the memory operation is determined to be performed, restoring the stack environment of the saved memory address.
According to another embodiment of the present disclosure, there is provided an apparatus for capturing an exception of a memory operation, including: a processor registration module configured to register the signal processor; the storage module is configured to store a stack environment of the memory address; the execution module is configured to perform memory operation; a state determination module configured to determine whether a memory operation is in progress when the signal processor receives an exception signal; and the restoring module is configured to restore the stack environment of the saved memory address when the memory operation is determined to be in progress.
According to another embodiment of the present disclosure, there is provided a terminal including: at least one memory and at least one processor; the memory is used for storing program codes, and the processor is used for calling the program codes stored in the memory to execute the exception capture method of the memory operation.
According to another embodiment of the present disclosure, a computer storage medium is provided, in which a program code for executing the above-mentioned method for capturing an exception of a memory operation is stored.
By adopting the abnormal capturing method disclosed by the invention, the abnormal fatal signal is captured and ignored, and the program is normally executed after the fatal signal is ignored, so that the problem of application program crash caused by the fatal signal is avoided, and the user experience is improved.
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The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numbers refer to the same or similar elements. It should be understood that the drawings are schematic and that elements and features are not necessarily drawn to scale.
Fig. 1 shows a schematic flow chart of an exception capture method of a memory operation according to an embodiment of the present disclosure.
Fig. 2 shows a schematic flow chart of an exception capture method for memory operations according to another embodiment of the present disclosure.
Fig. 3 shows a schematic diagram of an exception capture device for memory operations according to an embodiment of the present disclosure.
FIG. 4 illustrates a schematic structural diagram of an electronic device 400 suitable for use in implementing embodiments of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order, and/or performed in parallel. Moreover, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "include" and variations thereof as used herein are open-ended, i.e., "including but not limited to". The term "based on" is "based, at least in part, on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions for other terms will be given in the following description.
It should be noted that the terms "first", "second", and the like in the present disclosure are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence relationship of the functions performed by the devices, modules or units.
It is noted that references to "a", "an", and "the" modifications in this disclosure are intended to be illustrative rather than limiting, and that those skilled in the art will recognize that "one or more" may be used unless the context clearly dictates otherwise.
The bottom layer code written by C/C + + language can directly carry out the operation of memory address by pointer. For the wild pointer, the address pointed by the pointer has no read-write operation authority or the memory address which may be changed because the code synchronization cannot be carried out, if the pointer operation is used for directly accessing the memory address, a fatal signal such as when the memory operation of SIGSEG V fails occurs, and the program is crashed. In addition, the program in C/C + + language does not provide language-level exception capture for the fatal or exception signal when the memory operation fails, which is a drawback for both program developers and applications and brings bad user experience.
As shown in fig. 1, an exception capture method for a memory operation is provided, which includes step S101 of registering a signal processor. Generally, the method for capturing the memory operation exception of the present disclosure is performed in the operating system of the terminal, however, the present disclosure is not limited thereto. In some embodiments, the terminal in the present disclosure may include, but is not limited to, mobile terminal devices such as a mobile phone, a smart phone, a notebook computer, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a navigation device, a vehicle-mounted terminal device, a vehicle-mounted display terminal, a vehicle-mounted electronic rearview mirror, and the like, and fixed terminal devices such as a digital TV, a desktop computer, and the like. In some embodiments, the operating systems of the present disclosure include, but are not limited to, windows, IOS, and Android operating systems. In some embodiments, registering the signal processor includes registering the signal processor by a program of the underlying code by calling a standard Application Program Interface (API) function gesture of the operating system. In some embodiments, the signal processor includes a signal processing function signahandler and, after registering the signal processor, the program of the underlying code saves an operating system kernel sent by the signal processing function signahandler by calling a standard application program interface function signaction of the operating system. Therefore, by storing the kernel of the operating system sent by the signal processing function signalHandler, the operation of the operating system is processed by the processing function signalHandler, so that the processing function signalHandler functions as a signal processor. It should be understood that the above examples of registration signal processors are merely illustrative and are not intended to limit the present disclosure.
As shown in fig. 1, the method for capturing an exception of a memory operation according to the present disclosure further includes step S102 of saving a stack environment of a memory address. In some embodiments, the stack context includes, for example, register addresses, and the like. In some embodiments, the stack environment holding the memory address includes a program of the underlying code executing the stack environment holding the memory address by calling a standard Application Program Interface (API) function sigsetjmp of the operating system. In some embodiments, standard Application Program Interface (API) function sigsetjmp also marks the current code address with a tag for marking the location of the saved memory address, which may also be used to identify the stack context of the saved memory address for later use in restoring the stack context. It should be understood that the above examples of a stack environment for saving memory addresses are merely illustrative and are not intended to limit the present disclosure.
As shown in fig. 1, the method for capturing an exception of a memory operation of the present disclosure further includes a step S103 of performing a memory operation. Typically, when an App is started or run, memory access is performed by memory operations of the operating system. As shown in fig. 1, the method for capturing an exception of a memory operation of the present disclosure further includes step S104, determining whether a memory operation is performed. In some embodiments, the operating system may perform operations on the underlying memory address after saving the stack context for the memory address. When an application program runs in an operating system, the memory of the operating system needs to be occupied, that is, during the running process of the application program, the memory address needs to be operated by the operating system, and usually, the corresponding memory address is accessed through pointer operation. When accessing a memory address, the fatal signal will go to a signal processing function (signal processor) when it occurs, i.e., the signal processor receives the abnormal fatal signal. For example, the exception signal may include SIGSEGV, SIGFPE, and the like. These exception signals are generated by the operating system and, if not captured, can crash the operation of the application. In some embodiments, for a wild pointer, a memory address where the pointer points to the address has no operation authority for reading and writing, or may change due to inability to perform code synchronization, if the operating system directly accesses such a memory address by using pointer operation, the above-mentioned abnormal fatal signal (or referred to as an abnormal signal) may occur, and the abnormal signal may cause a crash of a running application program. When the signal processor receives the exception signals, it is determined whether the operating system is performing memory operations, i.e., whether the exception signals are caused by memory operations.
In step S105, when it is determined that the memory operation is performed, the stack environment of the saved memory address is restored. When it is determined that the memory operation is not performed, no processing is performed. In some embodiments, restoring to the stack environment of the saved memory address comprises restoring to the stack environment of the saved memory address by calling a standard Application Program Interface (API) function siglongjmp of the operating system. As described above, the stack context may include register addresses, and the like. In some embodiments, as previously described, where the standard Application Programming Interface (API) function sigsetjmp marks the code address with a token, the standard Application Programming Interface (API) function siglongijmp may be used to jump directly to the token location saved by sigsetjmp above. In addition, the standard Application Program Interface (API) function siglongjmp can restore the stack at the same time and continue the execution flow of the program, so that the effect of capturing the exception is achieved, and the crash of the application program is avoided. It should be understood that the above examples of a stack environment for restoring to saved memory addresses are merely illustrative and are not intended to limit the present disclosure. In some embodiments, before performing the memory operation, and more particularly, before the stack environment for storing the memory address, setting a first value and a second value representing a state of the memory operation, wherein the first value indicates that the memory operation is in progress, and the second value indicates that the memory operation is not in progress. In some embodiments, since setting the value of the memory operation state is performed before the stack environment for storing the memory address, and the memory operation is not performed at this time, the operating system usually defaults that the memory operation state at this time is a second value, that is, the memory operation is not performed. In addition, a memory operation state different from the current memory operation state (no memory operation is being performed) is set to the first value (memory operation is being performed). In some embodiments, setting the first and second values representing the memory operating state includes setting the first and second values representing the memory operating state into a global variable (e.g., signalFlags). In some embodiments, the first value represents a correct (true) flag and the second value represents an incorrect (false) flag. In some embodiments, determining whether a memory operation is being performed includes determining whether a value of a memory operation state is a first value, and if the value of the memory operation state is the first value, it may be determined that the operating system is performing the memory operation at the time. It should be understood that the above examples of setting values representing memory operating states are merely illustrative and are not intended to limit the present disclosure.
Fig. 2 illustrates an exemplary flow of another embodiment of the method of the present disclosure. In some embodiments, preparation and initialization of the operating environment may occur prior to registration of the signal processor. Thereafter, registration of the signal processor, setting of the memory operation state, and saving of the current stack environment of the memory address may be performed in the manner described above. Then, the memory address operation can be started, and once the fatal signal occurs, whether the memory operation is performed or not is determined, and if the memory operation is performed, the memory address operation can directly jump to the mark position stored in sigsetjmp by calling the operating system standard API function siglingjmp, so that the fatal signal is ignored. In addition, the standard function siglongjmp can restore the stack at the same time, so that the execution flow of the program is continued, and the effect of exception capture is achieved. And if the memory operation is determined not to be performed, performing no processing. In the disclosure, a signal processor is registered before a memory operation, a memory operation state is recorded, and when a fatal signal occurs due to the memory operation, the fatal signal is ignored by directly jumping to the recorded memory state, so that the purpose of abnormal capture is achieved, and the crash of an application program caused by the fatal signal is avoided.
The embodiment of the present disclosure further provides an exception capture apparatus 300 for memory operations, which includes a processor registration module 301, a saving module 302, an execution module 303, a state determination module 304, and a recovery module 305. In some embodiments, the processor registration module 301 is configured to register a signal processor. In some embodiments, the saving module 302 is configured as a stack environment that saves memory addresses. In some embodiments, the execution module 303 is configured to perform memory operations. In some embodiments, the state determination module 304 is configured to determine whether a memory operation is in progress when an exception signal is received by the signal processor. In some embodiments, the restore module 305 is configured to restore the stack environment to the saved memory address when a memory operation is determined to be in progress. In some embodiments, the apparatus 300 further comprises a state value setting module configured to set a first value and a second value representing a state of the memory operation prior to the stack environment holding the memory address, wherein the first value represents that the memory operation is in progress and the second value represents that the memory operation is not in progress. In some embodiments, determining whether a memory operation is in progress includes determining, by the state determination module 303, whether the value of the memory operation state is a first value.
In some embodiments, registering the signal processor includes registering the signal processor by calling a standard Application Program Interface (API) function gesture of the operating system. In some embodiments, the signal processor includes a signal processing function signalHandler, and after registering the signal processor, the program of the underlying code saves an operating system kernel sent by the signal processing function signalHandler by calling the standard application program interface function signal. In some embodiments, setting the first and second values representing the memory operating state includes setting the first and second values representing the memory operating state into a global variable (e.g., signalFlags). In some embodiments, saving the stack environment for the memory address includes executing the stack environment for saving the memory address by calling a standard Application Program Interface (API) function sigsetjmp of an operating system, and the standard application program interface function sigsetjmp tags the memory address. In some embodiments, restoring to the stack environment of the saved memory address comprises restoring to the stack environment of the saved memory address by calling a standard Application Program Interface (API) function siglongjmp of an operating system to jump to the marked location of the memory address.
In addition, the present disclosure also provides a terminal, including: at least one memory and at least one processor; the memory is used for storing program codes, and the processor is used for calling the program codes stored in the memory to execute the exception capture method of the memory operation.
In addition, the present disclosure also provides a computer storage medium, in which a program code is stored, and the program code is used for executing the above-mentioned method for capturing the memory operation exception.
In some embodiments, the present disclosure registers the fatal signal processor before directly operating the memory with the pointer, and once the fatal signal occurs, the signal processor captures the fatal signal and ignores the fatal signal by judging the state, so that the program does not crash. Specifically, the signal processor is registered before the memory operation, the memory operation state is recorded, and when a fatal signal occurs due to the memory operation, the fatal signal is ignored by directly jumping to the recorded memory state, so that the purpose of capturing the abnormality is achieved. The method disclosed by the invention avoids the problem of application program crash caused by a fatal signal, and improves the user experience.
Referring now to FIG. 4, a block diagram of an electronic device 400 suitable for use in implementing embodiments of the present disclosure is shown. The terminal device in the embodiments of the present disclosure may include, but is not limited to, a mobile terminal such as a mobile phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a vehicle terminal (e.g., a car navigation terminal), and the like, and a stationary terminal such as a digital TV, a desktop computer, and the like. The electronic device shown in fig. 4 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 4, the electronic device 400 may include a processing means (e.g., a central processing unit, a graphics processor, etc.) 401 that may perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)402 or a program loaded from a storage device 406 into a Random Access Memory (RAM) 403. In the RAM 403, various programs and data necessary for the operation of the electronic apparatus 400 are also stored. The processing device 401, the ROM 402, and the RAM 403 are connected to each other via a bus 404. An input/output (I/O) interface 405 is also connected to bus 404.
Generally, the following devices may be connected to the I/O interface 405: input devices 406 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; an output device 407 including, for example, a Liquid Crystal Display (LCD), a speaker, a vibrator, and the like; storage devices 406 including, for example, magnetic tape, hard disk, etc.; and a communication device 409. The communication means 409 may allow the electronic device 400 to communicate wirelessly or by wire with other devices to exchange data. While fig. 4 illustrates an electronic device 400 having various means, it is to be understood that not all illustrated means are required to be implemented or provided. More or fewer devices may alternatively be implemented or provided.
In particular, according to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a non-transitory computer readable medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication means 609, or may be installed from the storage means 406, or may be installed from the ROM 402. The computer program performs the above-described functions defined in the methods of the embodiments of the present disclosure when executed by the processing device 401.
It should be noted that the computer readable medium in the present disclosure can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In contrast, in the present disclosure, a computer readable signal medium may comprise a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.
In some embodiments, the clients, servers may communicate using any currently known or future developed network protocol, such as HTTP (HyperText transfer protocol), and may be interconnected with any form or medium of digital data communication (e.g., a communications network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the Internet (e.g., the Internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed network.
The computer readable medium may be embodied in the electronic device; or may exist separately without being assembled into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: acquiring at least two internet protocol addresses; sending a node evaluation request comprising the at least two internet protocol addresses to node evaluation equipment, wherein the node evaluation equipment selects the internet protocol addresses from the at least two internet protocol addresses and returns the internet protocol addresses; receiving an internet protocol address returned by the node evaluation equipment; wherein the obtained internet protocol address indicates an edge node in the content distribution network.
Alternatively, the computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to: receiving a node evaluation request comprising at least two internet protocol addresses; selecting an internet protocol address from the at least two internet protocol addresses; returning the selected internet protocol address; wherein the received internet protocol address indicates an edge node in the content distribution network.
Computer program code for carrying out operations for the present disclosure may be written in any combination of one or more programming languages, including but not limited to an object oriented programming language such as Java, Smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present disclosure may be implemented by software or hardware. Where the name of a unit does not in some cases constitute a limitation of the unit itself, for example, the first retrieving unit may also be described as a "unit for retrieving at least two internet protocol addresses".
The functions described herein above may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), systems on a chip (SOCs), Complex Programmable Logic Devices (CPLDs), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
According to one or more embodiments of the present disclosure, there is provided a method for capturing an exception of a memory operation, including: a registration signal processor; saving a stack environment of memory addresses; performing memory operation; when the signal processor receives an abnormal signal, determining whether memory operation is performed or not; and when the memory operation is determined to be performed, restoring the stack environment of the saved memory address.
According to one or more embodiments of the present disclosure, further comprising: setting a first value and a second value representing the memory operation state before the stack environment for storing the memory address, wherein the first value represents that the memory operation is performed, and the second value represents that the memory operation is not performed; and wherein determining whether a memory operation is in progress comprises determining whether a value of the memory operation state is the first value.
In accordance with one or more embodiments of the present disclosure, setting the first value and the second value representing the memory operation state includes setting the memory operation state before the memory operation is performed to the second value, and setting a memory operation state different from the memory operation state before the memory operation is performed to the first value.
In accordance with one or more embodiments of the present disclosure, setting the first and second values representing the memory operation state includes setting the first and second values representing the memory operation state into a global variable.
According to one or more embodiments of the present disclosure, saving the stack environment of the memory address includes executing the stack environment of saving the memory address by calling a first standard Application Program Interface (API) function of an operating system, and the first standard API function marks the memory address.
According to one or more embodiments of the present disclosure, restoring the stack environment to the saved memory address includes restoring the stack environment to the saved memory address by calling a second standard Application Program Interface (API) function of the operating system to jump to the location of the marked memory address.
According to one or more embodiments of the present disclosure, there is also provided an apparatus for capturing an exception of a memory operation, including: a processor registration module configured to register the signal processor; the storage module is configured to store a stack environment of the memory address; the execution module is configured to perform memory operation; a state determination module configured to determine whether a memory operation is in progress when the signal processor receives an exception signal; and the restoring module is configured to restore the stack environment of the saved memory address when the memory operation is determined to be in progress.
According to one or more embodiments of the present disclosure, further comprising: the device comprises a state value setting module, a first state value setting module and a second state value setting module, wherein the first state value and the second state value are used for setting a first value and a second value which represent the states of memory operations before the stack environment of memory addresses is saved; and wherein determining whether a memory operation is in progress comprises determining, by the state determination module, whether a value of the memory operation state is the first value.
According to one or more embodiments of the present disclosure, there is provided a terminal including: at least one memory and at least one processor; the memory is used for storing program codes, and the processor is used for calling the program codes stored in the memory to execute the exception capture method of the memory operation.
According to one or more embodiments of the present disclosure, a computer storage medium is provided, which stores a program code for executing the above-described method for capturing an exception of a memory operation.
The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the disclosure herein is not limited to the particular combination of features described above, but also encompasses other embodiments in which any combination of the features described above or their equivalents does not depart from the spirit of the disclosure. For example, the above features and (but not limited to) the features disclosed in this disclosure having similar functions are replaced with each other to form the technical solution.
Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limitations on the scope of the disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims (10)

1. An exception capture method for memory operations, comprising:
a registration signal processor;
saving a stack environment of memory addresses;
performing memory operation;
when the signal processor receives an abnormal signal, determining whether memory operation is performed or not;
and when the memory operation is determined to be performed, restoring the stack environment of the saved memory address.
2. The method of claim 1, further comprising: setting a first value and a second value representing the memory operation state before saving the stack environment of the memory address, wherein the first value represents that the memory operation is performed, and the second value represents that the memory operation is not performed;
and wherein determining whether a memory operation is in progress comprises determining whether a value of the memory operation state is the first value.
3. The method of claim 2, wherein setting the first value and the second value indicative of the memory operation state comprises setting the memory operation state before the memory operation to the second value, and setting a memory operation state different from the memory operation state before the memory operation to the first value.
4. The method of claim 2, wherein setting the first and second values representing the memory operation state comprises setting the first and second values representing the memory operation state into a global variable.
5. The method of claim 1, wherein saving the stack environment of the memory address comprises executing the stack environment of the memory address by calling a first standard Application Program Interface (API) function of an operating system, and wherein the first standard API function tags the memory address.
6. The method of claim 5, wherein restoring the stack context to the saved memory address comprises restoring the stack context to the saved memory address by calling a second standard Application Program Interface (API) function of an operating system to jump to the location of the marked memory address.
7. An apparatus for trapping memory operation exceptions, comprising:
a processor registration module configured to register the signal processor;
the storage module is configured to store a stack environment of the memory address;
the execution module is configured to perform memory operation;
a state determination module configured to determine whether a memory operation is in progress when the signal processor receives an exception signal;
and the restoring module is configured to restore the stack environment of the saved memory address when the memory operation is determined to be in progress.
8. The apparatus for trapping memory operation exceptions according to claim 7, further comprising: the state value setting module is configured to set a first value and a second value representing the memory operation state before saving the stack environment of the memory address, wherein the first value represents that the memory operation is performed, and the second value represents that the memory operation is not performed;
and wherein determining whether a memory operation is in progress comprises determining, by the state determination module, whether a value of the memory operation state is the first value.
9. A terminal, characterized in that the terminal comprises:
at least one memory and at least one processor;
wherein the memory is configured to store program code, and the processor is configured to call the program code stored in the memory to perform the exception capture method for the memory operation according to any one of claims 1 to 6.
10. A computer storage medium, characterized in that the computer storage medium stores a program code for executing the abnormality capturing method for a memory operation according to any one of claims 1 to 6.
CN201910900078.1A 2019-09-23 2019-09-23 Memory operation abnormity capturing method, device, terminal and storage medium Pending CN110673986A (en)

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