CN110673592A - Universal fault detection and test system for multiple subsystems of microsatellite - Google Patents

Universal fault detection and test system for multiple subsystems of microsatellite Download PDF

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CN110673592A
CN110673592A CN201911024284.7A CN201911024284A CN110673592A CN 110673592 A CN110673592 A CN 110673592A CN 201911024284 A CN201911024284 A CN 201911024284A CN 110673592 A CN110673592 A CN 110673592A
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board
model
fault detection
universal
main controller
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CN110673592B (en
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贾臻
何波
孙华苗
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Shenzhen Aerospace Dongfanghong Satellite Co.,Ltd.
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SHENZHEN AEROSPACE DONGFANGHONG DEVELOPMENT CO LTD
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00Testing or monitoring of control systems or parts thereof
    • G05B23/02Electric testing or monitoring
    • G05B23/0205Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
    • G05B23/0259Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the response to fault detection
    • G05B23/0262Confirmation of fault detection, e.g. extra checks to confirm that a failure has indeed occurred
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24065Real time diagnostics

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
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  • Programmable Controllers (AREA)

Abstract

The invention provides a universal fault detection test system for a plurality of subsystems of a microsatellite, which is characterized by comprising a programmable intelligent interface board, a bus mother board, a main controller board, an upper computer and a universal test bed, wherein the main controller board is communicated with the programmable intelligent interface board through the bus mother board, the programmable intelligent interface board is connected with the universal test bed, and the main controller board is responsible for executing all models required by appointed simulation; the upper computer is connected with the main controller board, and the upper computer cuts the model according to the simulation test requirement and downloads the real-time board card to the main controller board. The invention has the beneficial effects that: the invention has strong universality, clear fault detection flow, quick positioning problem and universalization of fault manufacture, reduces programming complexity, saves time and improves working efficiency.

Description

Universal fault detection and test system for multiple subsystems of microsatellite
Technical Field
The invention relates to the technical field of satellites, in particular to a universal fault detection and test system for multiple subsystems of a microsatellite.
Background
The design, manufacture and simulation and verification of a control scheme matched with the microsatellite can not be separated from troubleshooting of the working state of hardware equipment and simulation of fault conditions generated in principle, and the comprehensiveness and coverage of the test determine the reliability and success or failure of tasks of a satellite system. Fault detection involves simulation of the fault condition of a virtual component in the circuit operating state, communication conditions, and semi-physical simulation of actual hardware. In semi-physical simulation, different simulators and models are needed to be used and connected together to serve as test equipment for closed-loop butt joint test with the star attitude control system. The attitude control component simulator comprises: gyros, flywheels, star sensors, solar sensors, magnetometers, magnetic torquers, propulsion systems, and the like. The required models are a dynamic model and a component model. In the actual hardware test, a simulator is replaced by a real attitude control component, and the equipment is accessed to the whole closed-loop fault simulation verification system through the unfolding box.
In the past test, the simulation verification of fault detection basically stays in principle verification, and logic verification can only be performed through codes. In the actual satellite design and manufacturing process, not only the state of the real component needs to be verified quickly, but also whether the real response of each device with faults is consistent with the theoretical fault detection result or not under the working state of the whole satellite assembly needs to be verified, because the real product is abnormal, sometimes the result is different from the result supposed by us, for example, when the real component does not have faults, the result is always output in a linear manner, some are suddenly changed, and some are slowly changed in a linear manner; when the component suddenly breaks down, the current does not change to a data 0, but does not have data, which is not realized in software. The two problems are that the original fault detection method cannot be realized, and the short-period satellite development is obviously restricted.
In the satellite fault detection, corresponding detection methods are provided for different specialties, but the professional cross part is still incomplete, so that the problem occurring in the link in the actual working process is difficult to locate. Meanwhile, the fault detection system has the characteristic of no generalization due to the differentiation of the product communication protocol of the attitude control component.
Disclosure of Invention
The invention provides a universal fault detection test system for a plurality of subsystems of a microsatellite, which comprises a programmable intelligent interface board, a bus motherboard, a main controller board, an upper computer and a universal test bed, wherein the main controller board is communicated with the programmable intelligent interface board through the bus motherboard, the programmable intelligent interface board is connected with the universal test bed, and the main controller board is responsible for executing and running all models required by appointed simulation; the upper computer is connected with the main controller board, and the upper computer cuts the model according to the simulation test requirement and downloads the real-time board card to the main controller board; the fault detection test system also comprises an integrated upper machine model base based on simulink, a real-time operating system and a programmable intelligent board card program, wherein the real-time operating system: the system is used for coding and compiling the simulink module to generate an executable code; the programmable intelligent board card program comprises the following steps: the system is used for realizing the standard bus communication with the upper computer.
As a further improvement of the invention, the programmable intelligent interface board is a universal board card based on different electrical interfaces, and the digital logic on the programmable intelligent interface board uses fpga programming, thereby completely adapting to the time sequence of various communication interfaces and the transceiving function of protocols.
As a further improvement of the invention, the main controller board is responsible for specifying the implementation and operation of all models required by simulation, and the model library comprises a dynamic model, a posture control component model, a measurement and control component model and a programmable intelligent interface board required by dynamic specification of the posture control component model and the measurement and control component model.
As a further improvement of the invention, the universal test bed comprises an unfolding box and a plurality of universal intelligent interface boards, the universal intelligent interface boards are responsible for transmitting real attitude control component data into the spaceborne system and the fault detection test system, and the communication direction is selected in a bidirectional or unidirectional mode; the expansion box is responsible for the physical transmission direction of data transmission of each connection universalization test bed, and the universal intelligent interface board realizes the switching between the model library and the real component through the expansion box.
As a further improvement of the invention, the integrated upper-level model base based on simulink comprises a dynamic simulation model, a flywheel simulator model, a gyro simulator model, a magnetic torquer simulator model, a magnetometer simulator model, a measurement and control component simulator model, a power supply model and a thermal control model.
As a further improvement of the invention, the simulink-based integrated upper machine model library is realized by the combination of simulink graphical programming and C function-based s-function.
As a further improvement of the invention, in the single-machine fault detection of the universal model platform of the closed-loop control system, the simulink model library graphical file of the upper computer directly generates optimized and transplantable personalized codes, automatically generates programs under various real-time systems according to target configuration, downloads the programs to the real-time system of the main controller board for loading and running, and introduces the fault state in the model into the fault detection test system by taking initial conditions as input.
As a further improvement of the invention, the data of the real attitude control component can be respectively sent to the programmable intelligent interface board and the satellite borne machine system by the universal test bed, and the programmable intelligent interface board sends the data to the upper computer through the bus motherboard, the main controller board and the network interface.
As a further improvement of the invention, the fault detection test system sends the instruction information to the test equipment through the programmable intelligent interface board or the Ethernet port to form a semi-physical simulation platform or a full-physical test platform.
As a further improvement of the invention, the main controller board is a standard X86 board, and the electrical interfaces of the programmable intelligent interface board include AD, DA, OC, IO, 422/485, CAN, LVDS and potentiometer electrical interfaces.
The invention has the beneficial effects that: the invention has strong universality, clear fault detection flow, quick positioning problem and universalization of fault manufacture, reduces programming complexity, saves time and improves working efficiency.
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FIG. 1 is a functional block diagram of the present invention;
FIG. 2 is a functional block diagram of a generalized test bed of the present invention;
FIG. 3 is a system fault detection workflow diagram of one embodiment of the invention;
FIG. 4 is an on-track simulation test chart for normal system manufacturing fault conditions.
Detailed Description
The invention discloses a universal fault detection test system for a plurality of subsystems of a microsatellite, the core of hardware is a universal controller board and a universal programmable intelligent interface board series based on a standard bus, as shown in figure 1, the hardware comprises:
programmable intelligent interface board: based on the universal board cards with different electrical interfaces, most electrical interfaces such as AD, DA, OC, IO, 422/485, CAN, LVDS, potentiometers and the like are used as electrical interfaces, and the digital logic on the board CAN use fpga programming and is completely suitable for the time sequence of various communication interfaces and the transceiving function of protocols. The main controller board communicates with the programmable intelligent interface board through a bus motherboard.
A main controller board: the intelligent simulation board is a standard board card with an X86 architecture and is responsible for executing and running all models required by specified simulation, and the model library comprises a dynamic model, a posture control component model, a measurement and control component model and a programmable intelligent interface board required by dynamic specification of the component models.
An upper computer: and cutting the model according to the requirement of the simulation test, and downloading the real-time board card to the main controller board.
As shown in fig. 2, the generalized test bed: and the universal intelligent interface board is responsible for transmitting real attitude control component data into the spaceborne machine system and the fault detection test system, and the communication direction can be selected in a bidirectional or unidirectional mode. The expansion box part is responsible for physical transmission directions of data transmission of all the connection generalized test beds. And the universal intelligent interface board realizes the switching between the model library and the real component through the expansion box.
The system operation process is according to the fault test needs, if the fault detection test system can detect the working state of the single machine component of the control subsystem, detect the integrated electronic subsystem, detect the fault between the subsystems after the control system is connected with the integrated electronic subsystem, re-verify the fault emergency scheme theory, and perform on-orbit simulation test on the fault state of the normal system.
The system software of the invention comprises:
the integrated upper computer model base based on the simulink comprises a dynamics simulation model, a flywheel simulator model, a gyro simulator model, a magnetic torquer simulator model, a magnetometer simulator model, a measurement and control assembly simulator model, a power supply model and a thermal control model. The method is realized by combining simulink graphical programming with s-function based on C function, and can be visual and convenient, and can also be used for conveniently designing communication with PXI bus.
A real-time operating system: the system is used for coding and compiling the simulink module to generate executable codes. And the controller board can be dynamically loaded when the real-time system runs.
Programmable intelligent board program: and f gpa software implementation, including the implementation of standard bus communication with an upper computer. Therefore, the requirements of various communication time sequence protocols can be conveniently met.
As shown in FIG. 3, the present invention implements embodiment one, the closed-loop control system generalizes the single-machine fault detection of the model platform. In the first embodiment, the software model of the invention realizes the operation principle: based on rapid prototyping development, a RealTimeWorshop tool is used for directly generating optimized and transplantable personalized codes from a graphic file of a simulink model library of an upper computer, automatically generating programs under various real-time systems according to target configuration, downloading the programs to a real-time system of a main controller board for loading and running, introducing fault states in the models into a fault detection system by taking initial conditions as input, for example, in the normal communication process of a momentum wheel, a frame header in an RS422 protocol or an arbitration domain in a CAN protocol is input by simulating the initial conditions, correct codes are modified into errors, and communication abnormity is caused; also a momentum wheel, modifying the rotational speed information to a data larger than the upper bound, rotational speed saturation information may occur. The above is also the simplest system of fault detection systems.
And (3) detecting the access fault of the real single machine: the logic block diagram of the integrated fault testing system is shown in fig. 1, on the basis of the simplest system, a universal testing bed is introduced, real components are connected into the testing system, a virtual model in a main controller board is removed, at the moment, data of the real attitude control components are respectively sent to a programmable intelligent interface board and a satellite borne machine system through the universal testing bed, and the programmable intelligent interface board sends the data to an upper computer through a bus motherboard, the main controller board and a network port. Because data is sent to the host controller board, that is, real attitude control component data replaces virtual components, and participates in closed-loop simulation, this is the principle that real attitude control component manufacturing faults introduce a fault detection system. Meanwhile, the data of the real attitude control component can be directly read out through the upper computer. Meanwhile, the data of the real attitude control component is introduced into the general platform, so that the effectiveness and the reasonability of the fault detection method without accessing the real attitude control component are verified.
For the satellite-borne system, because the software of the satellite-borne computer is different in task and stage, the software may be changed and the state cannot be confirmed, the software of the satellite-borne computer can be directly checked from a real attitude control component, a universal test bed to the satellite-borne system in fig. 1, because the software of the satellite-borne system is directly introduced to the real attitude control component, and meanwhile, if a problem occurs in a cable or a circuit board, the software of the satellite-borne computer can be checked section by section from an output port of the test bed to the satellite-borne board through the system to locate the fault.
As shown in fig. 4, the fault detection testing system of the present invention not only can combine the data of the real attitude control component with the data of the virtual component, but also can send the instruction information to the testing device through the programmable intelligent interface board or the ethernet port to form a semi-physical simulation platform or a full physical testing platform. Real part failures were made as follows: when a normal system runs, the three-axis rotary table works according to a fault mode to be manufactured, so that the conditions of a part of real faults, such as rotating speed exceeding, polarity error and adjacent data abnormity, can be realized; faults of the magnetometer can be introduced into a magnetic torquer to carry out saturation abnormity, data mutation and other faults; the star sensitive fault can be used for manufacturing four-element errors, data mutation and other faults through a constant star simulator.
The method can be used for fault detection in other professional directions, and if the efficiency of fault judgment is improved, an indicator lamp can be added on a test circuit or an adapter plate, and the working state of the system is judged according to the display state or color of the lamp. Meanwhile, if more systems are added and the number of interfaces of the hardware board card needs to be increased continuously, a router needs to be introduced when necessary, and a local area network is established for data transmission.
The invention can realize each stage from design simulation verification to model test. The fault detection test system can detect the working state of a single machine component of the control subsystem, detect the comprehensive electronic subsystem, detect faults between subsystems after the control subsystem is in butt joint with the comprehensive electronic system, re-verify the fault emergency scheme theory and perform on-orbit simulation test on the manufacturing fault state of a normal system.
The invention can realize the simulators of all the attitude control component assemblies: the attitude control models and hardware are completely or partially designed separately, all the attitude control models are integrated on the control board card, the attitude control models can be cut by software and run in real time, the hardware interfaces of the component components are connected with the universal interface board by the control board card, and the hardware interfaces and the universal interface board are communicated through a standard bus.
It is realized that 1 machine does not need to be made separately for each component. As long as the number of hardware interfaces is enough, all the components can be completely integrated on one machine and are realized through the cooperation of the universal controller board and the universal interface board.
The realization system is simple. Instead of the traditional satellite simulation test system, a plurality of signal conditioners and component simulators are needed. The controller board is connected with the standard bus of the interface board, and the interface board is programmed in a field programmable gate array mode.
The integrated test of fault detection is realized, the detection of transmission cables, the working state of a single machine, the working state of a whole satellite, the rationality of a fault detection scheme theory and the manufacture of real faults can be finished in a fault detection test system, and meanwhile, due to the characteristic of generalization, equipment of various communication protocols can be directly subjected to butt joint test. The integration means that various types of equipment can be completed on one fault testing system, and simultaneously means that the integration test can be realized in multiple stages in the whole satellite development process.
The invention has the following technical advantages:
1. the fault detection test system can quickly locate the system-level fault position, gradually accesses an upper-layer system through a simplest system, quickly locates the fault occurrence position, and verifies the validity of the fault emergency theory.
2. The universal model and the communication interface in the fault detection test system. The model of the simulator is separated from the hardware interface, the simulator model is cut by the upper computer and then is downloaded to the control panel to operate in a unified mode, and the simulator hardware interface time sequence protocol can be rapidly realized by fpga. The model and the hardware interface are connected and interconnected at high speed by a standard bus.
3. A rapid prototyping development method of dynamic simulation software. Namely, the graphical programming is based on matlab, and the rapid downloading is realized, so that a large amount of code writing time is saved.
4. The fault detection test system has strong universality, and simulation is completely free of a special component simulator, and only hardware allocation, board interface programming and component model programming of the universal interface board are needed.
5. The invention has clear fault detection process and quick positioning problem. The system level high complexity is reduced to a modularized processing method, and the problems are checked unit by unit. The real fault can be restored to verify the rationality of the theoretical fault detection method.
6. The fault making is generalized, the programming complexity is reduced, the time is saved, and the working efficiency is improved.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.

Claims (10)

1. A universal fault detection test system for a plurality of subsystems of a microsatellite is characterized by comprising a programmable intelligent interface board, a bus mother board, a main controller board, an upper computer and a universal test bed, wherein the main controller board is communicated with the programmable intelligent interface board through the bus mother board, the programmable intelligent interface board is connected with the universal test bed, and the main controller board is responsible for executing and running all models required by appointed simulation; the upper computer is connected with the main controller board, and the upper computer cuts the model according to the simulation test requirement and downloads the real-time board card to the main controller board; the fault detection test system also comprises an integrated upper machine model base based on simulink, a real-time operating system and a programmable intelligent board card program,
the real-time operating system: the system is used for coding and compiling the simulink module to generate an executable code;
the programmable intelligent board card program comprises the following steps: the system is used for realizing the standard bus communication with the upper computer.
2. The fault detection test system of claim 1, wherein: the programmable intelligent interface board is a universal board card based on different electrical interfaces, and the digital logic on the programmable intelligent interface board uses fpga programming, thereby completely adapting to the time sequence of various communication interfaces and the transceiving function of protocols.
3. The fault detection test system of claim 2, wherein: the main controller board is responsible for specifying all models required by simulation to operate, and the model library comprises a dynamic model, a posture control component model, a measurement and control component model and a programmable intelligent interface board required by dynamic specification of the posture control component model and the measurement and control component model.
4. The fault detection test system of claim 1, wherein: the universal test bed comprises an unfolding box and a plurality of universal intelligent interface boards, the universal intelligent interface boards are responsible for transmitting real attitude control component data into the spaceborne system and the fault detection test system, and the communication direction is selected in a bidirectional or unidirectional mode; the expansion box is responsible for the physical transmission direction of data transmission of each connection universalization test bed, and the universal intelligent interface board realizes the switching between the model library and the real component through the expansion box.
5. The fault detection test system of claim 1, wherein: the integrated upper computer model base based on the simulink comprises a dynamic simulation model, a flywheel simulator model, a gyro simulator model, a magnetic torquer simulator model, a magnetometer simulator model, a measurement and control component simulator model, a power supply model and a thermal control model.
6. The fault detection test system of claim 5, wherein: the integrated upper machine model library based on the simulink is realized by combining simulink graphical programming with s-function based on a C function.
7. The fault detection test system of claim 1, wherein: in the single-machine fault detection of the universal model platform of the closed-loop control system, a simulink model library graphical file of an upper computer directly generates optimized and transplantable personalized codes, automatically generates programs under various real-time systems according to target configuration, downloads the programs to the real-time system of a main controller board, loads and operates, and introduces a fault state in the model into a fault detection test system by taking initial conditions as input.
8. The fault detection test system of claim 1, wherein: the data of the real attitude control component can be respectively sent to the programmable intelligent interface board and the satellite borne aircraft system by the universal test bed, and the programmable intelligent interface board sends the data to the upper computer through the bus motherboard, the main controller board and the network interface.
9. The fault detection test system of claim 1, wherein: the fault detection test system sends the instruction information to the test equipment through the programmable intelligent interface board or the Ethernet port to form a semi-physical simulation platform or a full-physical test platform.
10. The fault detection test system of claim 3, wherein: the main controller board is a standard board card with an X86 architecture, and the electrical interface of the programmable intelligent interface board comprises AD, DA, OC, IO, 422/485, CAN, LVDS and a potentiometer electrical interface.
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