CN110661537A - Low noise block converter integrated circuit, converter and satellite receiving system - Google Patents

Abstract

The present disclosure provides a low noise block converter that converts a radio frequency signal received from a satellite into an intermediate frequency signal, wherein image rejection of the radio frequency signal is carried out in two stages by a low noise amplifier integrated circuit. The present disclosure reduces the number of discrete components by integrating electronic components onto one integrated circuit or chip and, at the same time, improves the noise figure of a low noise block converter. The low noise block integrated circuit comprises a low noise amplifying circuit, a radio frequency path selector and a signal frequency down converter, wherein image suppression is carried out by combining the low noise amplifying circuit and the signal frequency down converter.

Description

Low noise block converter integrated circuit, converter and satellite receiving system

The present application claims priority to U.S. application No. 16/421,285 on 23/5/2019. The present application claims priority to U.S. provisional application No. 62/691,615 on 29/6/2018. The entire contents of the above-mentioned patent application are incorporated herein by reference and constitute a part of this specification.

Technical Field

The present invention relates to a low noise converter, and more particularly, to a low noise down converter integrated into a single chip.

Background

In a satellite broadcasting system, a Radio Frequency (RF) signal is broadcast from a satellite and received through an antenna. At the receiving end of the broadcast system, Low Noise Block (LNB) converters (which may also be referred to as LNB down converters or tuner converters) are used to perform low noise amplification and frequency conversion, where RF signals transmitted from the satellite (e.g., 10.7GHz to 12.75GHz) are amplified and converted to Intermediate Frequency (IF) signals (e.g., 1 GHz). The IF signal is then supplied to a set-top-box (STB), also known as a tuner, and ultimately to a television or any monitor (image display electronics) to display the information embedded in the RF signal.

The LNB converter is installed at the reflection focal point (reflection focal point) of the satellite receiving antenna. The LNB converter must generally be small in size, however, processing RF signals transmitted from the satellite requires many discrete components. In order to demodulate a signal, an image spectrum of an RF signal is suppressed (image suppression, also called image suppression). Many implementations of image rejection are accomplished by filters implemented at the Printed Circuit Board (PCB) level while maintaining good Noise Figure (NF). For example, a low-noise amplifier (LNA) is often used between a probe (probe) receiving an RF signal and a frequency-converting polarization component. To achieve a good signal-to-noise ratio (LNA), a discrete LNA is often used. However, the PCB assembly is large and increases the complexity of the LNB converter.

Nothing herein is to be construed as an admission that the prior art is not entitled to antedate such knowledge as any part of this invention. Further, citation or identification of any document in this application is not intended as an admission that such document is available as prior art to the present invention or forms part of the common general knowledge in the art with any reference thereto.

Disclosure of Invention

The present disclosure relates to a low noise block converter integrated on an integrated circuit that minimizes the use of discrete electronic components at the Printed Circuit Board (PCB) level, and at the same time, the low noise block maintains a good noise figure with on-chip polarization.

In some exemplary embodiments, a Low Noise Block (LNB) converter is integrated in an integrated chip. The low noise block converter includes a Low Noise Amplifier (LNA) Integrated Circuit (IC) including a first low noise amplification circuit, a second low noise amplification circuit, a radio frequency path selector, and a signal down converter. The low noise block integrated circuit includes a first pin and a second pin coupled directly or indirectly to an antenna to receive a first polarization and a second polarization of the radio frequency signal, respectively. The first low noise amplification circuit is coupled to the first pin to receive the first polarization signal and is configured to locally remove an image signal from the first polarization signal and generate a first amplified and filtered polarization signal. The second low noise amplification circuit is coupled to the second pin to receive the second polarization signal from the antenna and is configured to locally remove the image signal from the second polarization signal and generate a second amplified and filtered polarization signal. The radio frequency path selector is coupled to the first amplification circuit and the second amplification circuit to direct paths of the first amplified and filtered polarization signal and the second amplified and filtered polarization signal. In addition, the signal down-converter is coupled between the radio frequency path selector and a first output pin to locally remove a remaining image signal of the radio frequency signal after the first and second amplification circuits.

In some exemplary embodiments, a satellite receiving system includes: an antenna, a set-top box, and a low noise block converter coupled between the antenna and the set-top box. The low noise block converter comprises a low noise block integrated circuit capable of effecting image rejection by the amplification circuit and a signal down converter integrated on the amplification circuit.

In order that the above features and advantages of the present disclosure may be more readily understood, several embodiments are described in detail below with reference to the accompanying drawings.

It is to be understood, however, that this summary may not contain all aspects and embodiments of the disclosure and is not intended to be limiting or restrictive in any way, and that the invention disclosed herein encompasses modifications and enhancements of the disclosure as would be understood and appreciated by those of ordinary skill in the art.

Drawings

The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

Fig. 1 shows a block diagram of an LNB converter according to a certain exemplary embodiment of the present disclosure.

Fig. 2 is a diagram illustrating a received RF signal according to a certain exemplary embodiment of the present disclosure.

Fig. 3 is a block diagram of an LNA circuit according to some example embodiments of the present disclosure.

Fig. 4 is a block diagram of an LNA circuit according to some example embodiments of the present disclosure.

Fig. 5 is a diagram illustrating a signal down-converter according to some exemplary embodiments of the present disclosure.

Fig. 6 is a block diagram illustrating an LNB converter in accordance with some exemplary embodiments of the present disclosure.

Fig. 7 is a block diagram illustrating a dual LNB converter in accordance with some exemplary embodiments of the present disclosure.

Fig. 8 is a block diagram illustrating an LNB converter in accordance with some exemplary embodiments of the present disclosure.

Fig. 9 is a block diagram illustrating a satellite receiving system according to some demonstrative embodiments of the disclosure.

Detailed Description

Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

The present disclosure reduces the number of discrete components by integrating the necessary components onto one integrated circuit (chip). In particular, the present disclosure effectuates image rejection, i.e., two-stage image rejection, on a received RF signal by a combination of on-chip LNA circuitry and a signal down-converter. The image spectrum of the RF signal is first filtered by an image rejection filter built in the on-chip LNA circuit to remove a part of the image spectrum (image signal). In the second stage of image rejection, the image spectrum of the RF signal is further attenuated by a signal down-converter.

In communication systems, signals or information are transmitted via radio waves, also known as Radio Frequency (RF) signals, wherein the information is embedded in different polarizations of the radio waves. Generally, information is conveyed by both horizontal and vertical polarizations of the RF signal. The satellite antenna reflects the received RF signal to a focal point, where a feed horn (feed horn) with two detection devices is arranged. The detection device is arranged to receive a horizontally polarized RF signal and a vertically polarized RF signal, respectively. The horizontally polarized RF signals and the vertically polarized RF signals are transmitted to the LNB converter for signal amplification, image spectrum filtering, frequency conversion, and the like. The polarized RF signal is fed into a Low Noise Amplifier (LNA) for signal amplification. After signal amplification, the image spectrum of the amplified RF signal is filtered using a band pass filter (band pass filter). The amplified and filtered signal is then passed to a signal converter to effect frequency conversion, down converting the RF signal to an acceptable frequency range of a Set Top Box (STB) or tuner. In a conventional LNB converter, the LNA, the band pass filter and the signal converter are discrete components.

The present disclosure integrates discrete components of a Low Noise Block (LNB) converter onto one chip, which greatly reduces the area occupied by the discrete components and at the same time improves the noise figure of the LNB converter. In some exemplary embodiments, the integration of discrete components of the LNB converter refers to the ability to design or configure one integrated circuit (chip) to implement the LNB converter with discrete components. Currently, signal amplification or processing that was carried out by external discrete components is achieved by new chips designed to meet LNB NF requirements without LNB discrete polarization components. Space is important for chip design compared to PCBs. In other words, discrete components may occupy area on the PCB, however the design of the chip may not have such space. Thus, the design of the chip will be different in structure but achieve the same function and requirements as compared to the discrete components disposed on the PCB. By integrating discrete components onto one chip, the pin-out requirements of the chip are reduced due to the reduction of external transistors or components. In addition, the area occupied by the discrete components is also reduced.

Fig. 1 shows a block diagram of an LNB converter 10 according to a certain exemplary embodiment of the present disclosure. Referring to fig. 1, the LNB converter 10 includes an LNB Integrated Circuit (IC) 100. LNB IC 100 includes a first LNA circuit 110, a second LNA circuit 130, an RF path selector 150, and a signal downconverter 170. The present disclosure may also refer to the first LNA circuit 110 and the second LNA circuit 130 as a first on-chip LNA circuit 110 and a second on-chip LNA circuit 130. The first LNA circuit 110 is coupled between the first pin 101 (input) of the LNB IC 100 and the RF path selector 150 to receive a first polarization of the RF signal. The second LNA circuit 130 is coupled between the second pin 102 (input) of the LNB IC 100 and the RF path selector 150 to receive a second polarization of the RF signal. Signal downconverter 170 is coupled between RF path selector 150 and output pin 103 of LNB IC 100.

In an exemplary embodiment, the RF signal is received via antenna 11, wherein a first polarization and a second polarization (e.g., a horizontal polarization and a vertical polarization) of the RF signal are transmitted to first pin 101 and second pin 102 of LNB IC 100, respectively. The first and second polarizations of the RF signal may also be referred to as first and second polarization signals. In an exemplary embodiment, the first and second polarizations of the RF signal may be directly or indirectly coupled to the first and second pins 101 and 102. The first polarization of the RF signal is transmitted to the first LNA circuit 110 through the first pin 101 for signal amplification. The second polarization of the RF signal is transmitted through the second pin 102 to the second LNA circuit 130 for signal amplification. In addition to signal amplification, the first LNA circuit 110 and the second LNA circuit 130 are configured to have an image rejection function to remove local image spectrum of the RF signal (in the first polarization and the second polarization). The image rejection of the first LNA circuit 110 and the second LNA circuit 130 will be described in detail later.

The amplified and filtered RF signal in differential form is then passed to an RF path selector 150, the RF path selector 150 being capable of selecting either a first polarization or a second polarization of the RF signal. In an exemplary embodiment, the RF path selector may be a multiplexer or a combiner having a similar function to a Wilkinson combiner. However, the illustrative embodiments are not intended to limit implementations of the RF path selector 150, but may utilize any circuitry capable of enabling selection of signal paths.

Next, the selected RF signal is passed from the RF path selector 150 to the signal down-converter 170. Signal downconverter 170 is configured to downconvert the received RF signal to an Intermediate Frequency (IF) signal and may further attenuate or throttle the image spectrum of the RF signal.

Hereinafter, the operation of the LNB converter processing the received RF signal will be explained in detail.

In the received RF signal, image spectral phenomena may be seen, and thus image suppression is required to filter out unwanted portions of the RF signal and obtain desired portions of the RF signal. Fig. 2 is a diagram illustrating a received RF signal according to a certain exemplary embodiment of the present disclosure. Referring to fig. 2, a desired signal 301 and an undesired signal 302 are centered around a local frequency 303 of a local oscillator. There are various ways to suppress the image spectrum (image suppression). One way is that: image rejection can be accomplished using a complex mixer (complex mixer). Another way to implement image suppression is: the unwanted frequencies are filtered using a band pass filter or image filter prior to down conversion. In an exemplary embodiment, image rejection is achieved using both methods, where a complex mixer and filter (which is an image rejection filter) is implemented on the LNBIC to reject unwanted image spectra of the received RF signal.

In an exemplary embodiment, image suppression is carried out in two stages. In the LNA stage (where the received RF signal is amplified), the local image spectrum can be suppressed. Second, at the signal down-converter 170, the residual image spectrum may be further attenuated. In one of the exemplary embodiments, image rejection is obtained by a combination of a tunable bandpass RF amplifier transfer function and a Hartley (Hartley) image rejection down-converter. The image suppression of the exemplary embodiment will be explained in detail below.

Fig. 3 is a block diagram of LNA circuits 110, 130, according to some example embodiments of the present disclosure. In an exemplary embodiment, the LNA circuit 110, the LNA circuit 130 are configured to perform signal amplification and image rejection, respectively. Referring to fig. 3, the LNA 110 includes an LNA 111 and an image rejection filter 113. LNA 111 is coupled to first pin 101 to amplify a first polarization of the RF signal. Next, the first polarization of the RF signal is filtered using a filter 113 to remove a part of the image spectrum (local image rejection). In an exemplary embodiment, the LNA 111 is based on a cascade common source (LNA) LNA having inductive degeneration, and the image rejection filter 113 may be a tunable bandpass filter.

In an exemplary embodiment, the LNA 111 may include various combinations of transistors, capacitors, resistors, inductors, and the like arranged to amplify and filter the received RF signal while maintaining a good noise figure. Since the discrete off-chip LNA is eliminated and the RF signal is fed directly to the on-chip LNA circuitry 110(130), the transistors and inductors used to implement the on-chip LNA circuitry 110(130) are designed to have a high quality factor (quality factor).

In an exemplary embodiment, the inductor of the LNA circuit 110(130) may be a silicon inductor. In some exemplary embodiments, the LNA circuitry 110(130) may be implemented using wire bonding inductors, which have a better quality factor than silicon inductors. LNA circuit 130 for receiving another polarization of the RF wave will have a similar structure to amplify the second polarization of the RF signal and, therefore, a detailed description thereof will not be repeated here.

Fig. 4 is a block diagram of an LNA circuit according to some example embodiments of the present disclosure. In an exemplary embodiment, the LNA circuit 410 is a two-stage LNA that includes an input stage LNA 411 and an output stage LNA 412, and an image rejection filter 413 coupled between the input stage LNA 411 and the output stage LNA 412.

As described above, image rejection of LNB IC 100 is further achieved using signal downconverter 170, where the image spectrum is further attenuated in addition to frequency conversion. Fig. 5 is a diagram illustrating a signal down-converter 570 according to some example embodiments of the present disclosure. In the exemplary embodiment, signal downconverter 570 includes a complex mixer 571, a local oscillator 572, a local oscillator polyphase converter 573, a first IF amplifier 574 and IF polyphase filter 575, and a second IF amplifier 576. The RF differential signal selected by the RF path selector 150 is input to a complex mixer 571, where the complex mixer 571 (also called an image rejection mixer) mixes the RF differential signal with a local frequency provided by a local oscillator 572. The local polyphase unit 573 converts the local frequency into a complex signal, wherein the local frequency is converted into four different phases, namely 0 degrees, 180 degrees, 90 degrees and 270 degrees. Then, the local frequency is mixed with the RF differential signal received from the RF path selector 150, thereby converting the RF differential signal into an IF differential signal.

Next, the IF differential signal is input to a first IF amplifier 574 for signal amplification, and then to an IF polyphase filter 575 to generate an IF signal. The output of the IF polyphase filter 575 is coupled to a second IF amplifier 576. In an exemplary embodiment, the signal down-converter locally removes the image spectrum of the RF signal using the complex mixer 571 and the IF polyphase filter 575, wherein the image spectrum of the received RF signal is attenuated (muted). In other words, the IF polyphase filter 575 further removes the remaining image signal from the image rejection filter 413. The second IF amplifier 576 amplifies the IF signal with the image spectrum suppressed by the LNA circuit and the signal down converter.

In some exemplary embodiments of the present disclosure, signal downconverter 570 may further include a frequency finder 577. A frequency detector 577 is coupled to the local oscillator 572 to monitor the received first and second polarization signals to detect the presence of a signal at a particular frequency (e.g., 22 kHz). When a particular frequency is detected, a control signal is communicated to local oscillator 572 to select (or change) a local oscillation frequency for mixing the first amplified and filtered polarization signal or the second amplified and filtered polarization signal based on the detection of the presence of a signal at the particular frequency (e.g., 22 kHz).

Based on the above circuit configuration, image rejection is achieved by the combination of the on-chip LNA circuit 110, the on-chip LNA circuit 130, and the signal down-converter 170. Specifically, the image spectrum of the RF signal is first filtered by an image rejection filter built into the on-chip LNA circuit. In the second stage of image rejection, the image spectrum of the RF signal is further attenuated by a signal downconverter with a complex mixer and polyphase filter.

In the design of integrated circuits, electrostatic discharge (ESD) protection circuits are provided or connected directly to input pins to protect the integrated circuit from any electrostatic discharge. The ESD inductor may be coupled to an input pin (e.g., a first pin 101 and a second pin 102 in series and between the input pin and the ESD protection circuit). In some exemplary embodiments, the ESD inductors are wire bond inductors to further enhance the filtering capabilities of the LNA circuit 110, the LNA circuit 130.

Referring back to FIG. 1, the LNB IC 100 also includes a third pin 105 coupled to the power supply 12 to receive a voltage from the power supply 12 to power the LNB IC 100. The LNB IC 100 also includes a fourth pin 106 and a fifth pin 107 to receive a clock signal from the clock 13, which clock 13 may be a crystal.

Fig. 6 is a block diagram illustrating an LNB converter 60 according to some exemplary embodiments of the present disclosure. Referring to fig. 6, a first off-chip amplifier 64 and a second off-chip amplifier 65 may be added between the antenna 11 and each of the first pin 101 and the second pin 102 of the LNB IC 600, respectively. LNB IC 600 includes first and second LNA circuits 110 and 130, RF path selector 150, and signal downconverter 170. LNB IC 600 of the exemplary embodiment also includes control circuitry 690 and a sixth pin 604 coupled to control circuitry 690. The control circuit 690 is coupled to the first and second off- chip amplifiers 64, 65 through the sixth pin 604 and is configured to control the first and second off- chip amplifiers 64, 65. The first and second off- chip amplifiers 64, 65 add sufficient gain before the LNB IC 600 to increase the LNB noise figure requirement. For example, without an off-chip amplifier, the noise figure may be less than 2 dB. Whereas with the use of off- chip amplifiers 64, 65 adding more gain before the LNB IC 600, the noise figure can be greatly improved to 0.6dB or less than 0.6 dB.

In an exemplary embodiment, the control circuit 690 may be a processor having logic circuitry configured to perform a desired function for controlling an off-chip amplifier. However, the present disclosure is not intended to limit embodiments of the control circuit.

Despite the addition of two off-chip amplifiers to the LNB converter 60, the number of discrete components is still reduced compared to a conventional LNB converter. Since the LNA circuit is integrated onto one integrated circuit (or chip), an improvement in the noise figure can be achieved by adding one off-chip amplifier on each path of the RF signal. In other words, the LNB converter 60 would require only 2 off-chip amplifiers, whereas a conventional LNB converter would require at least 3 external amplifiers in total.

Fig. 7 is a block diagram illustrating a dual LNB downconverter 70 in accordance with some exemplary embodiments of the present disclosure. The dual LNB downconverter 70 greatly reduces the number of discrete components compared to a conventional dual LNB downconverter. Traditionally, each of the polarized signals would require a two-stage off-chip RF amplifier and bandpass filter. Furthermore, since each RF amplifier will require a control pin out coupled to the control circuit, the pin out requirements will increase. In the exemplary embodiment, dual LNB downconverter 70 includes an LNB IC700 that is coupled directly or indirectly to detection devices 11-1, 11-2 of antenna 11 to receive the first polarization signal and the second polarization signal. In the exemplary embodiment, LNB IC700 includes a first LNA circuit 110, a second LNA circuit 130, an RF path selector 750, a first signal down-converter 170-1, and a second signal down-converter 170-2.

Similar to the exemplary embodiment shown in fig. 1, the number of discrete components is reduced by implementing the on-chip LNA circuit 110, the on-chip LNA circuit 130. Image rejection of RF signals is achieved by a combination of on-chip LNA circuitry and a complex mixer in a signal down-converter. Referring to fig. 7, the first and second polarization signals are coupled to the first and second LNA circuits 110 and 130 through the first and second pins 101 and 102 of the LNB IC 700. The first on-chip LNA circuit 110 amplifies the first polarization signal and partially removes the image spectrum from the first polarization signal. The second on-chip LNA circuit 130 amplifies the second polarization signal and locally removes the image spectrum from the second polarization signal. The implementation of the first on-chip LNA circuit 110 and the second on-chip LNA circuit 130 is similar to the embodiment shown in FIG. 1, and therefore, a detailed description will not be repeated here. The outputs of the first on-chip LNA circuit 110 and the second on-chip LNA circuit 130 are then passed to the RF path selector 750 for signal selection and routing. RF path selector 750 may be a 2-in and 2-out multiplexer or an RF cross-multiplexer (cross-mux), where each of the first and second polarization signals may be selected as the output of first output pin 703 and second output pin 708.

First and second signal downconverters 170-1 and 170-2 are coupled to first and second output pins 703 and 708, respectively, of LNB IC700 to output IF signals. The implementation of each of the first and second signal downconverters 170-1 and 170-2 is similar to the exemplary embodiment shown in fig. 1 and 5, and therefore, the details thereof will not be repeated here.

Fig. 8 is a block diagram illustrating an LNB converter in accordance with some exemplary embodiments of the present disclosure. In contrast to fig. 7, LNB converter 80 shown in fig. 8 includes N signal paths, where N is an integer greater than 2. The RF signals may be received by the antennas 11(11-1, 11-2) and coupled directly or indirectly to the LNB IC 800. The LNA circuit 110, the LNA circuit 130 receive RF signals from the antennas 11(11-1, 11-2) through the input pins (101, 102), and pass the received RF signals to the RF path selector 850 after signal amplification, image rejection, and the like. In an exemplary embodiment, the RF path selector 850 may be a 2-to-N multiplexer (2-to-N multiplexer) to feed the received RF signal to N signal downconverters 170-1 to 170-N coupled between the RF path selector 850 and the output pins (803, 808-1 to 808-N).

Fig. 9 is a block diagram illustrating a satellite receiving system according to some demonstrative embodiments of the disclosure. The satellite receiving system includes an antenna 11, a Set Top Box (STB)20, and an LNB converter 10 connected between the antenna 11 and the set top box 20. The antenna 11 receives a radio wave signal (RF signal) from the satellite 2. The antenna comprises detection means for receiving the horizontally polarized signal and the vertically polarized signal of the RF signal, respectively. The horizontally polarized signal and the vertically polarized signal are input to the LNB converter 10, respectively, for signal processing (e.g., signal amplification, filtering, conversion, etc.). After processing, the LNB converter 10 outputs the IF signal down-converted from the RF signal to the STB20, where the STB20 processes the IF signal and converts the IF signal to a format for displaying information or data carried by the RF signal on the monitor 30.

In summary, the above exemplary embodiments illustrate that an LNB converter (i.e., LNB IC) integrating an LNA, an RF path selector, and a signal down-converter onto one chip has the capability of suppressing the image spectrum of an RF signal in two stages. Due to the integrated circuit design, the number of discrete polarization components is greatly reduced, and at the same time, image rejection is achieved through the combination of on-chip LNA circuitry and signal downconverters. Specifically, the image spectrum of the RF signal is first filtered by an image rejection filter built into the on-chip LNA circuit to remove a portion of the image spectrum. In the second stage of image rejection, the image spectrum of the RF signal is further attenuated by the signal downconverter.

Although the present invention has been described with reference to the above embodiments, it will be apparent to those of ordinary skill in the art that modifications may be made to the embodiments without departing from the spirit of the invention. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing detailed description.

The exemplary embodiments of the invention described herein comprise various operations. These operations may be performed by hardware polarization components, software, firmware, or a combination thereof. The term "coupled to" as used herein may mean directly coupled or indirectly coupled through one or more intermediate polarization components. Any of the signals provided over the various buses described herein may be time division multiplexed (time multiplexed) with other signals and provided over one or more shared buses. In addition, the interconnections between the various circuit polarization components or blocks may be shown as buses or as single signal lines. Each of the buses may also be one or more single signal lines, and each of these single signal lines may also be buses.

Exemplary embodiments of the present disclosure may include any one or more of the novel features described herein (including in the detailed description) and/or shown in the drawings. As used herein, "at least one," "one or more," and/or "are open-ended expressions that operate as both conjunctions and disjunctive conjunctions. For example, each of the expressions "A, B, and at least one of C", "A, B, or at least one of C", "A, B, and one or more of C", "A, B, or one or more of C", and "A, B, and/or C" means a alone, B alone, C, A in combination with B alone, a in combination with C, B in combination with C, or A, B and C in combination. It should be noted that the terms "a" or "an" entity refer to one or more of such entities. Thus, the terms "a" or "an", "one or more", and "at least one" are used interchangeably herein.

It will be apparent to those skilled in the art that various modifications and variations can be made in the structure of the present invention without departing from the scope and spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they come within the scope of the following claims and their equivalents.

Claims (20)

1. A low noise block integrated circuit in an integrated chip, comprising:

the first pin and the second pin respectively receive a first polarized signal and a second polarized signal;

a first low noise amplification circuit coupled to the first pin to receive the first polarized signal from an antenna, to partially remove an image signal from the first polarized signal, and to generate a first amplified and filtered polarized signal;

a second low noise amplification circuit coupled to the second pin to receive the second polarization signal from the antenna, to locally remove an image signal from the second polarization signal, and to generate a second amplified and filtered polarization signal;

a radio frequency path selector coupled to the first amplification circuit and the second amplification circuit and directing paths of the first amplified and filtered polarization signal and the second amplified and filtered polarization signal; and

a signal down converter coupled between the radio frequency path selector and the first output pin.

2. The low noise block integrated circuit of claim 1, wherein each of the first and second low noise amplification circuits comprises a low noise amplifier and an image rejection filter, wherein the image rejection filter is configured to locally remove the image signal from the received first and second polarization signals.

3. The low noise block integrated circuit of claim 2, wherein the low noise amplifier is a two-stage low noise amplifier comprising an input stage and an output stage, and wherein the image rejection filter is coupled between the input stage and the output stage of the two-stage low noise amplifier.

4. The low noise block integrated circuit of claim 1, wherein each of the first and second low noise amplification circuits comprises an electrostatic discharge circuit and a silicon inductor or a wire bond inductor.

5. The low noise block integrated circuit of claim 1, further comprising:

a third pin connected to an external power supply, an

A fourth pin and a fifth pin coupled to an external clock.

6. The low noise block integrated circuit of claim 1, further comprising:

a sixth pin; and

a control circuit coupled to the third pin that controls a first amplifier coupled between the first polarization signal and the first pin and a second amplifier coupled between the second polarization signal and the second pin.

7. The low noise block integrated circuit of claim 1, wherein the signal downconverter is configured to frequency convert the output of the radio frequency path selector by mixing the first amplified and filtered polarization signal or the second amplified and filtered polarization signal with a local oscillation signal and further remove the image signal from the first polarization signal and the second polarization signal.

8. The low noise block integrated circuit of claim 7, wherein the signal down-converter comprises:

an image rejection mixer that receives the first amplified and filtered polar signal or the second amplified and filtered polar signal from the radio frequency path selector and mixes the first amplified and filtered polar signal or the second amplified and filtered polar signal based on the local oscillation signal generated by a local oscillator to generate a first intermediate frequency signal and a second intermediate frequency signal;

a first intermediate frequency amplifier coupled to the image rejection mixer;

an intermediate frequency filter coupled to the first intermediate frequency amplifier and recombining the first intermediate frequency signal with the second intermediate frequency signal to further remove the image signal from the received first and second polarization signals; and

a second intermediate frequency amplifier coupled to the intermediate frequency filter and amplifying an output of the intermediate frequency filter.

9. The low noise block integrated circuit of claim 8, wherein the signal down-converter comprises:

a frequency detector coupled to the local oscillator, monitoring the received first and second polarized signals to detect the presence of a signal of a particular frequency, and based on the detection of the presence of the signal of the particular frequency, communicating a control signal to the local oscillator to select the local oscillation frequency for mixing the first or second amplified and filtered polarized signals.

10. The low noise block integrated circuit of claim 1, wherein the radio frequency path selector is configured to independently output the first amplified and filtered polar signal or the second amplified and filtered polar signal to the first through nth output pins.

11. The low noise block integrated circuit of claim 10, wherein the signal downconverter comprises a plurality of signal downconverters coupled between the radio frequency path selector and the first through nth output pins.

12. A low noise block converter, comprising:

a circuit board; and

a low noise block integrated circuit disposed on the circuit board and converting the first polarized signal and the second polarized signal into an intermediate frequency signal, wherein the low noise block integrated circuit includes:

a first on-chip low noise amplification circuit coupled to a first pin to receive the first polarized signal from an antenna, to partially remove an image signal from the first polarized signal, and to generate a first amplified and filtered polarized signal;

a second on-chip low noise amplification circuit coupled to a second pin to receive the second polarization signal from the antenna, to locally remove an image signal from the second polarization signal, and to generate a second amplified and filtered polarization signal;

a radio frequency path selector coupled to the first on-chip low noise amplification circuit and the second on-chip low noise amplification circuit and directing paths of the first amplified and filtered polarization signal and the second amplified and filtered polarization signal; and

a signal downconverter coupled between the radio frequency path selector and a first output pin to receive the first amplified and filtered polarization signal or the second amplified and filtered polarization signal and generate the intermediate frequency signal to the first output pin.

13. The low-noise block converter of claim 12, wherein each of the first on-chip low-noise amplification circuit and the second on-chip low-noise amplification circuit comprises a low-noise amplifier and an image rejection filter, wherein the image rejection filter is configured to locally remove the image signal from the received first polarization signal and the second polarization signal.

14. The low noise block converter of claim 12, wherein the signal down converter comprises:

an image rejection mixer that receives the first amplified and filtered polar signal or the second amplified and filtered polar signal from the radio frequency path selector and mixes the first amplified and filtered polar signal or the second amplified and filtered polar signal based on a local oscillation signal generated by a local oscillator to generate a first intermediate frequency signal and a second intermediate frequency signal;

a first intermediate frequency amplifier coupled to the image rejection mixer;

an intermediate frequency filter coupled to the first intermediate frequency amplifier and recombining the first intermediate frequency signal with the second intermediate frequency signal to further remove the image signal from the received first and second polarization signals; and

a second intermediate frequency amplifier coupled to the intermediate frequency filter and amplifying an output of the intermediate frequency filter.

15. The low noise block converter of claim 12, further comprising:

a first off-chip amplifier disposed on the circuit board and coupled between the antenna and the first pin of the low noise block integrated circuit to amplify the first polarized signal; and

a second off-chip amplifier disposed on the circuit board and coupled between the antenna and the second pin of the low noise block integrated circuit to amplify the second polarization signal.

16. The low noise block converter of claim 12, further comprising:

an external power supply disposed on the circuit board and coupled to a third pin of the low noise block converter; and

an external crystal disposed on the circuit board and coupled to the fourth pin and the fifth pin of the low noise block converter.

17. The low noise block converter of claim 15, wherein the low noise block integrated circuit further comprises:

a sixth pin coupled to the first off-chip amplifier and the second off-chip amplifier;

a control circuit coupled to the sixth pin that controls the first off-chip amplifier coupled between the first polarization signal and the first pin and the second off-chip amplifier coupled between the second polarization signal and the second pin.

18. A satellite receiving system comprising:

an antenna;

a set-top box; and

a low noise block converter, integrated on a chip, coupled between the antenna and the set top box, that converts vertically polarized signals and horizontally polarized signals received from the antenna to intermediate frequency signals, wherein the low noise block converter comprises:

a first low noise amplification circuit coupled to a first pin to receive the vertically polarized signal from the antenna, to locally remove an image signal from the vertically polarized signal, and to generate an amplified and filtered vertically polarized signal;

a second low noise amplification circuit coupled to a second pin to receive the horizontally polarized signal from the antenna, to locally remove an image signal from the horizontally polarized signal, and to generate an amplified and filtered horizontally polarized signal;

a radio frequency path selector coupled to the first amplification circuit and the second amplification circuit and directing paths of the amplified and filtered vertically polarized signals and the amplified and filtered horizontally polarized signals; and

a signal down converter coupled between the radio frequency path selector and a first output pin to receive the amplified and filtered vertically polarized signal and the amplified and filtered horizontally polarized signal and to generate the intermediate frequency signal to the set top box.

19. The satellite receiving system of claim 18, wherein each of the first and second low noise amplification circuits comprises a low noise amplifier and an image rejection filter, wherein the image rejection filter is configured to locally remove the image signal from the received vertically polarized signal and the horizontally polarized signal.

20. The satellite receiving system of claim 19, wherein the signal down-converter comprises a complex mixer and filter, and the complex mixer and filter are configured to attenuate the image signal of the radio frequency signal received from the first and second low noise amplification circuits.

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