CN110610679A - Data processing method and device - Google Patents
Data processing method and device Download PDFInfo
- Publication number
- CN110610679A CN110610679A CN201910918519.0A CN201910918519A CN110610679A CN 110610679 A CN110610679 A CN 110610679A CN 201910918519 A CN201910918519 A CN 201910918519A CN 110610679 A CN110610679 A CN 110610679A
- Authority
- CN
- China
- Prior art keywords
- data
- compensation data
- random access
- access memory
- pixel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
- G06F3/147—Digital output to display device ; Cooperation and interconnection of the display device with other functional units using display panels
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
Abstract
The embodiment of the invention provides a data processing method and a data processing device, which are used for acquiring data information of a pixel in a display device, wherein the data information comprises compensation data and a pixel position of the pixel; determining the storage positions of the compensation data of the pixels in a block random access memory according to a preset mapping relation, wherein the block random access memory comprises a plurality of groups of sequentially stored data units, the data units adjacent to the storage positions are taken out and are adjacent in sequence, the data units comprise a plurality of compensation data taken out in the same clock cycle, and the compensation data are sequentially stored in the block random access memory; and storing the compensation data to a storage space corresponding to the storage position. Therefore, the compensation data can be preferentially stored in one block random access memory, the storage capacity of the block random access memory is fully utilized, the using number of the block random access memory is reduced, and the cost of the FPGA is reduced.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a data processing method and apparatus.
Background
The large-sized Organic Light-Emitting semiconductor (OLED for short) needs to be compensated in the display process, and the Driver IC transmits the sensing data back to the Timing Controller (TCON) in the compensation process, so that the TCON obtains the sensing data to compensate the OLED threshold voltage and mobility. In the driving process and the process of calculating the compensated OLED threshold voltage and mobility according to the algorithm, a programmable logic Gate Array (FPGA for short) is adopted for realization.
When the algorithm is implemented, a large number of internal storage resources of the FPGA, that is, a Block Random Access Memory (RAM) are used, and when the existing FPGA stores pixel data, the number of the required Block Random Access memories is large, which results in high cost of the FPGA.
Disclosure of Invention
The invention aims to provide a data processing method and a data processing device, which are used for solving the problem that the use amount of a block random access memory is large and the cost of an FPGA (field programmable gate array) is high when pixel data are stored in the prior art.
In order to achieve the above object, a first aspect of the present invention provides a data processing method applied to a display device including a block random access memory for storing compensation data of pixels, comprising:
acquiring data information of a pixel in a display device, wherein the data information comprises compensation data and a pixel position of the pixel;
determining a storage position of compensation data of the pixel in a block random access memory according to a preset mapping relation, wherein the mapping relation comprises a corresponding relation between the pixel position and the storage position, the block random access memory comprises a plurality of groups of sequentially stored data units, the data units with adjacent storage positions are taken out and are adjacent in sequence, the data units comprise a plurality of compensation data taken out in the same clock cycle, and the plurality of compensation data are sequentially stored in the block random access memory;
and storing the compensation data to a storage space corresponding to the storage position.
Further, the pixel position is a position number of the pixel.
Further, the compensation data are sequentially stored in the block random access memory in order of magnitude of a position number of a pixel corresponding to each compensation data among the plurality of compensation data.
Further, among the plurality of compensation data, the position number of the pixel corresponding to the compensation data stored in the block random access memory that is earlier in time is smaller than the position number of the pixel corresponding to the compensation data stored in the block random access memory that is later in time.
Further, after the storing the compensation data into the storage space corresponding to the storage location, the method further includes:
and in the same clock cycle, fetching the plurality of compensation data from the block random access memory.
Further, the number of the plurality of compensation data is equal to the number of the compensation data input into the source chip of the display device in the same clock cycle.
The second aspect of the present invention also provides a data processing apparatus applied to a display apparatus including a block random access memory for storing compensation data of pixels, comprising:
the device comprises an acquisition module, a display module and a control module, wherein the acquisition module is used for acquiring data information of pixels in a display device, and the data information comprises compensation data and pixel positions of the pixels;
the determining module is configured to determine, according to a preset mapping relationship, a storage location of compensation data of the pixel in a block random access memory, where the mapping relationship includes a correspondence relationship between the pixel location and the storage location, the block random access memory includes multiple sets of data units stored sequentially, data units adjacent to the storage location are fetched sequentially and adjacently, the data units include multiple compensation data fetched in a same clock cycle, and the multiple compensation data are stored sequentially in the block random access memory;
and the storage module is used for storing the compensation data to a storage space corresponding to the storage position.
Further, the data processing apparatus further includes:
and the fetching module is used for fetching the plurality of compensation data from the block random access memory in the same clock cycle.
The third aspect of the embodiments of the present invention further provides a data processing apparatus, including a processor, a memory, and a computer program stored in the memory and being executable on the processor, where the computer program, when executed by the processor, implements the steps of the data processing method according to the first aspect.
The fourth aspect of the embodiments of the present invention also provides a computer-readable storage medium, on which a computer program is stored, where the computer program, when executed by a processor, implements the steps of the data processing method according to the second aspect.
In the embodiment of the invention, data information of a pixel in a display device is acquired, wherein the data information comprises compensation data and a pixel position of the pixel; determining a storage position of compensation data of the pixel in a block random access memory according to a preset mapping relation, wherein the mapping relation comprises a corresponding relation between the pixel position and the storage position, the block random access memory comprises a plurality of groups of sequentially stored data units, the data units with adjacent storage positions are taken out and are adjacent in sequence, the data units comprise a plurality of compensation data taken out in the same clock cycle, and the plurality of compensation data are sequentially stored in the block random access memory; and storing the compensation data to a storage space corresponding to the storage position. Therefore, the compensation data are sequentially stored according to the sequence of the compensation data taken out, the compensation data can be preferentially stored in one block random access memory, the storage capacity of the block random access memory is fully utilized, the using number of the block random access memory is reduced, the cost of the FPGA is reduced, and the OLED driving cost is reduced.
Drawings
FIG. 1 is a current stage large-scale OLED pixel compensation circuit;
FIG. 2 shows a capacitor CsenseA charging process graph;
FIG. 3 is a circuit diagram of the Sense process;
FIG. 4 is a graph of voltage change during the Sense process;
FIG. 5 is a diagram of a compensation data processing module;
FIG. 6 is a schematic diagram of a memory packet for a row of pixels;
FIG. 7 is a schematic diagram of a row of pixels;
fig. 8 is a flowchart illustrating a method for controlling a backlight module according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a data processing method according to the present application;
fig. 10 is a block diagram of a data processing apparatus according to an embodiment of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantages of the present invention more apparent, the following detailed description is given with reference to the accompanying drawings and specific embodiments.
Fig. 1 is a large-sized OLED pixel compensation circuit at the present stage, in which a reference sign a indicates a Data Line (Data Line), a reference sign B indicates a sensing Line (Sense Line), and the basic principle of compensation is as follows:
an initialization stage: the Scan and Sense switches are turned on, and the Data Line gives a known voltage VdataSense Line gives a reset voltage VrefAnd has a value of Vdata＞Vref；
A charging stage: switch Scan and Sense on, due to Vdata＞VrefThe Driving TFT (TFT in the figure) is turned on to generate current to the capacitor C of the Sense Line through the Sense switchsenseCharging when the voltage of the Sense Line (point S) reaches Vdata-VthThe Driving TFT is off and no current is generated;
threshold voltage V of Driving TFTth＝VG-VS；
FIG. 2 shows a capacitor CsenseThe charging process graph, as shown in fig. 2, shows the following method for the Sense mobility at the present stage:
according to known VthGiven a known voltage V to the Data Linedata＝GL+VthThe Driving TFT generates current to the capacitor C of the Sense LinesenseCharging, sampling the voltage V on the Sense LinesThrough VsThe change in mobility can be known.
The principle is as follows:
i＝μ(Vdata-Vth)2＝μ(GL+Vth-Vth)2＝μ(GL)2the current is a constant value;
with the current to CsenseCharging to a voltage V in a fixed times，VsIs proportional to the current i, i is proportional to the mobility μ; i.e. the passing voltage VsInformation on the mobility μ can be known.
Fig. 3 is a circuit diagram of a Sense process, and fig. 4 is a graph of a voltage change in the Sense process. Wherein, Vg＝Vdata+X；
Fig. 5 is a block diagram of compensation data processing, which requires a large number of block RAM memory cells inside the FPGA due to the image processing algorithm and the compensation algorithm used in the compensation process. As shown in fig. 6 and 7, fig. 6 is a schematic diagram of storage grouping of one row of pixels, wherein the compensation data of the 1 st to 192 th pixels are stored in the first block RAM, the compensation data of the 193 th to 384 th pixels are stored in the second block RAM, the compensation data of the 385 th to 576 th pixels are stored in the third block RAM, the compensation data of the 577 th to 768 th pixels are stored in the fourth block RAM, the compensation data of the 769 th to 960 th pixels are stored in the fifth block RAM, and the storage capacity of each RAM is 18 Kb.
Because the data (960) in each row are transmitted sequentially, five Chip On Flex (or Chip On Film, COF for short) chips are sent to a Source Chip (Source IC), each COF is responsible for 192 pixels of data, and the data of the 5 COFs are transmitted simultaneously, which requires 5 block RAMs of 18 Kb.
Referring to fig. 8, fig. 8 is a flowchart of a method for controlling a backlight module according to an embodiment of the present invention, and as shown in fig. 8, a data processing method according to an embodiment of the present invention is applied to a display device, where the display device includes a block random access memory for storing compensation data of pixels, and the method includes:
step 101, data information of a pixel in a display device is acquired, wherein the data information comprises compensation data and a pixel position of the pixel.
The display device comprises a plurality of pixels arranged in a matrix, wherein each pixel corresponds to data information, and the data information comprises compensation data and pixel positions of the pixels. The pixel position is the position of the pixel in the pixel matrix, which may be the position number of the pixel. For example, for each row of pixels, the pixels of the row are numbered sequentially from the first pixel to the last pixel of the row, so that each pixel corresponds to a number, which is the position number of the pixel. Each pixel in a row of pixels has a unique number.
Step 102, determining a storage position of the compensation data of the pixel in a block random access memory according to a preset mapping relationship, wherein the mapping relationship includes a corresponding relationship between the pixel position and the storage position, the block random access memory includes a plurality of groups of data units stored sequentially, the data units adjacent to the storage position are fetched sequentially and adjacently, the data units include a plurality of compensation data fetched in the same clock cycle, and the plurality of compensation data are stored sequentially in the block random access memory.
The mapping relationship is predetermined, and the storage position of the compensation data of the pixel in the block random access memory can be determined according to the mapping relationship. When the compensation data of the pixel stored according to the mapping relation is fetched from the block random access memory, the data units with adjacent storage positions are fetched in adjacent order, and a plurality of compensation data included in the data units can be fetched in the same clock cycle. The plurality of compensation data included in the data unit are sequentially stored in the block random access memory.
The number of the plurality of compensation data is equal to the number of the compensation data input into the source chip of the display device in the same clock period.
And 103, storing the compensation data to a storage space corresponding to the storage position.
After the storage position of the compensation data of the pixel is determined, the compensation data is stored in the storage space corresponding to the storage position.
The data units are sequentially stored in the block random access memory according to an order in which the data units are fetched, and the plurality of compensation data included in the data units are sequentially stored in the block random access memory. The compensation data of the same data unit can be taken out in the same clock cycle. In this way, the compensation data are sequentially stored according to the order of the compensation data taken out, and compared with the way of storing the compensation data taken out in the same clock cycle in different block random access memories (the storage mode can cause that each block random access memory has a lot of unused residual space, and the storage space of the block random access memory is not fully utilized, which causes waste), the compensation data can be preferentially stored in one block random access memory, the storage capacity of the block random access memory is fully utilized, and the use number of the block random access memories can be reduced.
In the data processing method provided by this embodiment, data information of a pixel in a display device is acquired, where the data information includes compensation data and a pixel position of the pixel; determining a storage position of compensation data of the pixel in a block random access memory according to a preset mapping relation, wherein the mapping relation comprises a corresponding relation between the pixel position and the storage position, the block random access memory comprises a plurality of groups of sequentially stored data units, the data units with adjacent storage positions are taken out and are adjacent in sequence, the data units comprise a plurality of compensation data taken out in the same clock cycle, and the plurality of compensation data are sequentially stored in the block random access memory; and storing the compensation data to a storage space corresponding to the storage position. Therefore, the compensation data are sequentially stored according to the sequence of the compensation data taken out, the compensation data can be preferentially stored in one block random access memory, the storage capacity of the block random access memory is fully utilized, the using number of the block random access memory is reduced, the cost of the FPGA is reduced, and the OLED driving cost is reduced.
Further, after the storing the compensation data into the storage space corresponding to the storage location, the method further includes:
and in the same clock cycle, fetching the plurality of compensation data from the block random access memory.
The plurality of compensation data in the block random access memory are fetched in the same clock cycle. Two sets of compensation data of adjacent data cells are sequentially fetched. The compensation data are sequentially stored according to the order of taking out the compensation data, the compensation data can be preferentially stored in one block random access memory, the storage capacity of the block random access memory is fully utilized, and the using number of the block random access memory is reduced.
Further, when a plurality of compensation data in a data unit are stored, the plurality of compensation data are sequentially stored in the block random access memory in order of magnitude of a position number of a pixel corresponding to each compensation data in the plurality of compensation data.
And storing the compensation data of the pixels in a block random access memory according to the descending order or descending order of the position numbers of the pixels corresponding to the compensation data in the plurality of compensation data. For example, if the compensation data included in the data unit has pixel position numbers of 1, 193, 385, 577, and 769, respectively, the compensation data of the pixels corresponding to these position numbers are stored in the block random access memory in the order of 1, 193, 385, 577, and 769, or in the order of 769, 577, 385, 193, and 1.
Furthermore, the compensation data are stored into the block random access memory according to the sequence when being stored. When determining the compensation data of the pixels, the compensation data of the pixels are sequentially stored. That is, among the plurality of compensation data, the position number of the pixel corresponding to the compensation data stored in the block random access memory that is earlier in time is smaller than the position number of the pixel corresponding to the compensation data stored in the block random access memory that is later in time.
That is, the smaller the position number of the pixels among the plurality of compensation data, the later the time for storing the compensation data in the block random access memory.
As shown in table 1, an example of a lookup table using the data processing method of the present application is shown, in which the first column is compensation data of a pixel (where data such as 1, 2, etc. can be regarded as a position number of the pixel), the second column is a storage location when the storage is performed in a prior art manner, and the third column is a storage location when the storage is performed by using the storage method of the present application. The first column of data and the third column of data may form a mapping relationship.
TABLE 1
As can be seen from table 1, in the prior art, D1 has a memory space of address 1, and D2 has a memory space of address 2, and these are sequentially stored in the block RAM. In order to reduce the usage amount of the block RAM, the variable address is written into the variable address of the block RAM, namely, the storage position of the compensation data of the pixel is determined according to the corresponding relation between the first column and the third column in the lookup table. As shown in fig. 9, fig. 9 is a schematic diagram illustrating storage performed by the data processing method of the present application. The numeral in fig. 9 is a position number of a pixel, and indicates a compensation data storage position of the pixel. The compensation data of each 5 memory spaces of the block RAM can be fetched in the same clock unit, and reference numeral 11 in the figure indicates a data unit, which includes 5 compensation data. One RAM (18Kb) in fig. 9 can store the compensation data for one row of pixels (960 pixels).
Further, if one RAM does not store the compensation data of the next row of pixels, the compensation data of the pixels which are not stored can be stored in the second RAM after one RAM is full, in the same way as the first RAM, that is, the data units with adjacent storage positions are taken out in the adjacent order, the data units comprise a plurality of compensation data which are taken out in the same clock cycle, and the compensation data are stored in the block random access memory in sequence.
Referring to fig. 10, fig. 10 is a structural diagram of a data processing apparatus according to an embodiment of the present invention, and as shown in fig. 10, the embodiment provides a data processing apparatus 1000 applied to a display apparatus, where the display apparatus includes a block random access memory for storing compensation data of pixels, and the data processing apparatus includes:
an obtaining module 1001, configured to obtain data information of a pixel in a display device, where the data information includes compensation data and a pixel position of the pixel;
a determining module 1002, configured to determine, according to a preset mapping relationship, a storage location of compensation data of the pixel in a block random access memory, where the mapping relationship includes a corresponding relationship between the pixel location and the storage location, the block random access memory includes multiple sets of data units stored sequentially, data units adjacent to the storage location are fetched sequentially and adjacently, the data units include multiple compensation data fetched in a same clock cycle, and the multiple compensation data are stored sequentially in the block random access memory;
and the storage module 1003 is used for storing the compensation data into a storage space corresponding to the storage position.
Further, the data processing apparatus 1000 further includes:
and the fetching module is used for fetching the plurality of compensation data from the block random access memory in the same clock cycle.
Further, the pixel position is a position number of the pixel.
Further, the compensation data are sequentially stored in the block random access memory in order of magnitude of a position number of a pixel corresponding to each compensation data among the plurality of compensation data.
Further, among the plurality of compensation data, the position number of the pixel corresponding to the compensation data stored in the block random access memory that is earlier in time is smaller than the position number of the pixel corresponding to the compensation data stored in the block random access memory that is later in time.
Further, the number of the plurality of compensation data is equal to the number of the compensation data input into the source chip of the display device in the same clock cycle.
An embodiment of the present invention further provides a data processing apparatus, which includes a processor, a memory, and a computer program stored in the memory and capable of running on the processor, where the computer program, when executed by the processor, implements each process of the data processing method embodiment, and can achieve the same technical effect, and details are not repeated here to avoid repetition.
The embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the computer program implements each process of the data processing method embodiment, and can achieve the same technical effect, and in order to avoid repetition, details are not repeated here. The computer-readable storage medium may be a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (10)
1. A data processing method applied to a display device including a block random access memory for storing compensation data of pixels, comprising:
acquiring data information of a pixel in a display device, wherein the data information comprises compensation data and a pixel position of the pixel;
determining a storage position of compensation data of the pixel in a block random access memory according to a preset mapping relation, wherein the mapping relation comprises a corresponding relation between the pixel position and the storage position, the block random access memory comprises a plurality of groups of sequentially stored data units, the data units with adjacent storage positions are taken out and are adjacent in sequence, the data units comprise a plurality of compensation data taken out in the same clock cycle, and the plurality of compensation data are sequentially stored in the block random access memory;
and storing the compensation data to a storage space corresponding to the storage position.
2. The method of claim 1, wherein the pixel location is a location number of the pixel.
3. The method according to claim 2, wherein the plurality of compensation data are sequentially stored in the block random access memory in order of magnitude of a position number of a pixel corresponding to each compensation data.
4. The method according to claim 2, wherein the position number of the pixel corresponding to the compensation data stored in the block random access memory that is earlier in time is smaller than the position number of the pixel corresponding to the compensation data stored in the block random access memory that is later in time.
5. The method according to claim 1, further comprising, after storing the compensation data in the storage space corresponding to the storage location:
and in the same clock cycle, fetching the plurality of compensation data from the block random access memory.
6. The method of claim 1, wherein the number of the plurality of compensation data is equal to the number of the compensation data inputted to the source chip of the display device in the same clock cycle.
7. A data processing apparatus applied to a display apparatus including a block random access memory for storing compensation data of pixels, comprising:
the device comprises an acquisition module, a display module and a control module, wherein the acquisition module is used for acquiring data information of pixels in a display device, and the data information comprises compensation data and pixel positions of the pixels;
the determining module is configured to determine, according to a preset mapping relationship, a storage location of compensation data of the pixel in a block random access memory, where the mapping relationship includes a correspondence relationship between the pixel location and the storage location, the block random access memory includes multiple sets of data units stored sequentially, data units adjacent to the storage location are fetched sequentially and adjacently, the data units include multiple compensation data fetched in a same clock cycle, and the multiple compensation data are stored sequentially in the block random access memory;
and the storage module is used for storing the compensation data to a storage space corresponding to the storage position.
8. The apparatus of claim 7, further comprising:
and the fetching module is used for fetching the plurality of compensation data from the block random access memory in the same clock cycle.
9. A data processing apparatus comprising a processor, a memory and a computer program stored on the memory and executable on the processor, the computer program, when executed by the processor, implementing the steps of the data processing method as claimed in any one of claims 1 to 6.
10. A computer-readable storage medium, characterized in that a computer program is stored on the computer-readable storage medium, which computer program, when being executed by a processor, carries out the steps of the data processing method according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910918519.0A CN110610679B (en) | 2019-09-26 | 2019-09-26 | Data processing method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910918519.0A CN110610679B (en) | 2019-09-26 | 2019-09-26 | Data processing method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110610679A true CN110610679A (en) | 2019-12-24 |
| CN110610679B CN110610679B (en) | 2021-04-16 |
Family
ID=68893605
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910918519.0A Active CN110610679B (en) | 2019-09-26 | 2019-09-26 | Data processing method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110610679B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112114754A (en) * | 2020-09-25 | 2020-12-22 | 青岛信芯微电子科技股份有限公司 | System-on-chip SOC for processing backlight data and terminal equipment |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060001747A1 (en) * | 2004-07-01 | 2006-01-05 | Pentax Corporation | Image processing device |
| CN101218604A (en) * | 2005-05-10 | 2008-07-09 | Nxp股份有限公司 | Image processing circuit with block accessible buffer memory |
| CN108073599A (en) * | 2016-11-10 | 2018-05-25 | 高德软件有限公司 | Picture read method and device |
| CN108766350A (en) * | 2018-07-25 | 2018-11-06 | 昆山国显光电有限公司 | Offset data transmission method and display panel |
| CN109933392A (en) * | 2019-01-30 | 2019-06-25 | 北京无线体育俱乐部有限公司 | Information display method, equipment, system and storage medium |
| CN109992234A (en) * | 2017-12-29 | 2019-07-09 | 浙江宇视科技有限公司 | Image data read method, device, electronic equipment and readable storage medium storing program for executing |
| CN110060643A (en) * | 2019-04-06 | 2019-07-26 | 上海安路信息科技有限公司 | Date storage method and data-storage system |
-
2019
- 2019-09-26 CN CN201910918519.0A patent/CN110610679B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20060001747A1 (en) * | 2004-07-01 | 2006-01-05 | Pentax Corporation | Image processing device |
| CN101218604A (en) * | 2005-05-10 | 2008-07-09 | Nxp股份有限公司 | Image processing circuit with block accessible buffer memory |
| CN108073599A (en) * | 2016-11-10 | 2018-05-25 | 高德软件有限公司 | Picture read method and device |
| CN109992234A (en) * | 2017-12-29 | 2019-07-09 | 浙江宇视科技有限公司 | Image data read method, device, electronic equipment and readable storage medium storing program for executing |
| CN108766350A (en) * | 2018-07-25 | 2018-11-06 | 昆山国显光电有限公司 | Offset data transmission method and display panel |
| CN109933392A (en) * | 2019-01-30 | 2019-06-25 | 北京无线体育俱乐部有限公司 | Information display method, equipment, system and storage medium |
| CN110060643A (en) * | 2019-04-06 | 2019-07-26 | 上海安路信息科技有限公司 | Date storage method and data-storage system |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112114754A (en) * | 2020-09-25 | 2020-12-22 | 青岛信芯微电子科技股份有限公司 | System-on-chip SOC for processing backlight data and terminal equipment |
| CN112114754B (en) * | 2020-09-25 | 2023-10-27 | 青岛信芯微电子科技股份有限公司 | System-on-chip (SOC) for processing backlight data and terminal equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110610679B (en) | 2021-04-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8913092B2 (en) | Compensation table generating system, display apparatus having brightness compensation table, and method of generating compensation table | |
| EP3343549A1 (en) | Active-matrix organic light emitting diode display device and luminance compensation method thereof | |
| CN105702212B (en) | Organic light emitting display device and driving method thereof | |
| US9704438B2 (en) | Organic light-emitting diode display including a pixel circuit having a compensation unit | |
| US8976206B2 (en) | Display device and method driving the same | |
| US9779665B2 (en) | Gate driver for display device and display device including the same | |
| KR102084288B1 (en) | Brightness compensation in a display | |
| CN108172177B (en) | Data driver | |
| US10522100B2 (en) | Method of driving a display panel and display apparatus performing the same | |
| US20130106828A1 (en) | Pixel Circuit, Organic Light Emitting Display Device Having the Same, and Method of Driving an Organic Light Emitting Display Device | |
| CN111986618A (en) | Display driving circuit and display device including the same | |
| US9269292B2 (en) | Method of setting target locations for reducing image sticking, organic light emitting display device, and method of driving the same | |
| CN107633796B (en) | Display device and method for refreshing image generated by display device | |
| CN103927970A (en) | Flat panel display device | |
| CN108962114A (en) | Display driver circuit for preemphasis operation | |
| CN107068052B (en) | Organic light emitting diode display device and driving method thereof | |
| US20160019839A1 (en) | Method of operating an organic light-emitting diode (oled) display and oled display | |
| CN109817174B (en) | Apparatus and method for image correction | |
| US20090021519A1 (en) | Data distribution device and data distribution method | |
| CN108766350B (en) | Compensation data transmission method and display panel | |
| CN110610679B (en) | Data processing method and device | |
| US11074873B2 (en) | Display device and display driving method | |
| US10902822B2 (en) | Display device and method of correcting mura in the same | |
| KR20150049323A (en) | Display device and driving method thereof | |
| US9318039B2 (en) | Method of operating an organic light emitting display device, and organic light emitting display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |