CN110599936B - Display panel, display detection method thereof and display device - Google Patents
Display panel, display detection method thereof and display device Download PDFInfo
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- CN110599936B CN110599936B CN201911056873.3A CN201911056873A CN110599936B CN 110599936 B CN110599936 B CN 110599936B CN 201911056873 A CN201911056873 A CN 201911056873A CN 110599936 B CN110599936 B CN 110599936B
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The invention discloses a display panel, a display detection method and a display device thereof, comprising the following steps: a drive circuit including a plurality of kinds of signal lines; a signal connection line connected to the signal line; a test signal input terminal; and a switch unit connected between the driving circuit and the test signal input terminal. The switch unit is arranged between the signal connecting line and the test signal input terminal, the signal generating device is adopted to input corresponding signals to each test signal input terminal in the test stage, the switch unit is controlled to be started, so that the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line, and the display panel is lightened; and in the display stage, the cut-off signal generating device inputs corresponding signals to each test signal input terminal, and the control switch unit is closed so as to cut off the transmission of the signals of each signal connecting line to the corresponding test signal input terminals. Therefore, the corrosion of the electrified test signal input terminal in the display stage is avoided, and further the damage to the signal wire connected with the test signal input terminal is avoided.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel, a display detection method thereof, and a display device.
Background
At present, with the continuous development of Display technology, display panels play more and more important roles in work and life, and Liquid Crystal Display (LCD) panels or Organic Light-Emitting Diode (OLED) panels are often used as the Display panels at present. The display panel that uses at present uses the display chip drive to carry out image display usually, in the manufacturing process, can light the test to display panel earlier, after confirming that display panel can be lighted normally, carries out binding of display chip again, avoids the material waste of display chip from this.
The display panel can form a test pin for inputting a test signal and a binding pin for binding the display chip in the manufacturing process, the signals input by the two pins correspond to each other, and the two pins are communicated with each other. When a lighting test is carried out, connecting the detection equipment to a test pin and inputting a corresponding test signal; and after the test is finished, the display chip is bound, and signals input to each pin by the display chip are correspondingly transmitted to the test pins. If the display panel is in a damp and hot environment, the electrified test pins can generate electrochemical reaction, so that the pins are corroded, and when the corrosion phenomenon is serious, the connected signal wires can be damaged.
Disclosure of Invention
The invention provides a display panel, a display detection method thereof and a display device, which are used for solving the problem that a test signal input terminal is corroded due to electrification in a display stage.
In a first aspect, the present invention provides a display panel comprising:
the driving circuit is used for driving the display panel to emit light; the driving circuit includes a plurality of kinds of signal lines;
a test signal input terminal for inputting a test signal;
a switching unit connected between the driving circuit and the test signal input terminal;
the display panel further includes: a signal connection line connected to the signal line; the switch unit is electrically connected with the signal wire through the signal connecting wire;
wherein the switching unit includes: a control terminal, an input terminal, and an output terminal; controlling the signal transmission of the input end to the output end through the control end; the input end is connected with the test signal input terminal, the output end is connected with the signal connecting wire, and the control end is connected with the test signal input terminal;
the switch unit is used for responding to a signal input from the test signal input terminal to the control terminal in a test stage and transmitting a test signal input from the test signal input terminal to the signal connecting line; and in the display stage, the signal of the signal connecting line is cut off to be transmitted to the test signal input terminal.
In a possible implementation manner, in the display panel provided by the present invention, the signal connection lines correspond to the test signal input terminals one to one; the test signal input terminal includes: a power signal input terminal for inputting a power signal;
the switching unit includes: at least one switching transistor; the first pole of the switch transistor is connected with the test signal input end, the second pole of the switch transistor is connected with the corresponding signal connecting line, and the control pole of the switch transistor is connected with the power supply signal input terminal;
the potential of the test signal input to the test signal input terminal connected to the first electrode of the switching transistor is different from the potential of the power signal input to the power signal input terminal connected to the control electrode of the switching transistor.
In one possible implementation manner, in the display panel provided by the present invention, the power signal input terminal includes: a first power signal input terminal and a second power signal input terminal;
the potential of the signal transmitted by the first power signal input terminal is higher than the potential of the signal transmitted by the second power signal input terminal;
the switching unit includes: a first switching transistor and a second switching transistor;
the first power signal input terminal is connected with a first pole of one first switching transistor, a signal connecting line corresponding to the first power signal input terminal is connected with a second pole of the first switching transistor, and the second power signal input terminal is connected with a control pole of the first switching transistor;
the second power signal input terminal is connected with a first pole of one second switch transistor, a signal connecting line corresponding to the second power signal input terminal is connected with a second pole of the second switch transistor, and the first power signal input terminal is connected with a control pole of the second switch transistor.
In a possible implementation manner, in the display panel provided by the present invention, the test signal input terminal further includes: a reference signal input terminal for inputting a reference signal; the potential of the reference signal input by the reference signal input terminal is lower than the potential of the power supply signal input by the first power supply signal input terminal;
the reference signal input terminal is connected with a first pole of one second switching transistor, a signal connecting line corresponding to the reference signal input terminal is connected with a second pole of the second switching transistor, and the first power supply signal input terminal is connected with a control pole of the second switching transistor.
In one possible implementation manner, in the display panel provided by the present invention, the test signal input terminal further includes: a clock signal input terminal for inputting a clock signal; the clock signal input terminal time-divisionally inputs a first clock signal and a second clock signal, and the potential of the first clock signal is higher than that of the second clock signal;
the clock signal input terminal is connected with a first pole of the first switch transistor and a first pole of the second switch transistor respectively, a signal connecting line corresponding to the clock signal input terminal is connected with a second pole of the first switch transistor and a second pole of the second switch transistor respectively, the first power supply signal input terminal is connected with a control pole of the second switch transistor, and the second power supply signal input terminal is connected with a control pole of the first switch transistor.
In one possible implementation manner, in the display panel provided by the present invention, the test signal input terminal further includes: a data signal input terminal for inputting a data signal;
the data signal input terminal is connected with a first pole of the first switch transistor and a first pole of the second switch transistor respectively, a signal connecting line corresponding to the data signal input terminal is connected with a second pole of the first switch transistor and a second pole of the second switch transistor respectively, the first power supply signal input terminal is connected with a control pole of the second switch transistor, and the second power supply signal input terminal is connected with a control pole of the first switch transistor.
In a possible implementation manner, in the display panel provided by the invention, the power signal input by the first power signal input terminal is a positive potential signal, and the power signal input by the second power signal input terminal is a negative potential signal.
In a possible implementation manner, in the display panel provided by the invention, the first switch transistor is a P-type thin film transistor, and the second switch transistor is an N-type thin film transistor.
In a possible implementation manner, in the display panel provided by the present invention, the P-type thin film transistor is a low temperature polysilicon thin film transistor, and the N-type thin film transistor is a metal oxide thin film transistor.
In a second aspect, the present invention provides a display device, including any one of the display panels described above.
In a third aspect, the present invention provides a display detection method for the display panel, including:
in a test stage, a signal generating device is adopted to input corresponding signals to each test signal input terminal, and the switch unit is controlled to be switched on, so that the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line, and the display panel is lightened;
and in the display stage, the signal generation device is cut off to input corresponding signals to each test signal input terminal, the switch unit is controlled to be closed, and the signals of each signal connecting line are cut off to be transmitted to each corresponding test signal input terminal.
The invention has the following beneficial effects:
the invention provides a display panel, a display detection method and a display device thereof, comprising: the driving circuit is used for driving the display panel to emit light; the drive circuit includes a plurality of signal lines; a test signal input terminal for inputting a test signal; a switching unit connected between the driving circuit and the test signal input terminal; the display panel further includes: a signal connection line connected to the signal line; the switch unit is electrically connected with the signal line through a signal connecting line; wherein, the switch unit includes: a control terminal, an input terminal, and an output terminal; the signal of the input end is controlled by the control end to be transmitted to the output end; the input end is connected with the test signal input terminal, the output end is connected with the signal connecting wire, and the control end is connected with the test signal input terminal. The switch unit is arranged between the signal connecting line and the test signal input terminal, and in a test stage, the signal generating device is adopted to input corresponding signals to each test signal input terminal, so that the switch unit is controlled to be opened, the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line, and the display panel is lightened; in the display stage, the cut-off signal generating device inputs corresponding signals to each test signal input terminal, and the control switch unit is closed so as to cut off the transmission of the signals of each signal connecting line to the corresponding test signal input terminals. Therefore, the test signal input terminal is prevented from being corroded in an electrified state in the display stage, and further the signal wire connected with the test signal input terminal is prevented from being damaged.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 3 is another schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 4 is another schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 5 is another schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 6 is another schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 7 is another schematic structural diagram of a switch unit according to an embodiment of the present invention;
fig. 8 is a schematic diagram of a film structure of a thin film transistor according to an embodiment of the present invention;
fig. 9 is a schematic top view illustrating a display device according to an embodiment of the invention;
fig. 10 is a flowchart of a display testing method of a display panel according to an embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, the present invention is further described in conjunction with the accompanying drawings and examples. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their repetitive description will be omitted. The words expressing the position and direction described in the present invention are illustrated in the accompanying drawings, but may be changed as required and still be within the scope of the present invention. The drawings of the present invention are for illustrative purposes only and do not represent true scale.
It should be noted that in the following description, specific details are set forth in order to provide a thorough understanding of the present invention. The invention can be implemented in a number of ways different from those described herein and similar generalizations can be made by those skilled in the art without departing from the spirit of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed below. The description which follows is a preferred embodiment of the present application, but is made for the purpose of illustrating the general principles of the application and not for the purpose of limiting the scope of the application. The scope of the present application is to be considered as defined by the appended claims.
The embodiments of the present invention are provided below with reference to the accompanying drawings. The thicknesses and shapes of the respective components in the drawings do not reflect the true scale of the display device, and are merely intended to schematically illustrate the present invention.
In a first aspect of the embodiments of the present invention, a display panel is provided, and fig. 1 is a schematic structural diagram of the display panel provided in the embodiments of the present invention, as shown in fig. 1, the display panel includes:
the driving circuit DC is used for driving the display panel to emit light; the drive circuit includes a variety of signal lines 11;
a test signal input terminal 12 for inputting a test signal;
a switching unit 13 connected between the driving circuit DC and the test signal input terminal 12;
a signal connection line 14 connected to the signal line 11; the switching unit 13 is electrically connected to the signal line 11 through a signal connection line 14.
Wherein, the switching unit 13 includes: a control terminal c, an input terminal i, and an output terminal o; controlling the signal of the input end i to be transmitted to the output end o through the control end c; the input terminal i is connected to the test signal input terminal 12, the output terminal o is connected to the signal connection line 14, and the control terminal i is connected to the test signal input terminal 12.
The switch unit 13 in the embodiment of the present invention is configured to respond to a signal input from the test signal input terminal 12 to the control terminal c in a test stage, and transmit a test signal input from the test signal input terminal 12 to the signal connection line 14; the signal of the signal connection line 14 is cut off in the display stage and transmitted to the test signal input terminal 12.
In specific implementation, the display panel provided by the embodiment of the present invention may have a display area AA and a non-display area VA, and a gate driving circuit dc1 is disposed in the non-display area VA on one side of the display area AA; pixel units p arranged in an array are arranged in the display area AA, each pixel unit is electrically connected with a corresponding sub-driving circuit DC2, the gate driving circuit DC1 and each sub-driving circuit DC2 form the driving circuit DC, the gate driving circuit DC1 is connected with the sub-driving circuits DC2 of each pixel unit through various signal lines 11 in the row direction, each sub-driving circuit DC2 is also connected with various signal lines 11 in the column direction, and the pixel units can be driven to emit light by inputting corresponding signals to the signal lines 11 in the driving circuits. A plurality of signal connection lines 14 may be disposed in the non-display area VA, and the signal connection lines 14 are reasonably arranged to be led out to one side of the non-display area VA, and a plurality of test signal input terminals 12 and binding terminals 12' are further disposed on the same side of the non-display area VA. The test signal input terminal 12 and the binding terminal 12' to which the same kind of signal is input may correspond to the same signal line. The test signal input terminal 12 is used for connecting an external test device, and inputting a corresponding test signal to the display panel in a test stage to light the display panel. When the lighting test is finished and the test result meets the binding standard, the display chip is bound to the binding terminal 12', and thus, the display chip inputs a display signal to the display panel for image display.
In the display panel provided by the embodiment of the present invention, the switch unit 13 is disposed between the signal connection line 14 and the test signal input terminal 12, and the switch unit 13 can determine the on or off of the switch unit according to the signal input by the control terminal c. The signal input by the control terminal c of the switch unit 13 is controlled by the signal input by the test signal input terminal 12, and the test signal input terminal 12 only has signal input when being connected to an external detection device to perform a lighting test on the display panel, so that the switch unit 13 can be in an on state only in a test stage, and at this time, the test signal can be transmitted from the test signal input terminal 12 to the corresponding signal connection line 14 through the switch unit 13. When the test phase is finished, no signal is input to the test signal input terminal 12, and the control terminal of the switch unit 13 is in a suspended state at this time, so that the switch unit 13 is in a closed state, even if a signal transmitted on the signal connection line 14 is provided, the signal cannot be transmitted to the test signal input terminal 12 through the switch unit 13, and thus it can be ensured that the test signal input terminal 12 is uncharged, an electrochemical reaction cannot occur, and the occurrence of the situation that the test signal input terminal 12 is corroded due to electrification is avoided.
To specifically explain the structure of the switch unit 13, the switch unit 13 is partially enlarged, the components in the display area AA of the display panel are simplified, and the number of the connection signal lines 14 and the test signal input terminals 12 is simplified.
Fig. 2 is a schematic structural diagram of a switch unit 13 according to an embodiment of the present invention, and as shown in fig. 2, in the display panel according to the embodiment of the present invention, signal connection lines 14 correspond to test signal input terminals 12 one to one; the test signal input terminal 12 includes: and a power signal input terminal 121 for inputting a power signal.
The switching unit 13 includes: at least one switching transistor 131; a first pole of the switching transistor 131 is connected to the test signal input terminal 12, a second pole is connected to the corresponding signal connection line 14, and a control pole is connected to the power signal input terminal 12; here, the potential of the test signal input from the test signal input terminal 12 connected to the first electrode of the switching transistor 131 is different from the potential of the power signal input from the power signal input terminal 121 connected to the control electrode of the switching transistor 131.
The switching transistor may also be applied to a driving circuit of the display panel, and thus the switching transistor 131 in the switching unit 13 may be fabricated together with the switching transistor in the driving circuit in the embodiment of the present invention. The switching transistor 131 has characteristics of high-speed response, a large withstand voltage range, and the like. In an embodiment of the present invention, the switching transistor 131 may be connected between the test signal input terminal 12 and the corresponding signal connection line 14. The first and second poles of the switching transistor are connected to the test signal input terminal 12 and the signal connection line 14, respectively, and the control pole of the switching transistor is connected to the power supply signal input terminal 121. During the test phase, the external test device inputs a corresponding power signal to the power signal input terminal 121, and at this time, the control electrode of the switching transistor is also input with the power signal, so that the switching transistor can be controlled to be turned on, so that the signal input from the test signal input terminal 12 connected to the first electrode can be transmitted to the corresponding signal connection line 14. The signal input by the control electrode of the switching transistor 131 can be turned on only when the voltage difference generated between the signal input by the first electrode and the signal input by the first electrode is greater than the threshold voltage, so that the potential of the test signal input by the test signal input terminal 12 connected to the first electrode of the switching transistor is not equal to the potential of the power signal input by the power signal input terminal 121 connected to the control electrode of the switching transistor. After the test is finished, the test signal input terminal 12 does not have the input of the test signal any more, at this time, the control electrode of the switch transistor 131 is in a suspended state, the switch transistor is turned off, and the signal on the signal connection line 14 cannot be transmitted to the corresponding test signal input terminal 12 through the switch transistor 131, so that the test signal input terminal is prevented from being electrified, and the phenomenon that the test signal input terminal is corroded when being electrified is also avoided.
In a specific application, the appropriate switching transistor 131 may be selected to be connected according to the test signal input from the test signal input terminal 12.
Fig. 3 is another schematic structural diagram of the switch unit according to the embodiment of the present invention, and as shown in fig. 3, in an implementable manner, the power signal input terminal 121 may include: a first power signal input terminal 121H and a second power signal input terminal 121L; the potential of the signal transmitted by the first power signal input terminal 121H is higher than the potential of the signal transmitted by the second power signal input terminal 121L. The power supply signals input by the first power supply signal input terminal 121H and the second power supply signal input terminal 121L may be fixed potential signals in the display panel. For example, when the display panel is an OLED display panel, the power signal input by the first power signal input terminal 121H may be a VGH signal, and the power signal input by the second power signal input terminal 121L may be a VGL signal. In addition, the power signal input terminal may also be used to transmit other power signals, and when the display panel is a liquid crystal display panel or other types of display panels, the power signal input terminal may also be used to transmit power signals required by the corresponding panel, which is not limited herein.
The switching unit 13 includes: a first switching transistor 131p and a second switching transistor 131n; the first power signal input terminal 121H is connected to a first pole of a first switching transistor 131p, a signal connection line corresponding to the first power signal input terminal 121H is connected to a second pole of the first switching transistor 131p, and the second power signal input terminal 121L is connected to a control pole of the first switching transistor 131 p; the second power signal input terminal 121L is connected to a first pole of a second switching transistor 131n, a signal connection line corresponding to the second power signal input terminal 121L is connected to a second pole of the second switching transistor 131n, and the first power signal input terminal 121H is connected to a control pole of the second switching transistor 131 n.
In an embodiment of the present invention, the first switching transistor 131p may be a switching transistor that is turned on at a low potential and turned off at a high potential, and the second switching transistor 131n may be a switching transistor that is turned on at a high potential and turned off at a low potential. When the first switching transistor 131p is in an on state, the control electrode inputs a low-potential signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the signal input by the first electrode is a high-potential signal, and the on requirement is more easily met; similarly, when the second switching transistor 131n is in the on state, the control electrode inputs a high-potential signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the signal input by the first electrode is a low-potential signal, so that the on requirement is more easily met; therefore, in the embodiment of the present invention, the first power signal input terminal 121H for transmitting a high-level signal is connected to the first electrode of the first switching transistor 131p, and the second power signal input terminal 121L for transmitting a low-level signal is connected to the control electrode of the first switching transistor 131p, so that when the first power signal input terminal 121H and the second power signal input terminal 121L simultaneously input corresponding power signals in the test stage, the first switching transistor 131p can be controlled to be turned on, so that the power signal input from the first power signal input terminal 121H is transmitted to the corresponding signal connection line. The second power signal input terminal 121L for transmitting a low potential signal is connected to the first electrode of the second switching transistor 131n, and the first power signal input terminal 121H for transmitting a high potential signal is connected to the control electrode of the second switching transistor 131n, so that the second switching transistor 131n can be controlled to be turned on when the first power signal input terminal 121H and the second power signal input terminal 121L simultaneously input corresponding power signals in the test stage, so that the power signal input from the second power signal input terminal 121L is transmitted to the corresponding signal connection line. After the test is finished, the first power signal input terminal 121H and the second power signal input terminal 121L do not have power signal input any more, the control electrodes of the first switching transistor 131p and the second switching transistor 131n are both in a floating state, the first switching transistor 131p and the second switching transistor 131n are both turned off, and at this time, the signal transmitted by the signal connection line cannot be transmitted to the first power signal input terminal 121H and the second power signal input terminal 121L through the first switching transistor 131p and the second switching transistor 131n, so that the first power signal input terminal 121H and the second power signal input terminal 121L are prevented from being corroded due to electrification.
Fig. 4 is another schematic structural diagram of the switch unit according to the embodiment of the present invention, and as shown in fig. 4, in an implementable manner, the test signal input terminal 12 further includes: a reference signal input terminal 122 for inputting a reference signal; the potential of the reference signal input at the reference signal input terminal 122 is lower than the potential of the power supply signal input at the first power supply signal input terminal 121H.
The reference signal input terminal 122 is connected to a first pole of a second switching transistor 131n, a signal connection line corresponding to the reference signal input terminal 122 is connected to a second pole of the second switching transistor 131n, and the first power signal input terminal 121H is connected to a control pole of the second switching transistor 131 n.
The potential of the reference signal transmitted by the reference signal input terminal 122 is lower than the power signal input by the first power signal input terminal 121H, and the control electrode inputs a high potential signal when the second switch transistor 131n is in the on state, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the on requirement is more easily met when the signal input by the first electrode is a low potential signal, and therefore, the second switch transistor 131n can be adopted as the switch control element for the reference signal input terminal 122 to which a low potential is input. The reference signal input terminal 122 for transmitting a low-level signal is connected to the first electrode of the second switching transistor 131n, and the first power signal input terminal 121H for transmitting a high-level signal is connected to the control electrode of the second switching transistor 131n, so that the second switching transistor 131n is controlled to be turned on when the power signal is input from the first power signal input terminal 121H and the reference signal is input from the reference signal input terminal 122 during the test period, so that the reference signal input from the reference signal input terminal 122 is transmitted to the corresponding signal connection line. After the test is finished, the first power signal input terminal 121H and the reference signal input terminal 122 no longer have signal input, the control electrode of the second switching transistor 131n is in a floating state, the second switching transistor 131n is turned off, and at this time, the signal transmitted by the signal connection line cannot be transmitted to the reference signal input terminal 122 through the second switching transistor 131n, so that the reference signal input terminal 122 is prevented from being corroded due to electrification.
Fig. 5 is another schematic structural diagram of the switch unit according to the embodiment of the present invention, and as shown in fig. 5, in an implementable manner, the test signal input terminal 12 further includes: a clock signal input terminal 123 for inputting a clock signal; the clock signal input terminal 123 time-divisionally inputs a first clock signal and a second clock signal, and the potential of the first clock signal is higher than that of the second clock signal.
The clock signal input terminal 123 is connected to a first pole of a first switching transistor 131p and a first pole of a second switching transistor 131n, respectively, a signal connection line corresponding to the clock signal input terminal 123 is connected to a second pole of the first switching transistor 131p and a second pole of the second switching transistor 131n, respectively, the first power signal input terminal 121H is connected to a control pole of the second switching transistor 131n, and the second power signal input terminal 131n is connected to a control pole of the first switching transistor 131p.
The clock signal input terminal 123 time-divisionally inputs a first clock signal and a second clock signal, where the first clock signal may be a high-level signal and the second clock signal may be a low-level signal. When the first switching transistor 131p is in an on state, the control electrode inputs a low-potential signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the signal input by the first electrode is a high-potential signal, and the on requirement is more easily met; similarly, when the second switching transistor 131n is in the on state, the control electrode inputs a high-voltage signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the on requirement is more easily met when the signal input by the first electrode is a low-voltage signal. As for the clock signal input terminal 123 in which the input signal is switched between the high and low potential signals, an element in which one first switching transistor 131p and one second switching transistor 131n are connected in parallel may be used as the switching control element of the clock signal input terminal 123.
For the clock signal input terminal 123 when the first clock signal with high potential is input, the clock signal input terminal 123 for transmitting the high potential signal may be connected to the first electrode of the first switching transistor 131p, and the second power signal input terminal 121L for transmitting the low potential signal may be connected to the control electrode of the first switching transistor 131p, so that when the power signal is input to the second power signal input terminal 121L and the first clock signal is input to the clock signal input terminal 123 in the test stage, the first switching transistor 131p may be controlled to be turned on, so that the first clock signal input to the clock signal input terminal 123 is transmitted to the corresponding signal connection line.
For the clock signal input terminal 123 when the second clock signal with a low potential is input, the clock signal input terminal 123 transmitting the low potential signal may be connected to the first electrode of the second switching transistor 131n, and the first power signal input terminal 121H transmitting the high potential signal may be connected to the control electrode of the second switching transistor 131n, so that the second switching transistor 131n may be controlled to be turned on when the power signal is input from the first power signal input terminal 121H and the second clock signal is input from the clock signal input terminal 123 in the test stage, so that the second clock signal input from the clock signal input terminal 123 may be transmitted to the corresponding signal connection line.
After the test is finished, the first power signal input terminal 121H, the second power signal input terminal 121L and the clock signal input terminal 123 do not have signal input any more, the control electrodes of the first switching transistor 131p and the second switching transistor 131n connected in parallel are all in a floating state, the first switching transistor 131p and the second switching transistor 131n are both turned off, and at this time, the signal transmitted by the signal connection line cannot be transmitted to the clock signal input terminal 123 through the first switching transistor 131p and the second switching transistor 131n, so that the clock signal input terminal 123 is prevented from being corroded due to electrification.
Fig. 6 is another schematic structural diagram of the switch unit according to the embodiment of the present invention, as shown in fig. 5, in an implementable manner, the test signal input terminal 12 further includes: a data signal input terminal 124 for inputting data signals, which can be signals for controlling the pixel units to display different gray scales;
the data signal input terminal 124 is connected to a first pole of a first switching transistor 131p and a first pole of a second switching transistor 131n, respectively, a signal connection line corresponding to the data signal input terminal 124 is connected to a second pole of the first switching transistor 131p and a second pole of the second switching transistor 131n, respectively, the first power signal input terminal 121H is connected to a control pole of the second switching transistor 131n, and the second power signal input terminal 121L is connected to a control pole of the first switching transistor 131p.
Since the display panel may drive the pixel units to emit light by adopting a polarity inversion manner, the data signal may be a high-potential signal or a low-potential signal. When the first switching transistor 131p is in an on state, the control electrode inputs a low-potential signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the signal input by the first electrode is a high-potential signal, and the on requirement is more easily met; similarly, when the second switching transistor 131n is in the on state, the control electrode inputs a high-level signal, and if it is required that the voltage difference between the control electrode and the first electrode is greater than the threshold voltage, the on requirement is more easily met when the signal input to the first electrode is a low-level signal. As for the data signal input terminal 124 where the input signal is switched between the high and low potential signals, an element in which one first switching transistor 131p and one second switching transistor 131n are connected in parallel may be used as the switching control element of the clock signal input terminal 123.
In the data signal input terminal 124 when a high-potential data signal is input, the data signal input terminal 124 for transmitting a high-potential signal may be connected to the first electrode of the first switching transistor 131p, and the second power signal input terminal 121L for transmitting a low-potential signal may be connected to the control electrode of the first switching transistor 131p, so that the first switching transistor 131p may be controlled to be turned on when a power signal is input to the second power signal input terminal 121L and a high-potential data signal is input to the data signal input terminal 124 in the test stage, so that the high-potential data signal input to the data signal input terminal 124 may be transmitted to the corresponding signal connection line.
For the data signal input terminal 124 when the data signal of low potential is input, the data signal input terminal 124 for transmitting the low potential signal may be connected to the first electrode of the second switching transistor 131n, and the first power signal input terminal 121H for transmitting the high potential signal may be connected to the control electrode of the second switching transistor 131n, so that when the power signal is input from the first power signal input terminal 121H and the data signal input terminal 124 receives the low potential data signal in the test stage, the second switching transistor 131n may be controlled to be turned on, so that the data signal of low potential input from the data signal input terminal 124 may be transmitted to the corresponding signal connection line.
After the test is finished, the first power signal input terminal 121H, the second power signal input terminal 121L and the data signal input terminal 124 do not have signal input any more, the control electrodes of the first switching transistor 131p and the second switching transistor 131n connected in parallel are all in a floating state, the first switching transistor 131p and the second switching transistor 131n are both turned off, and at this time, the signal transmitted by the signal connection line cannot be transmitted to the data signal input terminal 124 through the first switching transistor 131p and the second switching transistor 131n, so that the data signal input terminal 124 is prevented from being corroded due to electrification.
In the display test stage of the display panel, the input data signals are much simpler than those input in the display stage, and the purpose of the display test is to light up the display panel to determine whether a dead pixel exists, so that the same data signals can be applied to all pixel units of the display panel or to subpixels of the same color. In the display panel according to the embodiment of the invention, the switching transistor connected to the data signal input terminal 124 may also be a single switching transistor. As shown in fig. 7, when the data signal input from the data signal input terminal 124 is a low-potential data signal, a second switching transistor 131n may be employed; alternatively, when the data signal input from the data signal input terminal 124 is a high potential data signal, the first switching transistor 131p may be employed.
The display panel according to an embodiment of the present invention may further include a test signal input terminal to which another signal is input, and according to a rule of the switch transistors connected to the test signal input terminals, a first electrode of a second switch transistor may be connected to the test signal input terminal to which a low potential signal is input, and a control electrode of the second switch transistor may be connected to the test signal input terminal to which a high potential is input; a first electrode of a first switch transistor is connected correspondingly to a test signal input terminal for inputting high potential, and a control electrode of the first switch transistor is connected with a test signal input terminal for inputting low potential.
In practical applications, the power signal input by the first power signal input terminal 121H is a positive potential signal, and the power signal input by the second power signal input terminal 121L is a negative potential signal. For example, when the display panel is an OLED display panel, the power signal input from the first power signal input terminal 121H may be a VGH signal having a voltage of 8V to 10V, and the power signal input from the second power signal input terminal 121L may be a VGL signal having a voltage of-7V to-8V. Accordingly, the voltage of the reference signal input from the reference signal input terminal 122 may be-3V, the voltage of the first clock signal input from the clock signal input terminal 123 may be 8V, and the voltage of the second clock signal input from the clock signal input terminal 123 may be-8V. The voltages of other signals of the OLED display panel are not listed here. When the display panel is a liquid crystal display panel, the signal potentials inputted from the power signal input terminal 121, the reference signal input terminal 122, the clock signal input terminal 123 and the data signal input terminal 124 may vary according to the driving rule of the liquid crystal display panel, and are not limited herein.
In an embodiment of the present invention, the first switching transistor 131P may be a P-type thin film transistor, and the second switching transistor 131N may be an N-type thin film transistor. The P-type thin film transistor can be turned on when a low potential signal is input to a grid (namely a control electrode) and turned off when a high potential signal is input to the grid; the N-type thin film transistor may be turned on when a high potential signal is input to a gate (i.e., a control electrode) and turned off when a low potential signal is input to the gate. The process of manufacturing the driving voltage by using the thin film transistor in the display panel is well-established, and each thin film transistor included in the switch unit 13 can be formed simultaneously with the display panel in the same process, thereby avoiding the increase of process steps.
The P-type thin film transistor may be a low temperature polysilicon thin film transistor, and the N-type thin film transistor may be a metal oxide thin film transistor. The type of thin film transistor depends on the material used for the active layer. In the display panel provided by the embodiment of the invention, the types of the thin film transistors in the switch units are consistent with the types of the thin film transistors in the driving circuit of the display panel. The driving circuit of the display panel can adopt a mixed type thin film transistor, the P-type thin film transistor adopts a low-temperature polycrystalline silicon thin film transistor, the N-type thin film transistor adopts a metal oxide thin film transistor, the P-type thin film transistor in the switch unit adopts a low-temperature polycrystalline silicon thin film transistor, and the N-type thin film transistor adopts a metal oxide thin film transistor. The driving circuit of the display panel may also use a single type of thin film transistor, for example, the P-type thin film transistor and the N-type thin film transistor in the driving circuit of the display panel use low temperature polysilicon thin film transistors, and the P-type thin film transistor and the N-type thin film transistor in the switch unit use low temperature polysilicon thin film transistors.
The following description will be given only by taking a hybrid thin film transistor as an example of a switching unit, and the film structure of the thin film transistor will be described as an example. Fig. 8 is a schematic diagram of a film structure of a thin film transistor according to an embodiment of the present invention, and as shown in fig. 8, a display panel may include: the liquid crystal display comprises a substrate 201, a buffer layer 202 positioned on the substrate, and a first active layer 203 positioned on one side of the buffer layer, which is far away from the substrate, wherein the first active layer is provided with a set pattern; a first gate insulating layer 204 covering the first active layer, a first gate electrode 205g on a side of the first gate insulating layer facing away from the first active layer, the first gate electrode 205g having an overlapping region in a vertical direction of the first active layer 203; a first interlayer insulating layer 206 covering the first gate 205g, and an interlayer metal layer 207 located on a side of the first interlayer insulating layer 206 away from the first gate 205g, the interlayer metal layer and the first gate 205g having an overlapping region in a vertical direction, the overlapping region constituting a capacitor structure; a second gate electrode 207g provided simultaneously with the interlayer metal layer; a second gate insulating layer 208 covering the interlayer metal layer 207 and the second gate electrode 207g, and a second active layer 209 on a side of the second gate insulating layer away from the second gate electrode 207g; the third gate insulating layer 210 positioned on the side of the second active layer 209 facing away from the second gate insulating layer 208, the third gate electrode 207g ' positioned on the side of the third gate insulating layer 210 facing away from the second active layer 209, the second gate electrode 207g and the third gate electrode 207g ' both have an overlapping region with the second active layer 209 in the vertical direction, and the second gate electrode 207g and the third gate electrode 207g ' form a double gate structure; a second interlayer insulating layer 211 covering the third gate electrode 207 g'; a third interlayer insulating layer 212 on a side of the second interlayer insulating layer 211 facing away from the third gate electrode 207g', and a planarization layer 214 on a side of the third interlayer insulating layer 212 facing away from the second interlayer insulating layer 212.
For the region corresponding to the first active layer 203, a via hole penetrating the first gate insulating layer 204, the first interlayer insulating layer 206, the second gate insulating layer 208 and the second interlayer insulating layer 211 is further included, and a first source 205s and a first drain 206d are formed at the via hole; the first active layer 203, the first gate electrode 205g, the first source electrode 205s, and the first drain electrode 205d constitute a first thin film transistor. For the region corresponding to the second active layer 209 further includes a via hole penetrating the second interlayer insulating layer 211 and the third interlayer insulating layer 212, the second source electrode 207s and the second drain electrode 207d are formed at the via hole; the second active layer 209, the second gate electrode 207, the third gate electrode 207g', the second source electrode 207s, and the second drain electrode 207d constitute a second thin film transistor. The first thin film transistor may be a low temperature polysilicon thin film transistor, the second thin film transistor may be a metal oxide thin film transistor, and for example, the active layer of the N-type metal oxide thin film transistor may be made of an IGZO material.
As shown in fig. 8, the display panel according to the embodiment may be an OLED display panel, a via hole may be formed on the third interlayer insulating layer 212, and a connection electrode 214 may be formed at the via hole, the connection electrode 214 being used to connect the first drain electrode 205d and the anode electrode 215; the anode 215 is formed on the planarization layer 214 and is an anode of the OLED light emitting device; after the image of the anode 215 is formed, a pixel defining layer 216 for spacing each anode 215 is formed, and structures such as a light emitting layer and a cathode are continuously formed on the pixel defining layer 216 and the anode 215.
It should be noted that, the test signal input terminal in the embodiment of the present invention may be formed at the same time as the metal layer in the display panel, and for the convenience of test connection, the test signal input terminal may be located in the metal layer closer to the upper surface of the display panel, as shown in fig. 8, the test signal input terminal in the embodiment of the present invention may be disposed at the same layer as the second source 207s and the second drain 207d, and formed by a one-step patterning process with the second source 207s and the second drain 207 d.
In a second aspect of the embodiments of the present invention, a display device is provided, as shown in fig. 9, which includes any one of the display panels 100 described above. The display device can be a display device such as an LCD display screen, an LCD display, an LCD television, an OLED display screen, an OLED display, an OLED television or electronic paper. The display can also be mobile terminal equipment such as a mobile phone, a tablet personal computer and an intelligent photo album. Since the principle of the display device to solve the problem is similar to that of the display panel, the display device can be implemented by the display panel, and repeated descriptions are omitted.
In a third aspect of the embodiments of the present invention, there is provided a display detection method based on any one of the display panels, as shown in fig. 10, the display detection method includes:
s10, in a test stage, inputting corresponding signals to each test signal input terminal by using a signal generating device, and controlling a switch unit to be opened so that the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line to light up a display panel;
and S20, in the display stage, the cut-off signal generating device inputs corresponding signals to the test signal input terminals, and the switch unit is controlled to be closed so as to cut off the signals of the signal connecting lines from being transmitted to the corresponding test signal input terminals.
The display panel needs to be subjected to display testing before the display chip is bound, an external signal generating device needs to be connected to the test signal input terminal in the testing stage, and the signal generating device can input the same signal to the test signal input terminal when the display panel normally displays so as to drive the display panel to emit light. Because the switch unit is connected between the test signal input terminal and the signal connecting line, when the signal generating device inputs corresponding signals to each test signal input terminal, the switch unit is in an on state under the control of the input signal of the control terminal, and the signals input by the signal generating device can be transmitted to the corresponding signal connecting line by each test signal input terminal, so that the display panel is driven to emit light, and the light emitting condition of each pixel unit of the display panel is tested.
After the display test is finished and the display panel is tested to be qualified, the signal generating device can be removed by binding the display chip, and the display chip is bound. At this moment, the test signal input terminal is in a suspended state, the control end of the switch unit is also in a suspended state, the switch unit is closed, even in a display stage, a signal output by the display chip can be transmitted to the signal connecting line, and because the switch unit is closed, the signal on the signal connecting line cannot be transmitted to the test signal input terminal, so that the test signal input terminal is prevented from being corroded due to electrification.
In a specific implementation, the switch unit may be composed of a plurality of switch transistors, and each switch transistor is connected between the test signal input terminal and its corresponding signal connection line. The specific connection manner may refer to the application manner in the above embodiments of the present invention, and is not described herein again.
The invention provides a display panel, a display detection method and a display device thereof, comprising: the driving circuit is used for driving the display panel to emit light; the drive circuit includes a plurality of signal lines; a test signal input terminal for inputting a test signal; a switching unit connected between the driving circuit and the test signal input terminal; the display panel further includes: a signal connection line connected to the signal line; the switch unit is electrically connected with the signal line through a signal connecting line; wherein, the switch unit includes: a control terminal, an input terminal, and an output terminal; the signal of the input end is controlled by the control end to be transmitted to the output end; the input end is connected with the test signal input terminal, the output end is connected with the signal connecting wire, and the control end is connected with the test signal input terminal. The switch unit is arranged between the signal connecting line and the test signal input terminal, and in a test stage, the signal generating device is adopted to input corresponding signals to each test signal input terminal, so that the switch unit is controlled to be opened, the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line, and the display panel is lightened; in the display stage, the cut-off signal generating device inputs corresponding signals to each test signal input terminal, and the control switch unit is closed so as to cut off the signals of each signal connecting line from being transmitted to each corresponding test signal input terminal. Therefore, the corrosion of the electrified test signal input terminal in the display stage is avoided, and further the damage to the signal wire connected with the test signal input terminal is avoided.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. A display panel, comprising:
the driving circuit is used for driving the display panel to emit light; the driving circuit includes a plurality of kinds of signal lines;
a test signal input terminal for inputting a test signal;
a switching unit connected between the driving circuit and the test signal input terminal;
the display panel further includes: a signal connection line connected to the signal line; the switch unit is electrically connected with the signal wire through the signal connecting wire;
wherein the switching unit includes: a control terminal, an input terminal, and an output terminal; controlling the signal transmission of the input end to the output end through the control end; the input end is connected with the test signal input terminal, the output end is connected with the signal connecting wire, and the control end is connected with the test signal input terminal;
the switch unit is used for responding to a signal input from the test signal input terminal to the control terminal in a test stage and transmitting a test signal input from the test signal input terminal to the signal connecting line; cutting off the signal transmission of the signal connecting line to the test signal input terminal in the display stage;
the signal connecting wires correspond to the test signal input terminals one to one; the test signal input terminal includes: a power signal input terminal for inputting a power signal;
the switching unit includes: at least one switching transistor; the first pole of the switch transistor is connected with the test signal input end, the second pole of the switch transistor is connected with the corresponding signal connecting line, and the control pole of the switch transistor is connected with the power supply signal input terminal;
a potential of a test signal input from the test signal input terminal connected to the first electrode of the switching transistor is different from a potential of a power signal input from the power signal input terminal connected to the control electrode of the switching transistor;
the power signal input terminal includes: a first power signal input terminal and a second power signal input terminal;
the potential of the signal transmitted by the first power signal input terminal is higher than the potential of the signal transmitted by the second power signal input terminal;
the switching unit includes: a first switching transistor and a second switching transistor;
the first power signal input terminal is connected with a first pole of one first switching transistor, a signal connecting line corresponding to the first power signal input terminal is connected with a second pole of the first switching transistor, and the second power signal input terminal is connected with a control pole of the first switching transistor;
the second power signal input terminal is connected with a first pole of one second switching transistor, a signal connecting line corresponding to the second power signal input terminal is connected with a second pole of the second switching transistor, and the first power signal input terminal is connected with a control pole of the second switching transistor.
2. The display panel according to claim 1, wherein the test signal input terminal further comprises: a reference signal input terminal for inputting a reference signal; the potential of the reference signal input by the reference signal input terminal is lower than the potential of the power supply signal input by the first power supply signal input terminal;
the reference signal input terminal is connected with a first pole of one second switching transistor, a signal connecting line corresponding to the reference signal input terminal is connected with a second pole of the second switching transistor, and the first power supply signal input terminal is connected with a control pole of the second switching transistor.
3. The display panel of claim 1, wherein the test signal input terminal further comprises: a clock signal input terminal for inputting a clock signal; the clock signal input terminal time-divisionally inputs a first clock signal and a second clock signal, and the potential of the first clock signal is higher than that of the second clock signal;
the clock signal input terminal is connected with a first pole of the first switch transistor and a first pole of the second switch transistor respectively, a signal connecting line corresponding to the clock signal input terminal is connected with a second pole of the first switch transistor and a second pole of the second switch transistor respectively, the first power supply signal input terminal is connected with a control pole of the second switch transistor, and the second power supply signal input terminal is connected with a control pole of the first switch transistor.
4. The display panel of claim 1, wherein the test signal input terminal further comprises: a data signal input terminal for inputting a data signal;
the data signal input terminal is connected with a first pole of the first switch transistor and a first pole of the second switch transistor respectively, a signal connecting line corresponding to the data signal input terminal is connected with a second pole of the first switch transistor and a second pole of the second switch transistor respectively, the first power supply signal input terminal is connected with a control pole of the second switch transistor, and the second power supply signal input terminal is connected with a control pole of the first switch transistor.
5. The display panel according to claim 1, wherein the power supply signal input from the first power supply signal input terminal is a positive potential signal, and wherein the power supply signal input from the second power supply signal input terminal is a negative potential signal.
6. The display panel according to claim 5, wherein the first switching transistor is a P-type thin film transistor and the second switching transistor is an N-type thin film transistor.
7. The display panel according to claim 6, wherein the P-type thin film transistor is a low temperature polysilicon thin film transistor and the N-type thin film transistor is a metal oxide thin film transistor.
8. A display device characterized by comprising the display panel according to any one of claims 1 to 7.
9. A display detection method of a display panel according to any one of claims 1 to 7, comprising:
in a test stage, a signal generating device is adopted to input corresponding signals to each test signal input terminal, and the switch unit is controlled to be switched on, so that the test signals input by each test signal input terminal are transmitted to each corresponding signal connecting line, and the display panel is lightened;
and in the display stage, the signal generation device is cut off to input corresponding signals to each test signal input terminal, the switch unit is controlled to be closed, and the signals of each signal connecting line are cut off to be transmitted to each corresponding test signal input terminal.
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| CN111158177B (en) * | 2020-02-28 | 2022-11-22 | 京东方科技集团股份有限公司 | Detection structure, display panel, detection device and detection system |
| CN112885275B (en) * | 2021-01-15 | 2022-09-23 | 云谷（固安）科技有限公司 | Detection circuit and method for display panel |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1825176A (en) * | 2005-02-22 | 2006-08-30 | 三星电子株式会社 | Liquid crystal display and test method thereof |
| CN1900802A (en) * | 2005-07-19 | 2007-01-24 | 三星电子株式会社 | Liquid crystal display panel and testing and manufacturing methods thereof |
| CN101833910A (en) * | 2009-03-11 | 2010-09-15 | 上海天马微电子有限公司 | Display device and method for testing array substrate of display device |
| CN103914179A (en) * | 2013-12-30 | 2014-07-09 | 上海天马微电子有限公司 | Touch display panel and control circuit thereof |
| CN104076996A (en) * | 2013-03-26 | 2014-10-01 | 株式会社日本显示器 | Display device and electronic apparatus |
| CN104849881A (en) * | 2015-05-04 | 2015-08-19 | 上海天马微电子有限公司 | Display device and driving method thereof |
| CN106200161A (en) * | 2016-07-13 | 2016-12-07 | 深圳市华星光电技术有限公司 | Display panels periphery design circuit and use the display panels of this circuit |
| CN107039467A (en) * | 2017-05-15 | 2017-08-11 | 厦门天马微电子有限公司 | A kind of array base palte, display panel and display device |
| CN108133693A (en) * | 2018-01-03 | 2018-06-08 | 厦门天马微电子有限公司 | display panel, driving method and display device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101304415B1 (en) * | 2007-01-25 | 2013-09-05 | 삼성디스플레이 주식회사 | Display device |
-
2019
- 2019-10-31 CN CN201911056873.3A patent/CN110599936B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1825176A (en) * | 2005-02-22 | 2006-08-30 | 三星电子株式会社 | Liquid crystal display and test method thereof |
| CN1900802A (en) * | 2005-07-19 | 2007-01-24 | 三星电子株式会社 | Liquid crystal display panel and testing and manufacturing methods thereof |
| CN101833910A (en) * | 2009-03-11 | 2010-09-15 | 上海天马微电子有限公司 | Display device and method for testing array substrate of display device |
| CN104076996A (en) * | 2013-03-26 | 2014-10-01 | 株式会社日本显示器 | Display device and electronic apparatus |
| CN103914179A (en) * | 2013-12-30 | 2014-07-09 | 上海天马微电子有限公司 | Touch display panel and control circuit thereof |
| CN104849881A (en) * | 2015-05-04 | 2015-08-19 | 上海天马微电子有限公司 | Display device and driving method thereof |
| CN106200161A (en) * | 2016-07-13 | 2016-12-07 | 深圳市华星光电技术有限公司 | Display panels periphery design circuit and use the display panels of this circuit |
| CN107039467A (en) * | 2017-05-15 | 2017-08-11 | 厦门天马微电子有限公司 | A kind of array base palte, display panel and display device |
| CN108133693A (en) * | 2018-01-03 | 2018-06-08 | 厦门天马微电子有限公司 | display panel, driving method and display device |
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| Publication number | Publication date |
|---|---|
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