CN110579667A - Power system analysis method - Google Patents
Power system analysis method Download PDFInfo
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- CN110579667A CN110579667A CN201911005879.8A CN201911005879A CN110579667A CN 110579667 A CN110579667 A CN 110579667A CN 201911005879 A CN201911005879 A CN 201911005879A CN 110579667 A CN110579667 A CN 110579667A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
Abstract
The invention discloses a power system analysis method, which comprises the following steps: (1) simultaneously connecting the three voltage transformers, the three current transformers and the zero-crossing detection module into a power grid, judging whether a power grid signal crosses zero in a positive direction, and if so, executing the step (2); if not, continuing to wait; (2) the six AD converters simultaneously carry out synchronous sampling; (3) the step (2) is circulated until the sampling points of the six AD converters are all 512; (4) after sampling is finished, the FPGA module carries out FFT operation and other related electrical parameter calculation and analysis to obtain a processing result, then the processing result is transmitted to the display module to be displayed, and the processing result is transmitted to the remote terminal through the transmission module. The invention takes the FPGA as a processing core and combines the six AD converters to synchronously sample, thereby avoiding the problem that the traditional power analyzer is easy to generate asynchronous sampling errors in the using process due to the adoption of the design mode of the DSP, the multi-way switch and the AD converter, and well improving the overall measurement precision of the analyzer.
Description
Technical Field
the invention relates to the technical field of power systems, in particular to a power system analysis method.
Background
With the continuous development and innovation of science and technology, more and more industries use electric power to carry out intelligent production operation, and the use of electric power most of the time means need carry out real-time monitoring and analysis to the in service behavior of electric power, and this wherein just needs to involve the use of electric power analysis appearance. The electric power analyzer is an instrument for measuring voltage, current, active/reactive/apparent power, power factor, effective power quantity, ineffective power quantity, frequency and harmonic wave, and is mainly used for three-phase power measurement, voltage event capture, harmonic wave measurement, three-phase unbalance measurement and the like.
The existing power analyzer mostly adopts a design mode of DSP + multi-way switch + AD converter, the design mode is relatively complex in system, the problem of asynchronous sampling error is easy to occur, and the overall measurement precision of the analyzer is not high. Meanwhile, the power analyzer needs to perform FFT operation after sampling is completed, and the conventional power analyzer has the disadvantages that the calculation amount is large, the occupation of processor resources is large and the processing efficiency is difficult to guarantee due to the unreasonable system design.
Therefore, there is a need for an improved power analyzer and method of analyzing the same.
Disclosure of Invention
In view of the above disadvantages of the prior art, the present invention provides an analysis method for an electric power system, which adopts the following technical scheme:
a power system analysis method comprises a power analyzer, wherein the power analyzer comprises a shell, a printed board arranged in the shell, an FPGA module, a power supply module, a display module, a keyboard module, a transmission module, a six-path AD converter, a filter, a three-path voltage transformer, a three-path current transformer, a zero-crossing detection module, a signal conditioning module, a photoelectric isolation module, an anti-aliasing filter, a voltage comparator, a phase comparator, a low-pass filter, a voltage-controlled oscillator and a frequency divider, wherein the FPGA module, the power supply module, the display module, the keyboard module, the transmission module, the six-path AD; the power module, the display module, the keyboard module, the transmission module, the six-channel AD converter, the voltage-controlled oscillator, the frequency divider and the photoelectric isolation module are all connected with the FPGA module; the number of the filters is the same as that of the AD converters, and the filters are connected in a one-to-one correspondence manner; the three voltage transformers and the three current transformers are connected with the filters in a one-to-one correspondence manner; the anti-aliasing filter is simultaneously connected with the three-way voltage transformer, the three-way current transformer and the voltage comparator, and the phase comparator, the low-pass filter and the voltage-controlled oscillator are sequentially connected; the voltage comparator and the frequency divider are both connected with the phase comparator; the zero-crossing checking module, the signal conditioning module and the photoelectric isolation module are sequentially connected; the analysis method comprises the following steps:
(1) The three voltage transformers, the three current transformers and the zero-crossing detection module are simultaneously connected to a power grid, a power grid signal is processed by the zero-crossing detection module, the signal conditioning module and the photoelectric isolation module, and then the FPGA module judges whether the power grid signal crosses zero in the positive direction, if yes, the step (2) is executed; if not, continuing to wait;
(2) the six AD converters simultaneously carry out synchronous sampling;
(3) Circulating the step (2) until the sampling points of the six AD converters are 512, and executing the step (4); while the AD converter samples, the synchronous signal enters the voltage comparator after being shaped by the anti-aliasing filter, the voltage comparator converts the sine wave signal into a square wave signal, the square wave signal enters the phase comparator to be compared with the signal obtained by dividing the output signal by 512 times, then the error amount is filtered by the low-pass filter, the output frequency of the voltage-controlled oscillator is controlled to change towards the direction of reducing the error, so that the output signal is 512 times of the synchronous signal, and the equal-interval sampling of the number of sampling points is realized;
(4) After sampling is finished, the FPGA module carries out FFT operation and other related electrical parameter calculation and analysis to obtain a processing result, then the processing result is transmitted to the display module to be displayed, and the processing result is transmitted to the remote terminal through the transmission module.
Further, the power analysis appearance still including setting up the location cardboard at the shell back, install the installation carrier on the wall, fix on the installation carrier, be used for the card to go into the limiting plate of locating plate to and positioning bolt, all be equipped with the screw hole on locating plate and the limiting plate, the screw hole of the two aligns when locating plate and fibreboard joint, makes the shell install to the wall firmly through the cooperation of positioning bolt and screw hole.
specifically, the location cardboard is "L" physique down, and the screw hole setting is on a side of location cardboard "L" shape.
specifically, the limiting plate is a U-shaped body, one edge of the limiting plate is fixed on the mounting carrier, and the threaded holes are formed in two edges of the U-shaped limiting plate.
and furthermore, the upper end and the lower end of the back surface of the shell are provided with positioning baffles.
Still further, the lower end of the shell is provided with an anti-collision buffer pad.
Furthermore, the installation carrier is provided with a bolt installation lug plate, and the installation carrier is fixedly connected with the wall surface in a mode that an expansion screw penetrates through the installation lug plate.
Compared with the prior art, the invention has the following beneficial effects:
(1) The invention takes the FPGA as a processing core and combines the six AD converters to synchronously sample, thereby avoiding the problem that the traditional power analyzer is easy to generate asynchronous sampling errors in the using process due to the adoption of the design mode of the DSP, the multi-way switch and the AD converter, and well improving the overall measurement precision of the analyzer.
(2) The invention adopts the design of the anti-aliasing filter, the voltage comparator, the phase comparator, the low-pass filter, the voltage-controlled oscillator and the frequency divider, and combines the control of the FPGA module, so that the accurate equal-interval sampling can be realized, and the leakage error is avoided, thereby reducing the calculated amount of the FPGA module when the FPGA module carries out FFT operation subsequently, saving the resource of a processor and effectively improving the processing efficiency of the FPGA module.
(3) The current power analysis appearance's mounting means is integral installation mostly, and its problem lies in that the process is comparatively loaded down with trivial details, and the cost input is higher, and dismouting and maintenance are all comparatively inconvenient in the use. The power analysis device is mounted and maintained conveniently by adopting a pre-mounting carrier mode, only the positioning clamping plate is clamped with the limiting plate when in use, then the positioning bolt is mounted, the power analysis device can be mounted quickly, only the positioning bolt is required to be taken down and the positioning clamping plate is slid out from the side face of the limiting plate when in dismounting and maintenance, and the mounting and maintenance are very simple, quick and convenient, and the cost is very low.
(4) The positioning clamping plate is designed in an inverted L-shaped body, the limiting plate is designed in a U-shaped body, the clamping strength between the positioning clamping plate and the limiting plate can be enhanced by utilizing the characteristics of the shape, and the positioning bolt is matched with the threaded hole through the arrangement of the threaded hole, so that the power analyzer is convenient to disassemble, assemble and maintain, and the installation stability of the power analyzer is well ensured.
(5) according to the invention, the anti-collision buffer pad is arranged below the shell, so that when the power analysis device is taken down and placed, the power analysis device is contacted with the ground to generate buffering, and the instrument is prevented from being damaged due to collision.
Drawings
fig. 1 is a schematic view of an external configuration of a power analyzer according to the present invention.
Fig. 2 is a schematic block diagram of a circuit of the power analyzer of the present invention.
Wherein, the names corresponding to the reference numbers are:
The anti-collision device comprises a shell 1, a positioning clamping plate 2, an installation carrier 3, a positioning bolt 4, a limiting plate 5, a positioning baffle 6, an anti-collision cushion 7 and a bolt installation lug plate 8.
Detailed Description
the present invention will be further described with reference to the following description and examples, which include but are not limited to the following examples.
Examples
The invention provides an analysis method of an electric power system, which relates to the structural improvement of an electric power analyzer and mainly comprises a shell 1, a positioning clamping plate 2 arranged on the back surface of the shell 1, a mounting carrier 3 arranged on a wall surface, a limiting plate 5 fixed on the mounting carrier 3 and used for clamping a positioning plate, and a positioning bolt 4, wherein the structure is shown in figure 1.
The mounting carrier 3 is provided with a bolt mounting lug plate 8, and the mounting carrier 3 is fixedly connected with the wall surface in a mode that an expansion screw penetrates through the mounting lug plate 8. The positioning clamping plate 2 is in an inverted L shape, the limiting plate 5 is in a U shape, and threaded holes are formed in the positioning plate and the limiting plate (for the positioning clamping plate, the threaded holes are formed in one edge of the L shape of the positioning clamping plate, and for the limiting plate, the threaded holes are formed in two edges of the U shape of the limiting plate). The screwed hole of the two aligns when locating plate and limiting plate joint, through the cooperation of positioning bolt and screw hole (positioning bolt runs through all screw holes to also can drill out the screw hole on the wall, then positioning bolt stretches into to the wall in, as shown in fig. 1), can make the device body install to the wall on firmly. The installation mode has the advantages of quick, simple and convenient installation and low cost.
Further, the lower end of the housing 1 is provided with an anti-collision bumper 7. Through set up anticollision blotter below the shell, when electric power analysis device took off and place, it produced the buffering with ground contact, avoided the instrument to take place to collide with and lead to impaired. In addition, both ends all are equipped with positioning baffle 6 about the shell 1 back, can avoid debris to invade the limiting plate to a certain extent and cause the joint difficulty.
Fig. 2 is a schematic circuit diagram of the power analyzer of the present invention, which includes a printed board disposed in a housing, and an FPGA module, a power module, a display module, a keyboard module, a transmission module (which may be ethernet or RS485), a six-way AD converter, a filter, a three-way voltage transformer, a three-way current transformer, a zero-crossing detection module, a signal conditioning module, a photoelectric isolation module, an anti-aliasing filter, a voltage comparator, a phase comparator, a low-pass filter, a voltage-controlled oscillator, and a frequency divider respectively disposed on the printed board; the power module, the display module, the keyboard module, the transmission module, the six-channel AD converter, the voltage-controlled oscillator, the frequency divider and the photoelectric isolation module are all connected with the FPGA module; the number of the filters is the same as that of the AD converters, and the filters are connected in a one-to-one correspondence manner; the three voltage transformers and the three current transformers are connected with the filters in a one-to-one correspondence manner; the anti-aliasing filter is simultaneously connected with three voltage transformers, three current transformers and a voltage comparator, and the phase comparator, the low-pass filter and the voltage-controlled oscillator are sequentially connected; the voltage comparator and the frequency divider are both connected with the phase comparator; the zero-crossing detection module, the signal conditioning module and the photoelectric isolation module are sequentially connected.
The power analysis method of the present invention is described below with reference to the structure of the power analyzer, and includes the following steps:
(1) The three voltage transformers, the three current transformers and the zero-crossing detection module are simultaneously connected to a power grid, a power grid signal is processed by the zero-crossing detection module, the signal conditioning module and the photoelectric isolation module, and then the FPGA module judges whether the power grid signal crosses zero in the positive direction, if yes, the step (2) is executed; if not, continuing to wait;
(2) The six AD converters simultaneously carry out synchronous sampling (three-phase alternating current voltage and three-phase alternating current are processed by three voltage transformers and three current transformers in a one-to-one correspondence mode and then enter the input ends of the corresponding AD converters for synchronous sampling after passing through respective filters);
(3) Circulating the step (2) until the sampling points of the six AD converters are 512, and executing the step (4); while the AD converter samples, the synchronous signal enters the voltage comparator after being shaped by the anti-aliasing filter, the voltage comparator converts the sine wave signal into a square wave signal, the square wave signal enters the phase comparator to be compared with the signal obtained by dividing the output signal by 512 times, then the error amount is filtered by the low-pass filter, the output frequency of the voltage-controlled oscillator is controlled to change towards the direction of reducing the error, so that the output signal is 512 times of the synchronous signal, and the equal-interval sampling of the number of sampling points is realized;
(4) After sampling is finished, the FPGA module carries out FFT operation and other related electrical parameter calculation and analysis to obtain a processing result, then the processing result is transmitted to the display module to be displayed, and the processing result is transmitted to the remote terminal through the transmission module.
The invention takes the FPGA as a processing core, combines six AD converters to synchronously sample, has high measurement precision, and can realize accurate equal-interval sampling, thereby reducing the calculated amount of the FPGA module when the FPGA module carries out FFT operation subsequently, saving the processor resource and effectively improving the processing efficiency. Therefore, the invention has the characteristics of reasonable design, stability and reliability, convenient disassembly and assembly, low cost, capability of avoiding asynchronous sampling errors during use, high overall measurement precision of the instrument, strong analysis and calculation capability and high processing efficiency, and has prominent substantive characteristics and remarkable progress compared with the prior art.
The above-mentioned embodiment is only one of the preferred embodiments of the present invention, and should not be used to limit the scope of the present invention, but all the insubstantial modifications or changes made within the spirit and scope of the main design of the present invention, which still solve the technical problems consistent with the present invention, should be included in the scope of the present invention.
Claims (7)
1. The electric power system analysis method is characterized by comprising an electric power analyzer, wherein the electric power analyzer comprises a shell, a printed board arranged in the shell, an FPGA module, a power supply module, a display module, a keyboard module, a transmission module, a six-path AD converter, a filter, a three-path voltage transformer, a three-path current transformer, a zero-crossing detection module, a signal conditioning module, a photoelectric isolation module, an anti-aliasing filter, a voltage comparator, a phase comparator, a low-pass filter, a voltage-controlled oscillator and a frequency divider which are respectively arranged on the printed board; the power module, the display module, the keyboard module, the transmission module, the six-channel AD converter, the voltage-controlled oscillator, the frequency divider and the photoelectric isolation module are all connected with the FPGA module; the number of the filters is the same as that of the AD converters, and the filters are connected in a one-to-one correspondence manner; the three voltage transformers and the three current transformers are connected with the filters in a one-to-one correspondence manner; the anti-aliasing filter is simultaneously connected with the three-way voltage transformer, the three-way current transformer and the voltage comparator, and the phase comparator, the low-pass filter and the voltage-controlled oscillator are sequentially connected; the voltage comparator and the frequency divider are both connected with the phase comparator; the zero-crossing checking module, the signal conditioning module and the photoelectric isolation module are sequentially connected; the analysis method comprises the following steps:
(1) The three voltage transformers, the three current transformers and the zero-crossing detection module are simultaneously connected to a power grid, a power grid signal is processed by the zero-crossing detection module, the signal conditioning module and the photoelectric isolation module, and then the FPGA module judges whether the power grid signal crosses zero in the positive direction, if yes, the step (2) is executed; if not, continuing to wait;
(2) The six AD converters simultaneously carry out synchronous sampling;
(3) circulating the step (2) until the sampling points of the six AD converters are 512, and executing the step (4); while the AD converter samples, the synchronous signal enters the voltage comparator after being shaped by the anti-aliasing filter, the voltage comparator converts the sine wave signal into a square wave signal, the square wave signal enters the phase comparator to be compared with the signal obtained by dividing the output signal by 512 times, then the error amount is filtered by the low-pass filter, the output frequency of the voltage-controlled oscillator is controlled to change towards the direction of reducing the error, so that the output signal is 512 times of the synchronous signal, and the equal-interval sampling of the number of sampling points is realized;
(4) after sampling is finished, the FPGA module carries out FFT operation and other related electrical parameter calculation and analysis to obtain a processing result, then the processing result is transmitted to the display module to be displayed, and the processing result is transmitted to the remote terminal through the transmission module.
2. The power system analysis method according to claim 1, wherein the power analyzer further comprises a positioning clamping plate (2) arranged on the back surface of the housing (1), a mounting carrier (3) mounted on the wall surface, a limiting plate (5) fixed on the mounting carrier (3) and used for being clamped into the positioning plate, and a positioning bolt (4), wherein threaded holes are formed in the positioning plate and the limiting plate, the threaded holes of the positioning plate and the threaded holes of the fiber plate are aligned when the positioning plate and the fiber plate are clamped, and the housing is stably mounted on the wall surface through the matching of the positioning bolt and the threaded holes.
3. an electric power system analysis method according to claim 2, characterized in that the positioning clamping plate (2) is an inverted "L" shape, and the threaded hole is arranged on one side of the "L" shape of the positioning clamping plate.
4. a power system analysis method according to claim 3, characterized in that the limiting plate (5) is a "U" shaped body, one side of which is fixed to the mounting carrier, and the threaded holes are provided on both sides of the "U" shaped limiting plate.
5. the power system analysis method according to claim 4, wherein the positioning baffles (6) are arranged at the upper end and the lower end of the back surface of the shell (1).
6. An electric power system analysis method according to claim 5, characterized in that the lower end of the housing (1) is provided with an anti-collision bumper (7).
7. The power system analysis method according to claim 6, wherein the mounting carrier (3) is provided with a bolt mounting lug plate (8), and the mounting carrier (3) is fixedly connected with the wall surface in a mode that an expansion screw penetrates through the mounting lug plate (8).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911005879.8A CN110579667A (en) | 2019-10-22 | 2019-10-22 | Power system analysis method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911005879.8A CN110579667A (en) | 2019-10-22 | 2019-10-22 | Power system analysis method |
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| CN110579667A true CN110579667A (en) | 2019-12-17 |
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2019
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