CN110532218B - double-CPU information interaction method in relay protection device - Google Patents
double-CPU information interaction method in relay protection device Download PDFInfo
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- CN110532218B CN110532218B CN201810508566.3A CN201810508566A CN110532218B CN 110532218 B CN110532218 B CN 110532218B CN 201810508566 A CN201810508566 A CN 201810508566A CN 110532218 B CN110532218 B CN 110532218B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H1/00—Details of emergency protective circuit arrangements
- H02H1/0092—Details of emergency protective circuit arrangements concerning the data processing means, e.g. expert systems, neural networks
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Abstract
The invention discloses a double-CPU information interaction method in a relay protection device, which comprises the following steps of: the protection CPU only sends data to the dual-port RAM, and sends an operation permission signal to the man-machine CPU after the data is written in, and the man-machine CPU reads the dual-port RAM after receiving the operation permission signal; setting the value and setting the timing: the protection CPU sends operation permission and write permission instructions to the man-machine CPU after receiving the constant value setting unlocking signal; after sending the fixed value to be set to the double-port RAM, the human-machine CPU is protected from recovering operation permission and write permission instructions, and the fixed value is read from the double-port RAM; the protection CPU sends the fixed value setting result to a double-port RAM fixed value confirmation area and then sends operation permission and write permission instructions to the human-machine CPU; the man-machine CPU reads the fixed value from the dual-port RAM. The invention ensures the safety and reliability of information interaction under the condition of not influencing the information interaction efficiency.
Description
Technical Field
The invention relates to a double-CPU information interaction method in a relay protection device, and belongs to the technical field of relay protection.
Background
With the popularization of dual-port RAM application in a dual-CPU system in a relay protection device, reliability factors are rarely considered in dual-CPU system interaction in the past, and requirements cannot be met in occasions with high requirements such as nuclear power and the like. The current common method is a multiple redundancy fault-tolerant design, and redundant data is placed in a continuous space, so that errors are easily caused by interference at the same time.
Disclosure of Invention
The invention aims to overcome the defects in the prior art, provides a double-CPU information interaction method in a relay protection device, and solves the technical problems that the double-CPU interaction in the prior art is low in reliability and easy to interfere and make mistakes.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows: a double-CPU information interaction method in a relay protection device comprises a human-computer CPU, a protection CPU and a double-port RAM, wherein the double-CPU information interaction comprises a normal operation state and a fixed value setting state; the method comprises the following steps:
for the normal operating state: the protection CPU only sends data to the dual-port RAM, and sends an operation permission signal to the man-machine CPU after the writing is finished, and the man-machine CPU reads the dual-port RAM after receiving the operation permission signal and cannot write data into the dual-port RAM;
for a fixed value setting state: the protection CPU sends operation permission and write permission instructions to the human-computer CPU after receiving the constant value setting unlocking signal; after sending the fixed value to be set to the dual-port RAM, the human-machine CPU is protected from receiving back operation permission and write permission instructions, and the fixed value is read from the dual-port RAM and verified; the protection CPU sends the fixed value setting result to the double-port RAM fixed value confirmation area and then sends operation permission and write permission instructions to the man-machine CPU; and the human-computer CPU reads the fixed value from the dual-port RAM, if the set fixed value is consistent with the fixed value to be set, the fixed value setting state is ended, and if the set fixed value is inconsistent with the fixed value to be set, the fixed value to be set is sent to the dual-port RAM again.
Furthermore, the human-computer CPU needs to write fixed value data into the fixed value data area and the redundancy fixed value data area respectively every writing operation.
Furthermore, the fixed value data area and the redundancy fixed value data area are respectively positioned in two discontinuous areas of the dual-port RAM.
Further, a specific method for protecting the CPU to verify the fixed value read from the dual-port RAM is as follows:
the man-machine CPU calculates the MD5 value of the constant value to be set by adopting a Message-Digest Algorithm 5 Algorithm;
the protection CPU recalculates the MD5 value according to the read fixed value, and if the read fixed value is consistent with the fixed value sent by the human-computer CPU and the MD5 value is the same, the verification is passed; otherwise, the protection CPU writes the constant value currently in use into the constant value confirmation area of the dual-port RAM.
Further, if the set fixed value is inconsistent with the fixed value to be set, the man-machine CPU adds 1 to the number of the message to be sent.
Further, for the constant value setting state, if the protection CPU does not receive the constant value setting unlocking signal, the data of the dual-port RAM is not read, only the running state data is written into a state data area of the dual-port RAM, and after the writing is finished, an operation permission signal is sent to the human-machine CPU.
Further, the protection CPU sends operation permission and write permission instructions to the man-machine CPU through an IO pin.
Compared with the prior art, the invention has the following beneficial effects:
the protection CPU sends an operation permission instruction to the man-machine CPU through IO, and bus conflict caused by two CPUs accessing the dual-port RAM at the same time is avoided; when the liquid crystal display panel normally operates, the human-computer CPU prohibits writing the double-port RAM operation, the CPU is protected from prohibiting reading the double-port RAM operation, and the occurrence of setting error of a fixed value caused by misoperation on the liquid crystal is avoided. The fixed value data area and the redundancy fixed value data area are respectively positioned in two discontinuous areas of the double-port RAM, so that the problem that the fixed value setting fails due to the fact that the continuous areas are simultaneously interfered is solved; the data is encrypted by adopting a Message-Digest Algorithm 5 Algorithm, only one MD5 value is added in the sent data, and the problems of transmission speed and reliability verification are considered.
Drawings
FIG. 1 is a block diagram of a dual CPU structure in a relay protection device;
FIG. 2 is a diagram illustrating a data format in a dual port RAM;
FIG. 3 is a flowchart of the operation of the human CPU of the present invention;
FIG. 4 is a flowchart of the operation of protecting the CPU in the present invention.
Detailed Description
The double-CPU information interaction method in the relay protection device is based on multiple measures such as redundant data partition storage, MD5 verification and readback verification, and guarantees safety and reliability of information interaction without affecting efficiency.
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
As shown in fig. 1, the relay protection device includes a human-computer CPU, a protection CPU and a dual-port RAM, where the human-computer CPU is responsible for processing human-computer interfaces, communication, wave recording and other operations, the protection CPU is responsible for processing protection logic, and the dual-port RAM is responsible for data interaction between two CPUs. The two CPUs are connected with the dual-port RAM through a data bus and an address bus, and the human-computer CPU is connected with the protection CPU through an operation permission IO port and a write permission IO port.
The flow chart of the invention is shown in fig. 3 and 4: the human-machine CPU and the protection CPU are operated in the timer interruption of 1200Hz, and the interruption of the two CPUs is triggered at the same time to keep synchronization. The dual-port RAM is read and written by only one device at the same time, so that the CPU is protected to perform read-write operation on the dual-port RAM when interruption begins, an operation permission signal is sent to the human-computer CPU after the interruption is completed, other programs are processed, and the human-computer CPU performs read-write operation on the dual-port RAM after receiving the operation permission signal of the human-computer CPU after the operation of the other programs is completed.
When the protection CPU does not receive the fixed value setting unlocking instruction, the double-port RAM data is not read, only the running state data such as the analog quantity, the switching value, the protection action state and the like are sent to the double-port RAM state data area, and after the writing is finished, an operation permission signal is sent to the man-machine CPU through the IO pin. When the man-machine CPU does not receive the write permission signal, only the reading operation is carried out on the dual-port RAM, and data cannot be written into the dual-port RAM.
When a fixed value needs to be set for a protection CPU, the method comprises the following steps: 1) sending a fixed value setting unlocking signal to a protection CPU through a keyboard; 2) after receiving a constant value setting unlocking signal, the protection CPU sends an operation permission instruction and a write permission instruction to the man-machine CPU through the IO pin after finishing the read-write operation of the dual-port RAM during the first interruption; 3) after processing other programs and receiving write permission and operation permission instructions, the human-computer CPU reads state data in the dual-port RAM, and then writes a fixed value to be set into a fixed value data area and a redundancy fixed value data area of the dual-port RAM at the same time according to a data format; 4) when the second interruption occurs, the CPU is protected to retrieve operation permission and write permission instructions, state data is written into the dual-port RAM, then fixed values are read from the dual-port RAM fixed value data area and the redundancy fixed value data area, whether the two fixed values are consistent or not is verified, the requirement of data format verification is met, if the verification is passed, the set fixed values are written into the dual-port RAM fixed value confirmation area, and if the verification is not passed, the original fixed values are written into the dual-port RAM fixed value confirmation area; 5) and (3) the human-computer CPU reads the fixed value data from the double-port RAM fixed value confirmation area, if the set fixed value is consistent with the fixed value to be set, the program is ended, if the set fixed value is unsuccessful or the set fixed value is inconsistent with the fixed value to be set, the number of the sent message is increased by 1, the interruption is ended, and then the steps 2-5 are repeated.
As shown in fig. 1, the constant value data area and the redundant constant value data area in the dual port RAM are located in two discontinuous areas of the dual port RAM, preferably at the head end and the tail end of the dual port RAM, respectively, so as to avoid the continuous areas from being interfered at the same time. As shown in fig. 2, the data sent by the human-computer CPU uses the Message-Digest Algorithm 5 to calculate the MD5 value and store the MD5 value at the end of the data, and the receiving-end protection CPU recalculates the MD5 value, and if the data is disturbed or changed, the obtained MD5 value will be different from the original value.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (6)
1. A double-CPU information interaction method in a relay protection device comprises a man-machine CPU, a protection CPU and a double-port RAM, wherein the man-machine CPU and the protection CPU are connected with the double-port RAM through a data bus and an address bus, and the man-machine CPU is connected with the protection CPU through an operation permission IO port and a write permission IO port; the double CPU information interaction comprises a normal operation state and a fixed value setting state; the method is characterized by comprising the following steps:
for normal operating conditions: the protection CPU only sends data to the dual-port RAM, and sends an operation permission signal to the man-machine CPU after the data is written in, and the man-machine CPU reads the dual-port RAM after receiving the operation permission signal and cannot write data into the dual-port RAM;
for a fixed value setting state: the protection CPU sends operation permission and write permission instructions to the man-machine CPU after receiving the constant value setting unlocking signal; after sending the fixed value to be set to the dual-port RAM, the human-machine CPU is protected from receiving back operation permission and write permission instructions, and the fixed value is read from the dual-port RAM and verified; the protection CPU sends the fixed value setting result to a double-port RAM fixed value confirmation area and then sends operation permission and write permission instructions to the human-machine CPU; the human-machine CPU reads a fixed value from the dual-port RAM, if the set fixed value is consistent with the fixed value to be set, the fixed value setting state is finished, and if the set fixed value is inconsistent with the fixed value to be set, the fixed value to be set is sent to the dual-port RAM again;
the specific method for protecting the CPU to verify the fixed value read from the dual-port RAM is as follows:
the man-machine CPU calculates the MD5 value of the constant value to be set by adopting a Message-Digest Algorithm 5 Algorithm;
the protection CPU recalculates the MD5 value according to the read fixed value, and if the read fixed value is consistent with the fixed value sent by the human-computer CPU and the MD5 value is the same, the verification is passed; otherwise, the protection CPU writes the constant value currently in use into the constant value confirmation area of the dual-port RAM.
2. The information interaction method of dual CPUs in a relay protection device according to claim 1, wherein a human-computer CPU is required to write set value data to said set value data area and said redundant set value data area respectively every write operation.
3. The information interaction method for double CPUs in a relay protection device according to claim 2, wherein said constant value data area and said redundant constant value data area are respectively located in two discontinuous areas of said dual port RAM.
4. The information interaction method of the double CPUs in the relay protection device according to claim 1, wherein if the set fixed value is inconsistent with the set fixed value to be set, the man-machine CPU adds 1 to the number of the message to be sent.
5. The method for information interaction between two CPUs in a relay protection device according to claim 1, wherein for a fixed value setting state, if the protection CPU does not receive a fixed value setting unlocking signal, the data of the dual-port RAM is not read, and only the operating state data is written into the state data area of the dual-port RAM, and after the writing is completed, an operation permission signal is sent to said human-machine CPU.
6. The information interaction method of the double CPUs in the relay protection device according to claim 1, wherein the protection CPU sends operation permission and write permission instructions to the human-machine CPU through an IO pin.
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| CN201810508566.3A CN110532218B (en) | 2018-05-24 | 2018-05-24 | double-CPU information interaction method in relay protection device |
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| CN201810508566.3A CN110532218B (en) | 2018-05-24 | 2018-05-24 | double-CPU information interaction method in relay protection device |
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| CN110532218B true CN110532218B (en) | 2022-07-22 |
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