CN110531325A - Digital if receiver and method for monopulse radar - Google Patents
Digital if receiver and method for monopulse radar Download PDFInfo
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Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S7/00—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00
- G01S7/02—Details of systems according to groups G01S13/00, G01S15/00, G01S17/00 of systems according to group G01S13/00
- G01S7/28—Details of pulse systems
- G01S7/285—Receivers
- G01S7/292—Extracting wanted echo-signals
Abstract
The present invention relates to be related to Radar Technology field, specifically, it is a kind of digital if receiver and method for monopulse system radar, including data acquisition module, data preprocessing module, signal processing module and communication module, the present invention realizes data acquisition module, data preprocessing module, signal processing module and communication module synthesis in one piece of hardware circuit board, reduce hardware volume, hardware complexity is reduced, AGC, AFC of weak signal and angle measurement when realizing negative signal-to-noise ratio using Digital Detectings algorithms such as FFT accumulation；The performance that analog circuit channel amplitude and phase equalization difference after multiple frequency conversion and processing is improved using multichannel amplitude and phase error correction function, has very high channel amplitude-phase consistency；The rule of selection is lined up using data frame in the transmission of angle error information, AGC code and AFC code, the communication contention aware of multi-serial communication generation is avoided, improves the stability and reliability of system.
Description
Technical field
The present invention relates to Radar Technology fields, are related to Digital Signal Processing and field programmable gate array (Field
Programable Gate Array, abbreviation FPGA), in particular to the digital if receiver of monopulse radar can be used for list
Pulse radar HF receiving subsystem.
Background technique
With the development of software radio, digitized radar becomes the trend of radar development.Traditional monopulse radar by
In to the coherence request height with trim, the amplitude of gun parallax triple channel, phase response, become with analog circuit by multiple
The channel of frequency and processing is difficult to accomplish amplitude, the consistency of phase response between each channel, mostly uses binary channels, single-pass thus
Road or conical scan technique, but these merging simplification for being referred to as " channel folding " are all the performances to sacrifice some aspects
For cost, reduction or signal-to-noise ratio such as data transfer rate are reduced.Digital receiver is the developing direction of Modern receivers, digitlization
Receiver is based on the bandpass sample theory to radio frequency or intermediate frequency narrow band signal.Since traditional three-channel monopulse radar receives
Machine it is difficult to ensure that triple channel amplitude, the consistency of phase response, therefore precision is poor, since software radio is born, number
This problem of word intermediate-frequency receiver very good solution and be widely used.But existing digital if receiver does not relate to
And AFC is controlled to automatic growth control AGC and automatic frequency, the precision of amplitude phase error consistency is only improved, to improve
Angle measurement accuracy, the control of frequency and gain is still realized in AGC and AFC using analog circuit, and the AGC of simulation is by right
Each channel carries out gain control, is difficult to accomplish that the gain response in each channel is consistent in this way, to can not further improve
Angle measurement accuracy, and requirement of the modern precision tracking radar to angle measurement accuracy is higher.Angle measurement is only completed by digital if receiver
Function, by analog circuit complete AFC function also result in frequency control it is asynchronous with angle measurement, affect mentioning for angle measurement accuracy
It is high.And no matter the AGC and AFC simulated has biggish defect in accuracy and sensitivity, such as in weak signal, negative signal-to-noise ratio
In the case where, it is difficult to extract signals to carry out gain and frequency control for analog circuit.Existing digital if receiver number electricity
Angle measurement is realized on road, and analog circuit realizes AGC and AFC, will appear communication contention aware in multi-serial communication, so that the reliability of system
It is lower.
Summary of the invention
It is an object of the invention to overcome the deficiencies of the prior art and provide a kind of digital intermediate frequencies for monopulse radar to connect
Receipts machine, to further increase angle measurement accuracy and system reliability, weak signal is smoothly extracted in realization in noise, especially in negative letter
It makes an uproar and extracts weak signal progress angle measurement and frequency control than in the environment of, and realize the multichannel gain in the gain control of multichannel
The consistency of response.
To achieve the above object, the present invention includes: for the digital if receiver of monopulse radar
Data acquisition module is made of 1 analog-digital converter ADC chip, for completing triple channel intermediate frequency simulation letter
Number sampling functions convert analog signals into digital real signal, and digital real signal is by bus transfer to data preprocessing module；
Data preprocessing module, for completing quadrature interpolation and the triple channel amplitude phase error school of three-channel digital real signal
Just, which is that the digital real signal after converting ADC is down-converted to base band formation digital baseband complex signal from intermediate frequency；
Signal processing module is made of FPGA, for completing three-channel digital automatic growth control AGC, the automatic frequency of number
Rate controls AFC and ranging, tests the speed, angle measurement function；The base-band digital complex signal that FPGA generates data preprocessing module completes number
Word AGC function, number AFC and ranging and range rate function, i.e. digital AGC, AFC function and ranging and range rate function are in signal processing mould
It is that joint is completed in block；
Communication module is made of fpga chip, RS-422 chip and RS-232 chip, and RS-232 chip is by interface subsystem
Instruction send fpga chip to, fpga chip first parses the instruction of interface subsystem then by the instruction and number after parsing
The calculated AGC code of intermediate-frequency receiver institute, AFC code send multichannel analog low-converter to by RS-422；Multichannel analog
Low-converter sends current frequency values and yield value to FPGA by RS-422 chip, and FPGA passes through RS-232 chip again
Frequency values and yield value are transmitted to interface subsystem, and directly will interruption, clock signal and digital medium frequency reception by pin
The calculated azimuth pitch angle error information of machine sends servo subsystem to.
The overall structure of further improvement of the present invention, the digital if receiver is made of metal structure shell, shell
There is a prominent square metal in inside at FPGA, ADC and power supply chip, and height is bonded FPGA, ADC and power supply chip, for for
Chip cooling；It is heat dissipation slot structure on the upside of hull outside, further increases the heat-sinking capability of structural member.Shell side is connector
Interface chooses flanged (FLGD) SMA electric connector for being supplied to digital if receiver analogue echoes signal and clock, J30J system
Column electric connector is used for transmission communication data and online programming data.
To achieve the above object, the present invention is used for the digital intermediate frequency method of monopulse radar, includes the following steps:
(1) 3 tunnel analog signals are sampled by ADC, obtained and frequency in 3 tunnel of channel, gun parallax channel and trim channel
Word real signal；
(2) digital local oscillator orthogonal with two-way respectively per intermediate frequency digital real signal all the way is multiplied, and passes through finite impulse response
FIR filter obtains the mutually orthogonal baseband digital signal in 3 groups of roads I and the road Q；
(3) by 3 roadbeds band digital complex signal simultaneously be Fast Fourier Transform (FFT) FFT respectively, with the peak after the FFT of channel
Value is used as benchmark, removes the spectrum peak at the corresponding frequency point in each channel with the spectrum peak of reference channel, obtains corresponding to each channel
Amplitude phase error coefficient, the channel with the base-band digital complex signal in each channel multiplied by amplitude and phase error correction coefficient, after being corrected
Data；
(4) first in, first out that each channel data after correction takes 8192 sample points to be put into the channel respectively is cached
Device FIFO；
(5) FPGA carries out the Fast Fourier Transform (FFT) FFT in each channel with sample data, finds out backward energy and makes an uproar
Bottom, to and channel frequency domain carry out spectrum peak search, the corresponding spectral peak in orientation and trim channel is found according to spectral peak position
Value, and normalizing is carried out with the spectrum peak with channel, using the angle error information for calculating azimuth, pitch angle than width method, simultaneously
Frequency values corresponding with channel are calculated, the AFC code in AFC table corresponding with the frequency values is taken out and is passed together with angle error information
FPGA is given, by making an uproar bottom compared with the gain table stored in read only memory ROM, corresponding AGC code is taken out, with the AGC code
The gain in three channels is adjusted simultaneously, while the distance and speed of target are found out using the FFT data with channel；FPGA is obtained
Return step (4) after AGC code, AFC code and angle error information, is performed simultaneously step (6)；
(6) AFC code is transmitted to multichannel analog low-converter and adjusts its local frequency by FPGA, and AGC code is transmitted to multichannel
Analog down converter adjusts its digital pad, sends angle error information to servo subsystem and adjusts antenna direction tracking mesh
Mark.
Compared with the prior art, the present invention has the following advantages:
The present invention is comprehensive at one piece by data acquisition module, data preprocessing module, signal processing module and communication module
It is realized in hardware circuit board, reduces hardware volume, reduce hardware complexity；
For the present invention in AGC by the way of Digital Detecting and control, precision is high, can detecte the single of -70dBm and carries
Wave signal；High sensitivity, control precision can reach 0.5dB；Passage consistency is high, and each channel gain response is consistent；
The present invention completes AGC, AFC and angle measurement function joint, is placed on digital intermediate frequency part, angle measurement and AGC, AFC with together
One group of sampled data, AGC, AFC of weak signal and angle measurement when realizing negative signal-to-noise ratio using Digital Detectings algorithms such as FFT accumulation；
The present invention improves analog circuit channel after multiple frequency conversion and processing using multichannel amplitude and phase error correction function
The performance of amplitude and phase consistency difference has very high channel amplitude-phase consistency；
The present invention is lined up the rule of selection in the transmission of angle error information, AGC code and AFC code using data frame, avoids
The communication contention aware that multi-serial communication generates, improves the stability and reliability of system.
Detailed description of the invention
Fig. 1 is the overall structure block diagram of digital if receiver of the present invention；
Fig. 2 is digital if receiver messaging diagrams of the present invention；
Fig. 3 is the communication module block diagram of digital if receiver of the present invention；
Fig. 4 is that digital if receiver of the present invention carries out signal processing and distance, speed, the flow chart of angle error measurement；
Fig. 5 is the realization block diagram that digital quadrature interpolation is carried out in measurement method of the present invention；
Fig. 6 is that amplitude and phase error correction realizes sub-process figure in measurement method of the present invention；
Fig. 7 is that digital AGC realizes sub-process figure in measurement method of the present invention.
Fig. 8 is the plan view block diagram in measurement method of the present invention with poor angle measurement；
Fig. 9 is the realization sub-process figure that joint completes angle resolving and AFC in measurement method of the present invention；
Figure 10 is the implementation process that digital intermediate frequency angle measurement receiver of the present invention transmits AGC code, AFC code and angle error information
Figure.
Specific embodiment
Referring to Fig.1, monopulse radar digital if receiver of the invention is by data acquisition module, data prediction mould
Block, signal processing module and communication module composition, in which:
Data acquisition module is made of 1 analog-digital converter ADC chip, can be carried out simultaneously to three tunnel analog signals
Three road analog intermediate frequency signals are converted to three road intermediate frequency digital real signals by digital sample；
Data preprocessing module is made of 1 fpga chip, ADC chip is connected above FPGA, for what is collected
Data, and intermediate frequency digital real signal is down-converted into base-band digital complex signal by quadrature interpolation algorithm；Calculating width is sent mutually to miss
Poor correction coefficient and angle resolve required data, constant bearing, pitch error, and receive calculated amplitude and phase error correction
Coefficient and channel error；
Signal processing module is made of 1 fpga chip, completes ranging and range rate after storing data in respective stored space
Angle measurement and AGC AFC function；
Communication module, as shown in Fig. 2, it is made of 1 fpga chip, 1 RS-422 chip and 1 RS-232 chip,
Including monitoring submodule, AFC control submodule, AGC control submodule, MFC/MGC control submodule, fifo buffer
FIFO, response parse enabled submodule, are lined up selection submodule and software reset's submodule, and all submodules are by a piece of FPGA
Chip is realized.
Referring to Fig. 3, the communication module of monopulse radar digital if receiver of the present invention includes the function of each submodule
Can be as follows: monitoring submodule receiving interface subsystem order be simultaneously parsed, to AFC control submodule, AGC control submodule,
The transmission of MFC/MGC control submodule starts to enable；AGC control submodule, AFC control submodule are responsible for receiving monitoring submodule
Enabled order, ceaselessly send corresponding code value again after receiving multichannel analog low-converter response, send code value every time
Before detect whether to receive the response of last time multichannel analog low-converter；MFC/MGC control submodule is responsible for receiving monitoring submodule
The enabled order of block, is transmitted to multichannel analog low-converter；Three FIFO store AFC, AGC and MFC/MGC control respectively
The data frame that module is sent out；It is lined up selection submodule to be lined up the data frame to be sent, determines the transmission of data frame
Sequentially；The data frame that data buffer FIFO_OUT storage needs to send immediately；Data buffer FIFO_IN stores multichannel
The reply data frame of analog down converter；Response parses enabled submodule and parses to the response of multichannel analog low-converter
And it is enabled to generate corresponding response；Software reset's submodule resets digital intermediate frequency angle measurement receiver.
Referring to Fig. 4, the step of carrying out angle measurement using monopulse radar digital if receiver of the present invention, is as follows:
Step 1. digital quadrature interpolation
Referring to Fig. 5, this step is implemented as follows:
Analog intermediate frequency signal is entered ADC by (1a) after bandpass filter BPF, and the intermediate frequency digital by ADC sampling is real
Signal is multiplied with orthogonal digital local oscillator respectively, shift frequency to base band；
(1b) filters out the image frequency components in frequency spectrum using low-pass filter, and wherein low-pass filter is filtered using 32 rank FIR
Device obtains the road I and the road Q baseband digital signal I (tn) and Q (tn)。
Step 2. amplitude and phase error correction
Referring to Fig. 6, this step is implemented as follows:
(2a) to each channel reception to data simultaneously carry out FFT transform, transform to frequency domain；
(2b) is all the way optionally reference data from the frequency-domain result in each channel, records spectral peak at the channel signal frequency point
Value；
(2c) removes the spectrum peak at the corresponding frequency point in each channel with the spectrum peak of reference data, and what is recorded is
Number, the coefficient correspond to the amplitude phase error coefficient in each channel, finally amplitude phase error coefficient are stored in the ROM memory of FPGA；
Amplitude and phase error correction coefficient in (2d) export ROM memory is obtained by the coefficient multiplied by base-band digital complex signal
Baseband digital signal after correction completes amplitude and phase error correction.
Step 3. automatic growth control
Referring to Fig. 7, this step is implemented as follows:
Baseband complex signal after down coversion is taken 1 road sample by (3a) FPGA because be using with channel as reference channel,
Taking with the baseband complex signal in channel is sample；
(3b) to and channel I, Q two paths of data constitute complex signal C=I+j*Q be FFT, obtain the current letter with channel
Number and noise power；
(3c) is by average noise powerCompared with being scanned one by one with the AGC table stored in ROM, find out with and the current function in channel
AGC code value corresponding to rate；
AGC code value is issued multichannel analog low-converter by serial ports by (3d), controls multichannel analog low-converter, together
When adjust three channels gain, realize automatic growth control simultaneously guarantee three channels gain response it is consistent.
Step 4. joint completes angle measurement and automatic frequency control
Referring to Fig. 8, the principle of this step is: first having to generate two wave beams while the same angle plane, then will
Received signal is handled two wave beams simultaneously, so that output one only deviates size and Orientation with the target relative antenna optical axis
It is related, and the simple venation angle of attack offset signal unrelated with signal order of magnitude.This simple venation angle of attack offset signal is used to angle
The size of deviation and direction carry out valuation, or drive antenna beam by angular servo-system, and target is continuously tracked.For
With poor monopulse system in order to keep poor branch output only related with the angle at target deviation difference beam center, to extract target
Angle information, the output of poor branch must with and branch export and carry out normalizing.The direction of target difference in offset beam center with and it is poor
Relative phase between two paths of signals is related.If poor tributary signal with and the same phase of tributary signal,It takes just, otherwise
It takes negative.
Assuming that the amplitude with branch output signal is Σ, phase angle θΣ, the amplitude of gun parallax branch output signal is A, phase
Angle is θA, the amplitude of trim branch output signal is E, phase angle θE, calculate azimuth angle error θtWith pitching angle error
Are as follows:
Azimuth angle error is worked as | θΣ-θA| θ at 90 ° of <tPositive sign is taken, when | θΣ-θA| θ at 90 ° of >tTake negative sign.For bowing
Elevation angle error is worked as | θΣ-θE| at 90 ° of <Positive sign is taken, when | θΣ-θE| at 90 ° of >Take negative sign.
The azimuth of target can be obtained by the relationship between angle error and target absolute angle are as follows: θ=θ0+σ*θt, target pitch
Angle are as follows:θ in formula0It is that gun parallax beam center is directed toward, σ represents θtSymbol,It is pitching difference beam
Center is directed toward, and σ is representedSymbol.
According to above-mentioned principle, referring to Fig. 9, this step is implemented as follows:
3 roadbeds band digital complex signal after correction is respectively taken 8192 point write-in FIFO, each Path Setup by (4a) FPGA
Two FIFO, so that Pingpang Memory is realized, so that whole flow process can be with water operation；
Sample data in the FIFO of triple channel are FFT by (4b) FPGA, determine signal spectrum peak value and peak value institute
It is θ in phase position where position, note and channel spectral peakΣ, spectral peak peak value is Σ；Phase position where remembering gun parallax channel spectral peak
For θA, spectral peak peak value is A；Phase position where remembering trim spectral peak is θE, spectral peak peak value is E；
(4c) is according to formulaWithFPGA calculate separately out at this time the azimuth angle error of target and
Pitching angle error, at the same from spectral peak is found in the frequency spectrum that obtains after the FFT of channel where frequency point, which is exactly and channel is believed
Number corresponding frequency values；
(4d) FPGA by record and compared with channel signal frequency values scan one by one with the AFC table of storage, find out with currently
The corresponding AFC code of frequency values, FPGA return to (4b) after obtaining orientation, pitch angle control information and AFC code, are performed simultaneously step
Rapid 5；
Step 5. transmits AGC code, AFC code and angle error information
Referring to Fig.1 0, this step is implemented as follows:
(5a) FPGA is sent to the angle error information that servo subsystem receives and the request for detecting whether interface subsystem
Signal is sent, if there is then making requests signal judgement, if waiting request to send signal without if；
(5b) judges that request signal is that MGC/MFC order or AGC, AFC code value are executed if it is MGC/MFC order
Step (5c)；If it is only AFC code value or only AGC code value, execute step (5d)；If having AGC code and AFC code simultaneously,
It executes step (5e)；
(5c) if request signal is only MGC/MFC order, digital intermediate frequency angle measurement receiver presses interface subsystem order hair
It send sequence that order is transmitted to multichannel analog low-converter, adjusts the gain or local frequency of multichannel analog low-converter；
If request signal is MGC/MFC order and AGC code or MGC/MFC order and AFC code, sends MGC/MFC and instruct to multi-pass
Road analog down converter executes step (5f)；
(5d) FPGA sends corresponding AFC code or AGC code gives multichannel analog low-converter, return step (5a)；
(5e) is lined up AGC code, AFC code, first transmits AFC code value and gives multichannel analog low-converter, controls multi-pass
Road analog down converter adjusts local frequency, then executes step (5f)；
(5f) judges assigned variable Two, Two1, Two2, queuing shape when which represents while having AGC code and an AFC code
Condition, the Two1 represent queuing situation when having MFC command and an AGC code simultaneously, Two2 representative while having MGC order and AFC code
Queuing situation, otherwise etc. as Two=1, judgement has AFC response, and AGC code is sent to multichannel analog low-converter,
To；As Two1=1, judgement has MFC response, and AGC code is sent to multichannel analog low-converter, otherwise waits for；When
When Two2=1, judgement has MGC response, and AFC code is sent to multichannel analog down coversion, otherwise waits for；If three changes
Amount is all 0, then MGC/MFC order or the transmission of AGC, AFC code value finish, return step (5a).
Basic principles and main features and advantage of the invention have been shown and described above.The technical staff of the industry should
Understand, the present invention is not limited to the above embodiments, and the above embodiments and description only describe originals of the invention
Reason, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these changes and improvements
It all fall within the protetion scope of the claimed invention.The claimed scope of the invention is by appended claims and its equivalent circle
It is fixed.
Claims (6)
1. a kind of digital if receiver for monopulse radar characterized by comprising data acquisition module, data are pre-
Processing module, signal processing module and communication module, the data acquisition module are made of analog-digital converter ADC chip,
For completing triple channel analog intermediate frequency signal sampling functions, digital real signal is converted analog signals into, it will be digital by bus
Signal is serially transferred to data preprocessing module；The data preprocessing module, for completing three-channel digital real signal just
Value and triple channel amplitude and phase error correction are interleaved, which is that the digital real signal after converting ADC is down-converted to from intermediate frequency
Base band forms digital baseband complex signal；The signal processing module by FPGA and forms, and increases automatically for completing three-channel digital
Benefit control AGC, digital Automatic frequency control AFC and angle measurement function, FPGA answer the base-band digital that data preprocessing module generates
Signal completes digital AGC function, number AFC and ranging and range rate angle measurement function, i.e. digital AGC, AFC function and ranging and range rate angle measurement
Function is that joint is completed in signal processing module；The communication module, for completing digital intermediate frequency angle measurement receiver and connecing
The communication of mouth subsystem, multichannel analog low-converter and servo subsystem.
2. the digital if receiver according to claim 1 for monopulse radar, which is characterized in that the communication mould
Block is realized by programmable logic device, comprising: monitoring submodule is used for the order of receiving interface subsystem, controls submodule to AFC
Block, AGC control submodule, manual frequency control MFC/ manual gain control MGC control submodule transmission start to enable；Software is multiple
Bit submodule prevents digital if receiver from crashing for resetting to digital if receiver；It is lined up selection submodule, is used for
The data frame to be sent is lined up, determines the transmission order of data frame；AFC control submodule, for receiving monitoring submodule
The enabled order of block and the answer signal of multichannel analog low-converter control AFC closed loop cycle；AGC control submodule, is used for
The enabled order of monitoring submodule and the answer signal of multichannel analog low-converter are received, AGC closed loop cycle is controlled；MFC/
MGC control submodule is transmitted to multichannel analog low-converter for receiving the enabled order of monitoring submodule；Response parsing
Enabled submodule, is parsed for the response to multichannel analog low-converter and generates corresponding response enable signal；First
Enter and first go out buffer FIFO, for storing AFC code, AGC code, MFC/MGC order and enabled answer signal data frame.
3. the digital if receiver according to claim 1 or 2 for monopulse radar, which is characterized in that the number
The overall structure of intermediate-frequency receiver is made of metal structure shell, and enclosure interior is provided with prominent at FPGA, ADC and power supply chip
Square metal out, height are bonded FPGA, ADC and power supply chip, are heat dissipation slot structure on the upside of hull outside, and shell side is to connect
Card i/f chooses flanged (FLGD) SMA electric connector and is used to be supplied to digital if receiver analogue echoes signal and clock,
J30J series electric connector is used for transmission communication data and online programming data.
4. a kind of digital intermediate frequency method for monopulse radar, includes the following steps:
(1) 3 tunnel analog signals are sampled by analog-digital converter ADC, obtained and channel, gun parallax channel and trim channel
3 road intermediate frequency digital real signals；
(2) digital local oscillator orthogonal with two-way respectively per intermediate frequency digital real signal all the way is multiplied, and is filtered by finite impulse response FIR
Wave device obtains the mutually orthogonal baseband digital signal in 3 groups of roads I and the road Q；
(3) I, Q two-way baseband digital signal I (t with channel are takenn) and Q (tn) it is FFT, find out its target echo energy and noise
Then substrate is averaging noise floorThe average value that will be acquiredWith the gain table ratio stored in read only memory ROM
Compared with taking-upCorresponding automatic growth control AGC code adjusts the gain in three channels simultaneously with the AGC code, while utilizing frequency
Spectrum obtain target apart from velocity information；
(4) by 3 roadbeds band digital complex signal simultaneously be Fast Fourier Transform (FFT) FFT respectively, using with the peak value after the FFT of channel as
Benchmark removes the spectrum peak at the corresponding frequency point in each channel with the spectrum peak of reference channel, and the width for obtaining corresponding to each channel mutually misses
Poor coefficient, the channel data with the base-band digital complex signal in each channel multiplied by amplitude and phase error correction coefficient, after being corrected；
(5) 8192 sample points are taken to be put into the fifo buffer in the channel respectively each channel data after correction
FIFO；
(6) the sample data that FPGA is obtained carry out the Fast Fourier Transform (FFT) FFT in each channel, to and channel frequency domain into
Row spectrum peak search finds the corresponding spectrum peak in orientation and trim channel according to spectral peak position, and with and channel spectral peak
Value carries out normalizing, using the angle error information for calculating azimuth, pitch angle than width method, and determines frequency corresponding with channel
Automatic frequency corresponding with the frequency values is controlled the AFC code in AFC table and taken out by value, and FPGA obtains AFC code and angle error information
Return step (5) afterwards are performed simultaneously step (7)；
(7) FPGA sends angle error information to servo subsystem and adjusts antenna direction tracking target, and interface subsystem is sent out
The MGC/MFC order and AGC code, AFC code come is transmitted to multichannel analog low-converter according to the following rules:
The request signal of (7a) FPGA detection interface subsystem simultaneously judges that request signal is MGC/MFC order or AGC, AFC code
Value；
(7b) is executed step (7c) if it is MGC/MFC order；If it is only AFC code value or only AGC code value, step is executed
Suddenly (7d)；If having AGC code and AFC code simultaneously, execute step (7e)；
MGC/MFC order is transmitted to multichannel analog low-converter by (7c) FPGA, is executed step (7f)；
(7d) FPGA sends corresponding AFC code or AGC code gives multichannel analog low-converter, return step (7a)；
(7e) FPGA transmission AFC code value gives multichannel analog low-converter, executes step (7f)；
(7f) judges assigned variable Two, Two1, Two2, which represents queuing situation when having AGC code and an AFC code simultaneously, this
Two1 represents queuing situation when having MFC command and an AGC code simultaneously, Two2 representative while the queuing for having MGC order and AFC code
Situation, as Two=1, judgement has AFC response, and AGC code is sent to multichannel analog low-converter, otherwise waits for；When
When Two1=1, judgement has MFC response, and AGC code is sent to multichannel analog low-converter, otherwise waits for；Work as Two2=1
When, judgement has MGC response, and AFC code is sent to multichannel analog down coversion, otherwise waits for；If three variables are all 0,
Then MGC/MFC order or the transmission of AGC, AFC code value finish, return step (7a).
5. the digital intermediate frequency method according to claim 3 for monopulse radar, which is characterized in that step (6) is described
With and the spectrum peak in channel carry out normalizing, using the angle error information for calculating azimuth, pitch angle than width method, by following step
It is rapid to carry out:
(6a) FPGA will obtain and channel sample data deposit internal storage is FFT, determine signal spectrum peak value and
Peak value position, phase position where note spectral peak are θΣ, spectral peak peak value is Σ；
(6b) FPGA is removed from internal storage and channel sampled data, does to the sample data for importing gun parallax channel
FFT determines that signal spectrum peak value and peak value position, phase position where note spectral peak are θA, spectral peak peak value is A；
(6c) FPGA removes gun parallax channel sampled data from internal storage, imports the sample data in trim channel
It is FFT, determines that signal spectrum peak value and peak value position, phase position where note spectral peak are θE, spectral peak peak value is E；
(6d) calculates target bearing angle errorPitching angle errorWhen | θΣ-θA| θ at 90 ° of <tIt takes just
Number | θΣ-θA| θ at 90 ° of >tNegative sign is taken, when | θΣ-θE| at 90 ° of <Take positive sign | θΣ-θE| at 90 ° of >Take negative sign.
6. the digital intermediate frequency method according to claim 3 for monopulse radar, which is characterized in that the step (6)
The frequency values of the determination and channel signal by FPGA to and 8192 sample point datas in channel be FFT, obtained after FFT
Frequency spectrum in find spectral peak position, the value of frequency point of spectral peak position is exactly frequency values corresponding with channel signal.
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