CN110515789A - A method of improving eMMC write efficiency and accuracy rate - Google Patents
A method of improving eMMC write efficiency and accuracy rate Download PDFInfo
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- CN110515789A CN110515789A CN201910794131.4A CN201910794131A CN110515789A CN 110515789 A CN110515789 A CN 110515789A CN 201910794131 A CN201910794131 A CN 201910794131A CN 110515789 A CN110515789 A CN 110515789A
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- emmc
- caching
- accuracy rate
- memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
Abstract
The invention discloses a kind of raising eMMC write efficiency and the methods of accuracy rate, comprising the following steps: step 1: replacing Static RAM as the buffer area of eMMC with non-volatile RAM；Step 2: caching is opened up as default conditions；Step 3: when host setting eMMC is switched to caching pass, ignore this operation, the non-volatile RAMs such as present invention magnetic RAM MRAM, ferroelectric memory FRAM replace Static RAM as the buffer area of eMMC, possess the high-speed read-write ability of Static RAM, power down simultaneously not will cause loss of data, the invention avoids the loss of data that caching Kai Shiyin power down occurs, eMMC is set to be in the state that caching is opened always, reduce the time of write-in consumption, the risk of loss of data is effectively reduced, accuracy rate and write efficiency are improved.
Description
Technical field
The present invention relates to the technical field for improving eMMC write efficiency and accuracy rate, specially a kind of raising eMMC write-in effect
The method of rate and accuracy rate.
Background technique
EMMC full name is Embedded Multi Media Card, is that MMC association concludes, mainly for mobile phone or plate
The embedded memory standard specification of the products such as computer.EMMC is integrated with a controller in a package, provides standard interface simultaneously
Manage flash memory, can effectively reduce it is lithographic dimensioned, reduce cost.EMMC provides two kinds of writing modes: caching closes (cache off)
It is opened (cache on) with caching, caching is closed all to be stored in flash memory in the data for determining that host requirement is written, and has returned again to equipment
Ready information allows equipment to carry out other operations, and caches and hold, and last data can be kept in when buffer area is not filled with,
First returning equipment is ready, and data write full buffer area incoming flash memory again next time for waiting.Just it is in the data size of write-in
When the multiple of buffer size, the mode operating method that pass was opened and cached to caching is identical, and each buffer area receives full data, that is, is written
Flash memory.When the data size of write-in is not the multiple of buffer size, buffer area is stored in flash memory after receiving full data when caching closes,
The data having more finally are received, are needed to read after the data finally received fill up buffer area, then entire buffer area data are write
Enter flash memory, finally read the data of script position having more, guarantees that buffer area is in original state, therefore take a long time.And
Caching is held, and last data can be temporarily stored in buffer area, be waited and write data next time, fill up remaining data, then write into sudden strain of a muscle together
It deposits, the time is greatly saved, but powered off suddenly if met with, temporary data will lose, and influence the accuracy rate of eMMC.
Static Random Access Memory (SRAM) is used as buffer area by conventional method, when caching is opened, meets with power down, data
It will lose, traditional approach caching, which closes, writes that speed is slower, and caching opens risk there are loss of data, and the two frequent switching can also be made
At unnecessary trouble, it would therefore be highly desirable to which a kind of improved technology solves the problems, such as this in the presence of the prior art.
Summary of the invention
The purpose of the present invention is to provide a kind of raising eMMC write efficiency and the methods of accuracy rate, to solve above-mentioned background
The problem of being proposed in technology.
To achieve the above object, the invention provides the following technical scheme: a kind of eMMC write efficiency and accuracy rate of improving
Method, comprising the following steps:
Step 1: replace Static RAM as the buffer area of eMMC with non-volatile RAM；
Step 2: caching is opened up as default conditions；
Step 3: when host setting eMMC is switched to caching pass, ignore this operation.
Preferably, non-volatile RAM is magnetic RAM MRAM in the step 1, ferroelectricity is deposited
Reservoir FRAM, programmable read-only memory PROM, electric erazable programmable read-only memory EEPROM, erasable programmable read-only memory
EPROM, electrically rewritable read-only memory EAROM or flash memory Flash memory are one such or a variety of.
Preferably, the content of the storage unit in the step 1 in Static RAM arbitrarily can be taken out or deposit on demand
Enter, and the memory that the speed accessed is unrelated with the position of storage unit, the Static RAM will lose when power is off
Its storage content, therefore be mainly used for storing the program that uses of short time.
Preferably, the program for debugging eMMC is installed in host in the step 3.
Compared with prior art, the beneficial effects of the present invention are:
(1) present invention is replaced with non-volatile RAMs such as magnetic RAM MRAM, ferroelectric memory FRAM
Static RAM possesses the high-speed read-write ability of Static RAM, while power down is not as the buffer area of eMMC
It will cause loss of data.
(2) the invention avoids the loss of data that caching Kai Shiyin power down occurs, eMMC is made to be in the shape that caching is opened always
State reduces the time of write-in consumption, effectively reduces the risk of loss of data, improves accuracy rate and write efficiency.
Detailed description of the invention
Fig. 1 is the structural diagram of the present invention.
Fig. 2 is the flow diagram that traditional approach caching closes write-in 33KB.
Fig. 3 is the flow diagram that traditional approach caching opens write-in 33KB.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
Referring to Fig. 1, the present invention provides a kind of technical solution: the method that kind improves eMMC write efficiency and accuracy rate, packet
Include following steps:
Step 1: replace Static RAM as the buffer area of eMMC with non-volatile RAM；
Step 2: caching is opened up as default conditions；
Step 3: when host setting eMMC is switched to caching pass, ignore this operation.
Wherein, non-volatile RAM is magnetic RAM MRAM, ferroelectric memory in step 1
FRAM, programmable read-only memory PROM, electric erazable programmable read-only memory EEPROM, erasable programmable read-only memory EPROM, electricity
Rewritable read-only memory EAROM or flash memory Flash memory are one such or a variety of.
Wherein, the content of the storage unit in step 1 in Static RAM arbitrarily can be taken out or be stored on demand, and
The unrelated memory of the speed of access and the position of storage unit, the Static RAM will lose its storage when power is off
Content, therefore be mainly used for storing the program that uses of short time.
Wherein, the program for debugging eMMC is installed in host in step 3.
Embodiment, as shown in Figure 2 and Figure 3, buffer size 32KB, write-in data size is 33KB.Cache Guan Shihuan
It deposits after full 32KB data are received in area and is stored in flash memory, finally receive 1KB data, need to read after 32KB data fill up buffer area, then
Flash memory is written into entire buffer area data, finally reads the 1KB data of script position, guarantees that buffer area is in original state,
Therefore it takes a long time.And cache and hold, last 1KB data can be temporarily stored in buffer area, wait data of writing next time, filled up remaining
31KB, then flash memory is write into together, the time is greatly saved, but powered off suddenly if met with, temporary data will lose, shadow
Ring the accuracy rate of eMMC.
The nonvolatile memories such as magnetic RAM (MRAM) ferroelectric memory (FRAM), possess static random
The high-speed read-write ability of memory, while power down not will cause loss of data, the invention avoids caching Kai Shiyin power down to occur
Loss of data, so that eMMC is in the state opened of caching always, reduce the time of write-in consumption, effectively reduce the wind of loss of data
Accuracy rate and write efficiency are improved in danger.
It although an embodiment of the present invention has been shown and described, for the ordinary skill in the art, can be with
A variety of variations, modification, replacement can be carried out to these embodiments without departing from the principles and spirit of the present invention by understanding
And modification, the scope of the present invention is defined by the appended.
Claims (4)
1. a kind of method for improving eMMC write efficiency and accuracy rate, it is characterised in that: the following steps are included:
Step 1: replace Static RAM as the buffer area of eMMC with non-volatile RAM；
Step 2: caching is opened up as default conditions；
Step 3: when host setting eMMC is switched to caching pass, ignore this operation.
2. a kind of method for improving eMMC write efficiency and accuracy rate according to claim 1, it is characterised in that: the step
Non-volatile RAM is magnetic RAM MRAM, ferroelectric memory FRAM, may be programmed in read-only in rapid one
Deposit PROM, electric erazable programmable read-only memory EEPROM, erasable programmable read-only memory EPROM, electrically rewritable read-only memory
EAROM or flash memory Flash memory are one such or a variety of.
3. a kind of method for improving eMMC write efficiency and accuracy rate according to claim 1, it is characterised in that: the step
The content of storage unit in rapid one in Static RAM arbitrarily can be taken out or be stored on demand, and the speed and storage accessed
The unrelated memory in the position of unit, the Static RAM will lose its storage content when power is off, therefore be mainly used for
The program that the storage short time uses.
4. a kind of method for improving eMMC write efficiency and accuracy rate according to claim 1, it is characterised in that: the step
Program for debugging eMMC is installed in host in rapid three.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| CN201910794131.4A CN110515789A (en) | 2019-08-27 | 2019-08-27 | A method of improving eMMC write efficiency and accuracy rate |
| PCT/CN2019/105004 WO2021035797A1 (en) | 2019-08-27 | 2019-09-10 | Method for increasing emmc write efficiency and accuracy |
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| CN201910794131.4A CN110515789A (en) | 2019-08-27 | 2019-08-27 | A method of improving eMMC write efficiency and accuracy rate |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113703664A (en) * | 2021-06-24 | 2021-11-26 | 杭州电子科技大学 | Random write rate optimization implementation method for eMMC chip |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103810118A (en) * | 2014-02-28 | 2014-05-21 | 北京航空航天大学 | Novel STT-MRAM cache design method |
| CN105608013A (en) * | 2015-07-10 | 2016-05-25 | 上海磁宇信息科技有限公司 | MRAM-integrated memory card control chip and memory card |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101719103B (en) * | 2009-11-25 | 2012-07-18 | 成都市华为赛门铁克科技有限公司 | Memory device and information processing method based on same |
| CN103324578A (en) * | 2013-06-20 | 2013-09-25 | 深圳市瑞耐斯技术有限公司 | NAND flash memory device and random writing method thereof |
| US10289551B2 (en) * | 2017-05-11 | 2019-05-14 | Western Digital Technologies, Inc. | Preserving data upon a power shutdown |
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- 2019-08-27 CN CN201910794131.4A patent/CN110515789A/en active Pending
- 2019-09-10 WO PCT/CN2019/105004 patent/WO2021035797A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103810118A (en) * | 2014-02-28 | 2014-05-21 | 北京航空航天大学 | Novel STT-MRAM cache design method |
| CN105608013A (en) * | 2015-07-10 | 2016-05-25 | 上海磁宇信息科技有限公司 | MRAM-integrated memory card control chip and memory card |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113703664A (en) * | 2021-06-24 | 2021-11-26 | 杭州电子科技大学 | Random write rate optimization implementation method for eMMC chip |
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