CN110502811A - A kind of PCB design method, equipment and storage medium - Google Patents
A kind of PCB design method, equipment and storage medium Download PDFInfo
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- CN110502811A CN110502811A CN201910731055.2A CN201910731055A CN110502811A CN 110502811 A CN110502811 A CN 110502811A CN 201910731055 A CN201910731055 A CN 201910731055A CN 110502811 A CN110502811 A CN 110502811A
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- pair
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Abstract
The invention discloses a kind of PCB design methods, comprising steps of design differential pair；Obtain the attribute of each via hole in differential pair in each differential lines；Every a pair of of difference through hole pair is determined according to the attribute of each via hole；Tag line is set between every a pair of of difference through hole pair；Other signal wires are designed according to the tag line.The invention also discloses a kind of computer equipment and readable storage medium storing program for executing.Method disclosed by the invention by every a pair of of difference through hole using tag line before designing other signal wires by highlighting out, it can make PCB design personnel are conscious in wiring process to avoid difference through hole pair, it not only can be to avoid signal because of problems of Signal Integrity caused by wearing difference through hole to signal, it is thus also avoided that whether there is cabling between waste later period, detection plenty of time difference through hole pair caused by careless omission when because of design.
Description
Technical field
The present invention relates to art of printed circuit boards, and in particular to a kind of PCB design method, equipment and storage medium.
Background technique
There are a plurality of PCB design softwares on the market at present, Cadence is not only as the most widely used software of industry
It possesses powerful function and a plurality of related softwares support, also as it provides open second development interface and more
Perfect development language library, user can need to carry out secondary development according to itself.Skill language is built in Cadence software
A kind of high-level programming language based on C language and list processing language, Cadence provides interactive mode abundant for skill language
Function, then authoring tool, investment application can greatly improve working efficiency to research skill language.
Server board is stuck in PCB design phase, has higher want to the quality of board, signal transmission rate and quality
Ask, this mean that technical staff must modelled signal line with great care wiring.It is special as comparison a kind of in high speed signal
Different signal --- differential signal, their always wirings in pairs, and be not allow for other signal wires between difference through hole pair and wear
It crosses.
Other signal wires cannot be worn in PCB design specification between regulation differential lines via hole, and (such as Fig. 1, differential lines via hole have it
He passes through signal wire), wearing other signal wires will affect differential lines signal quality, lead to jitter.It is needed in PCB design
It avoids threading between difference through hole, but in 2 tunnels, 4 up to five or six ten thousand pairs of road server master board differential lines via holes, artificial evacuation
It is not easy, is easy to appear careless omission, the later period checks that carry out modification amount big.
Therefore, the prior art has the following problems: difference through hole all clearly cannot show and be routed in pairs work
Make inefficiency, is easy to thread between difference through hole pair.
Summary of the invention
In view of this, at least one aspect in order to overcome the above problem, the embodiment of the present invention propose a kind of PCB design
Method, comprising steps of
Design differential pair；
Obtain the attribute of each via hole in differential pair in each differential lines；
Every a pair of of difference through hole pair is determined according to the attribute of each via hole；
Tag line is set between every a pair of of difference through hole pair；
Other signal wires are designed according to the tag line.
In some embodiments, other signal wires are designed according to the tag line, further comprise:
When designing other described signal wires, the tag line is avoided.
In some embodiments, the attribute of each via hole in differential pair in each differential lines is obtained, further
Include:
In response to receiving creation instruction, region to be designed is determined according to the creation instruction.
Obtain the differential pair in the region.
In some embodiments, it further comprises the steps of:
Instruction is deleted in response to receiving, according to the region deleted instruction and determine the tag line to be deleted；
Delete the tag line being arranged between every a pair of of difference through hole pair in the region.
In some embodiments, the attribute of each via hole in differential pair in each differential lines is obtained, further
Comprising steps of
Obtain the coordinate of each via hole.
In some embodiments, every a pair of of difference through hole pair is determined according to the attribute of each via hole, further includes:
According to the coordinate of each via hole, each described via hole difference in the wherein differential lines is calculated
With each described via hole in another differential lines between any two at a distance from；
It will be apart from the smallest every a pair of of via hole as difference through hole pair.
In some embodiments, tag line is set between every a pair of of difference through hole pair, further includes:
The initial position of the tag line is determined according to the coordinate of the difference through hole centering each via hole；
According to the initial position, the tag line is set.
In some embodiments, the tag line is arranged according to the initial position, further comprises:
Has the coloured tag line according to initial position setting.
Based on the same inventive concept, according to another aspect of the present invention, the embodiments of the present invention also provide a kind of meters
Calculate machine equipment, comprising:
At least one processor；And
Memory, the memory are stored with the computer program that can be run on the processor, which is characterized in that institute
State the step of executing any PCB design method as described above when processor executes described program.
Based on the same inventive concept, according to another aspect of the present invention, the embodiments of the present invention also provide a kind of meters
Calculation machine readable storage medium storing program for executing, the computer-readable recording medium storage have computer program, and the computer program is processed
The step of any PCB design method as described above is executed when device executes.
The present invention has one of following advantageous effects: using tag line that every a pair is poor before designing other signal wires
Divide via hole to show, can make PCB design personnel are conscious in wiring process to avoid difference through hole pair, it not only can be to avoid letter
Number because of problems of Signal Integrity caused by wearing difference through hole to signal, it is thus also avoided that when later period waste is a large amount of caused by careless omission when because of design
Between detect difference through hole pair between whether there is cabling.PCB design effect is also greatly improved while improving signal quality
Rate saves time and human cost.
Detailed description of the invention
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
Other embodiments are obtained according to these attached drawings.
The schematic diagram that Fig. 1 has other signal wires to pass through between difference through hole pair；
Fig. 2 is a kind of flow diagram for PCB design method that the embodiment of the present invention provides；
Fig. 3 is the schematic diagram for the interactive interface that the embodiment of the present invention provides；
Fig. 4 is the schematic diagram for setting up tag line that the embodiment of the present invention provides；
Fig. 5 is the schematic diagram for a pair of of differential pair that the embodiment of the present invention provides；
Fig. 6 is the structural schematic diagram for the computer equipment that the embodiment of the present invention provides；
Fig. 7 is the structural schematic diagram for the computer readable storage medium that the embodiment of the present invention provides.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
The embodiment of the present invention is further described in attached drawing.
It should be noted that all statements for using " first " and " second " are for differentiation two in the embodiment of the present invention
The non-equal entity of a same names or non-equal parameter, it is seen that " first " " second " only for the convenience of statement, does not answer
It is interpreted as the restriction to the embodiment of the present invention, subsequent embodiment no longer illustrates this one by one.
According to an aspect of the present invention, the embodiment of the present invention proposes a kind of PCB design method, as shown in Fig. 2, it can
Comprising steps of S1, designs differential pair；S2 obtains the attribute of each via hole in differential pair in each differential lines；
S3 determines every a pair of of difference through hole pair according to the attribute of each via hole；S4, between every a pair of of difference through hole pair
Tag line is set；S5 designs other signal wires according to the tag line.
The method that the embodiment of the present invention proposes utilizes mark before designing other signal wires in addition to differential signal line
Line shows every a pair of of difference through hole, can make PCB design personnel are conscious in wiring process to avoid difference through hole pair, no
It only can be to avoid signal because of problems of Signal Integrity caused by wearing difference through hole to signal, it is thus also avoided that after caused by slipping when design
Phase, which wastes, whether there is cabling between plenty of time detection difference through hole pair.
In some embodiments, method proposed by the present invention can also include: in response to receiving creation instruction, according to institute
It states creation instruction and determines region to be designed, after determining region to be designed, then determine the differential pair in the region,
Then step S2-S5 is executed again.
Specifically, user can select corresponding region in interactive interface as shown in Figure 3, and issue the finger of creation
It enables, after background program receives creation instruction, tag line can be set between the difference string holes pair in the corresponding region PCB.
For example, as shown in figure 3, user can choose CPU_1 and CPU_2, after then clicking " Create Guides ", i.e.,
It may be implemented between CPU_1 layers and CPU_2 layers of difference string holes pair and tag line be set.
In some embodiments, the region for setting up tag line can be as shown in Figure 4, it should be noted that every in figure
It is via hole that one has small one and large one two circular marks simultaneously, and two via holes with line are a pair of of difference through hole
It is right, in this way, PCB design personnel can clearly, intuitively obtain often after it tag line will be arranged between every a pair of of difference through hole pair
The position of a pair of of difference through hole pair, the conscious difference through hole pair for avoiding being provided with tag line of meeting in wiring process, in turn
It can be to avoid signal because of problems of Signal Integrity caused by wearing difference through hole to signal.
In some embodiments, method proposed by the present invention can also include: to delete instruction in response to receiving, according to institute
It states and deletes the region that instruction determines the tag line to be deleted；It deletes between every a pair of of difference through hole pair in the region
The tag line being arranged.
Specifically, after the completion of setting up the area routing of tag line, it can be by a pair of difference through hole every in the region
The pre-set tag line is deleted between.
For example, as shown in figure 3, if user wants to delete the CPU_1 layers of mark being arranged between CPU_2 layers of difference string holes pair
Line can choose CPU_1 and CPU_2, and after then clicking " Delete Guides ", deletion can be realized in CPU_1 layers and CPU_
The tag line being arranged between 2 layers of difference string holes pair.
In some embodiments, step S1 may further include the coordinate for obtaining each via hole.Step S2 can
To further comprise being calculated separately described in each in the wherein differential lines according to the coordinate of each via hole
Via hole and each described via hole in another differential lines between any two at a distance from；It will be apart from the smallest every a pair of of via hole
As difference through hole pair.Step S3, which may further include, determines institute according to the coordinate of the difference through hole centering each via hole
State the initial position of tag line；According to the initial position, the tag line is set.
It is described in detail how below with reference to Fig. 5 according to determining difference through hole pair.
Firstly, all differential pairs in obtaining the region of selection, every a pair of differential lines are deposited in as an element
In ordered series of numbers A, ordered series of numbers A is then traversed, the attribute of each element (differential lines) is obtained, obtains the coordinate of via hole in differential lines.
For example, all having multiple via holes on a pair of of differential pair NET1, NET2 shown in Fig. 5, NET1 and NET2, such as scheme
5 show on NET1 there are two via hole VIA_A_1, VIA_B_1, and via hole VIA_A_2, VIA_B_2 there are two NET2 is upper exist certainly
In actual conditions, the quantity of via hole is not limited only to there was only 2 in every differential lines.
Then, the via hole on same NET is placed in an ordered series of numbers, for example, VIA_A_1, VIA_B_1 ... VIA_N_
1 is placed on ordered series of numbers List_A, and VIA_A_2, VIA_B_2 ... VIA_N_2 are placed in ordered series of numbers List_B.It is calculated according to the coordinate of via hole
The distance between via hole in ordered series of numbers List_A and List_B is placed on ordered series of numbers List_C (List_C=for a pair apart from the smallest
List (' (VIA_A_1VIA_A_2) ' (VIA_B_1VIA_B_2) ... ' (VIA_N_1VIA_N_2)) in.
It should be noted that difference through hole shown in Fig. 5 to the distance between A be much smaller than same differential lines in practice
The distance between upper two adjacent via holes D.
Finally, traversal ordered series of numbers List_C can determine difference through hole tag line according to the coordinate of every a pair of of difference through hole pair
Initial position.
In some embodiments, tag line can also be arranged to different colors, such as red, so as to preferably prominent aobvious
Show the position of difference through hole pair.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 6, the embodiment of the present invention also mentions
Supply a kind of computer equipment 501, comprising:
At least one processor 520；And
Memory 510, memory 510 are stored with the computer program 511 that can be run on a processor, and processor 520 is held
The step of any PCB design method as above is executed when line program.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 7, the embodiment of the present invention also mentions
A kind of computer readable storage medium 601 is supplied, computer readable storage medium 601 is stored with computer program instructions 610, meter
The step of any PCB design method as above is executed when calculation machine program instruction 610 is executed by processor.
Finally, it should be noted that those of ordinary skill in the art will appreciate that realizing the whole in above-described embodiment method
Or part process, related hardware can be instructed to complete by computer program, program to can be stored in one computer-readable
It takes in storage medium, the program is when being executed, it may include such as the process of the embodiment of above-mentioned each method.Wherein, storage medium
It can be magnetic disk, CD, read-only memory (ROM) or random access memory (RAM) etc..The implementation of above-mentioned computer program
Example, can achieve the identical or similar effect of corresponding aforementioned any means embodiment.
In addition, typically, device disclosed by the embodiments of the present invention, equipment etc. can be various electric terminal equipments, such as hand
Machine, personal digital assistant (PDA), tablet computer (PAD), smart television etc., are also possible to large-scale terminal device, such as server
Deng, therefore protection scope disclosed by the embodiments of the present invention should not limit as certain certain types of device, equipment.The present invention is implemented
Client disclosed in example, which can be, is applied to any one of the above electricity with the combining form of electronic hardware, computer software or both
In sub- terminal device.
In addition, disclosed method is also implemented as the computer program executed by CPU according to embodiments of the present invention, it should
Computer program may be stored in a computer readable storage medium.When the computer program is executed by CPU, the present invention is executed
The above-mentioned function of being limited in method disclosed in embodiment.
In addition, above method step and system unit also can use controller and for storing so that controller is real
The computer readable storage medium of the computer program of existing above-mentioned steps or Elementary Function is realized.
In addition, it should be appreciated that the computer readable storage medium (for example, memory) of this paper can be volatibility and deposit
Reservoir or nonvolatile memory, or may include both volatile memory and nonvolatile memory.As an example and
Unrestricted, nonvolatile memory may include read-only memory (ROM), programming ROM (PROM), electrically programmable ROM
(EPROM), electrically erasable programmable ROM (EEPROM) or flash memory.Volatile memory may include that arbitrary access is deposited
Reservoir (RAM), the RAM can serve as external cache.As an example and not restrictive, RAM can be with a variety of
Form obtains, such as synchronous random access memory (DRAM), dynamic ram (DRAM), synchronous dram (SDRAM), double data rate SDRAM (DDR
SDRAM), enhance SDRAM (ESDRAM), synchronization link DRAM (SLDRAM) and directly Rambus RAM (DRRAM).Institute is public
The storage equipment for the aspect opened is intended to the memory of including but not limited to these and other suitable type.
Those skilled in the art will also understand is that, various illustrative logical blocks, mould in conjunction with described in disclosure herein
Block, circuit and algorithm steps may be implemented as the combination of electronic hardware, computer software or both.It is hard in order to clearly demonstrate
This interchangeability of part and software, with regard to various exemplary components, square, module, circuit and step function to its into
General description is gone.This function is implemented as software and is also implemented as hardware depending on concrete application and application
To the design constraint of whole system.The function that those skilled in the art can realize in various ways for every kind of concrete application
Can, but this realization decision should not be interpreted as causing a departure from range disclosed by the embodiments of the present invention.
Various illustrative logical blocks, module and circuit, which can use, in conjunction with described in disclosure herein is designed to
The following component of function here is executed to realize or execute: general processor, digital signal processor (DSP), dedicated integrated electricity
It is road (ASIC), field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete
Any combination of hardware component or these components.General processor can be microprocessor, but alternatively, processor can
To be any conventional processors, controller, microcontroller or state machine.Processor also may be implemented as calculating the group of equipment
Close, for example, the combination of DSP and microprocessor, multi-microprocessor, one or more microprocessors combination DSP and/or it is any its
Its this configuration.
The step of method in conjunction with described in disclosure herein or algorithm, can be directly contained in hardware, be held by processor
In capable software module or in combination of the two.Software module may reside within RAM memory, flash memory, ROM storage
Device, eprom memory, eeprom memory, register, hard disk, removable disk, CD-ROM or known in the art it is any its
In the storage medium of its form.Illustrative storage medium is coupled to processor, enables a processor to from the storage medium
Information is written to the storage medium in middle reading information.In an alternative, storage medium can be integral to the processor
Together.Pocessor and storage media may reside in ASIC.ASIC may reside in user terminal.In an alternative
In, it is resident in the user terminal that pocessor and storage media can be used as discrete assembly.
In one or more exemplary designs, function can be realized in hardware, software, firmware or any combination thereof.
If realized in software, can using function as one or more instruction or code may be stored on the computer-readable medium or
It is transmitted by computer-readable medium.Computer-readable medium includes computer storage media and communication media, which is situated between
Matter includes any medium for helping for computer program to be transmitted to another position from a position.Storage medium can be energy
Any usable medium being enough accessed by a general purpose or special purpose computer.As an example and not restrictive, the computer-readable medium
It may include that RAM, ROM, EEPROM, CD-ROM or other optical disc memory apparatus, disk storage equipment or other magnetic storages are set
It is standby, or can be used for carrying or storage form be instruct or the required program code of data structure and can by general or
Special purpose computer or any other medium of general or specialized processor access.In addition, any connection can suitably claim
For computer-readable medium.For example, if using coaxial cable, optical fiber cable, twisted pair, digital subscriber line (DSL) or all
It is if the wireless technology of infrared ray, radio and microwave to send software from website, server or other remote sources, then above-mentioned coaxial
Cable, fiber optic cable, twisted pair, DSL or such as wireless technology of infrared ray, radio and microwave are included in determining for medium
Justice.As used herein, disk and CD include compact disk (CD), it is laser disk, CD, digital versatile disc (DVD), soft
Disk, Blu-ray disc, wherein disk usually magnetically reproduce data, and CD using laser optics reproduce data.Above content
Combination should also be as being included in the range of computer-readable medium.
It is exemplary embodiment disclosed by the invention above, it should be noted that in the sheet limited without departing substantially from claim
Under the premise of inventive embodiments scope of disclosure, it may be many modifications and modify.According to open embodiment described herein
The function of claim to a method, step and/or movement be not required to the execution of any particular order.In addition, although the present invention is implemented
Element disclosed in example can be described or be required in the form of individual, but be unless explicitly limited odd number, it is understood that be multiple.
It should be understood that it is used in the present context, unless the context clearly supports exceptions, singular " one
It is a " it is intended to also include plural form.It is to be further understood that "and/or" used herein refers to including one or one
Any and all possible combinations of a above project listed in association.
It is for illustration only that the embodiments of the present invention disclose embodiment sequence number, does not represent the advantages or disadvantages of the embodiments.
Those of ordinary skill in the art will appreciate that realizing that all or part of the steps of above-described embodiment can pass through hardware
Complete, relevant hardware can also be instructed to complete by program, program can store in a kind of computer-readable storage
In medium, storage medium mentioned above can be read-only memory, disk or CD etc..
It should be understood by those ordinary skilled in the art that: the discussion of any of the above embodiment is exemplary only, not
It is intended to imply that range disclosed by the embodiments of the present invention (including claim) is limited to these examples；In the think of of the embodiment of the present invention
Under road, it can also be combined between the technical characteristic in above embodiments or different embodiments, and there is this hair as above
Many other variations of the different aspect of bright embodiment, for simplicity, they are not provided in details.Therefore, all in the present invention
Within the spirit and principle of embodiment, any omission, modification, equivalent replacement, improvement for being made etc. be should be included in of the invention real
It applies within the protection scope of example.
Claims (10)
1. a kind of PCB design method, comprising steps of
Design differential pair；
Obtain the attribute of each via hole in differential pair in each differential lines；
Every a pair of of difference through hole pair is determined according to the attribute of each via hole；
Tag line is set between every a pair of of difference through hole pair；
Other signal wires are designed according to the tag line.
2. the method as described in claim 1, which is characterized in that design other signal wires according to the tag line, further wrap
It includes:
When designing other described signal wires, the tag line is avoided.
3. the method as described in claim 1, which is characterized in that obtain each mistake in differential pair in each differential lines
The attribute in hole further comprises:
In response to receiving creation instruction, region to be designed is determined according to the creation instruction.
Obtain the differential pair in the region.
4. the method as described in claim 1, which is characterized in that further comprise the steps of:
Instruction is deleted in response to receiving, according to the region deleted instruction and determine the tag line to be deleted；
Delete the tag line being arranged between every a pair of of difference through hole pair in the region.
5. the method as described in claim 1, which is characterized in that obtain each mistake in differential pair in each differential lines
The attribute in hole, further comprises step:
Obtain the coordinate of each via hole.
6. method as claimed in claim 5, which is characterized in that determine every a pair of of difference according to the attribute of each via hole
Via hole pair, further includes:
According to the coordinate of each via hole, each described via hole in the wherein differential lines is calculated respectively and separately
Each distance of the via hole between any two in one differential lines；
It will be apart from the smallest every a pair of of via hole as difference through hole pair.
7. method as claimed in claim 5, which is characterized in that tag line is set between every a pair of of difference through hole pair,
Further include:
The initial position of the tag line is determined according to the coordinate of the difference through hole centering each via hole；
According to the initial position, the tag line is set.
8. the method for claim 7, which is characterized in that the tag line is arranged according to the initial position, further
Include:
Has the coloured tag line according to initial position setting.
9. a kind of computer equipment, comprising:
At least one processor；And
Memory, the memory are stored with the computer program that can be run on the processor, which is characterized in that the place
Manage the method executed as described in claim 1-8 any one when device executes described program.
10. a kind of computer readable storage medium, the computer-readable recording medium storage has computer program, and feature exists
In perform claim requires method described in 1-8 any one when the computer program is executed by processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910731055.2A CN110502811A (en) | 2019-08-08 | 2019-08-08 | A kind of PCB design method, equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910731055.2A CN110502811A (en) | 2019-08-08 | 2019-08-08 | A kind of PCB design method, equipment and storage medium |
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| Publication Number | Publication Date |
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| CN110502811A true CN110502811A (en) | 2019-11-26 |
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| CN201910731055.2A Withdrawn CN110502811A (en) | 2019-08-08 | 2019-08-08 | A kind of PCB design method, equipment and storage medium |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111291527A (en) * | 2020-01-15 | 2020-06-16 | 苏州浪潮智能科技有限公司 | Differential line spacing checking method, device, equipment and storage medium |
| CN112235949A (en) * | 2020-10-16 | 2021-01-15 | 苏州浪潮智能科技有限公司 | Method, device and equipment for digging differential via hole in printed circuit board design |
| CN114462351A (en) * | 2021-12-28 | 2022-05-10 | 中科可控信息产业有限公司 | Signal routing detection method, device, equipment, storage medium and program product |
-
2019
- 2019-08-08 CN CN201910731055.2A patent/CN110502811A/en not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111291527A (en) * | 2020-01-15 | 2020-06-16 | 苏州浪潮智能科技有限公司 | Differential line spacing checking method, device, equipment and storage medium |
| CN111291527B (en) * | 2020-01-15 | 2022-06-21 | 苏州浪潮智能科技有限公司 | Differential line spacing checking method, device, equipment and storage medium |
| CN112235949A (en) * | 2020-10-16 | 2021-01-15 | 苏州浪潮智能科技有限公司 | Method, device and equipment for digging differential via hole in printed circuit board design |
| CN114462351A (en) * | 2021-12-28 | 2022-05-10 | 中科可控信息产业有限公司 | Signal routing detection method, device, equipment, storage medium and program product |
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Application publication date: 20191126 |