CN110492757A - A kind of back-to-back converter controller - Google Patents
A kind of back-to-back converter controller Download PDFInfo
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- CN110492757A CN110492757A CN201910744513.6A CN201910744513A CN110492757A CN 110492757 A CN110492757 A CN 110492757A CN 201910744513 A CN201910744513 A CN 201910744513A CN 110492757 A CN110492757 A CN 110492757A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
- H02M5/40—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc
- H02M5/42—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters
- H02M5/44—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac
- H02M5/453—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal
- H02M5/458—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M5/4585—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases with intermediate conversion into dc by static converters using discharge tubes or semiconductor devices to convert the intermediate dc into ac using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only having a rectifier with controlled elements
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- Dc-Dc Converters (AREA)
Abstract
The present invention relates to a kind of back-to-back converter controllers, including current sampling unit, voltage on line side sampling unit, DC voltage sampling unit, PWM control unit, current inner loop control unit, outer voltage control unit and phaselocked loop, the current sampling unit is connect with current inner loop control unit, the voltage on line side sampling unit is connect by phaselocked loop with current inner loop control unit, current inner loop control unit is connect by outer voltage control unit with PWM control unit, DC voltage sampling unit is connect with outer voltage control unit, the controller carries back-to-back converter Controlling model, the controller is FPGA controller.Compared with prior art, it is based on FPGA, ensure that the accuracy, real-time and robustness of controller.
Description
Technical field
The present invention relates to field of power electronics, more particularly, to a kind of back-to-back converter controller.
Background technique
In recent years, energy shortages and industrial load diversification, so that the back characterized by wholly-controled device and PWM technology
Backrest voltage converter has obtained extensive concern with new energy field in energy conservation.Current transformer mostly uses DSP conduct at present
Controller, control strategy are divided into current indirect control and Direct Current Control according to whether introducing current feedback, become to back-to-back
Flow device control strategy research focus mostly on PWM (pulsewidth modulation) technically, now mostly use key player on a team's pulsewidth modulation (SPWM),
Space vector pulse width modulation (SVPWM) two methods.
There is such as harmonic wave interference, SPA sudden phase anomalies, Voltage unbalance disturbance in power grid, disturbing has randomness, at any time shadow
Ring current transformer output performance, it is therefore desirable to which controller has the ability of real-time monitoring, but traditional DSP controller is mostly not
Have performance adjusting function, and the design difficulty of conventional method is larger, realizes that effect is also undesirable.
Summary of the invention
It is an object of the present invention to overcome the above-mentioned drawbacks of the prior art and provide a kind of back-to-back converters
Controller.
The purpose of the present invention can be achieved through the following technical solutions:
A kind of back-to-back converter controller, including current sampling unit, voltage on line side sampling unit, DC voltage
Sampling unit, PWM control unit, current inner loop control unit, outer voltage control unit and phaselocked loop, the current sample
Unit is connect with current inner loop control unit, and the voltage on line side sampling unit passes through phaselocked loop and current inner loop control unit
Connection, current inner loop control unit is connect by outer voltage control unit with PWM control unit, DC voltage sampling is single
Member is connect with outer voltage control unit, which carries back-to-back converter Controlling model, which is FPGA control
Device.
Obtain the back-to-back converter Controlling model the following steps are included:
Step S1: power layer modeling is carried out to back-to-back converter net side, obtains net side power layer model;
Step S2: pi regulator parameter K is obtainedpi;
Step S3: it is based on pi regulator parameter KpiPhaselocked loop is modeled with net side power layer model, obtains phaselocked loop
Model;
Step S4: it is based on locking phase ring model, in conjunction with pi regulator matrix Gpi, PWM delay matrixWith duty ratio with
Modulation voltage transfer function matrix GdcObtain net side impedance model;
Step S5: two close cycles back-to-back converter Controlling model is obtained based on net side impedance model.
The back-to-back converter net side power layer model are as follows:
Wherein, ZR1、ZR2For the equivalent impedance of back-to-back converter net side, ZL1、ZL2For back-to-back converter net side inductance
Equivalent impedance, E be current transformer exit potential vector, UcFor filter capacitor voltage vector, U is point of common coupling voltage vector,
IiFor back-to-back converter net side input current vector, IcFor filter capacitor current vector, IoIt is defeated for back-to-back converter net side
Current vector out.
The transmission function of the locking phase ring modelAre as follows:
Wherein, u'dFor point of common coupling voltage rotation phase angle be θ d-q coordinate system under d axis component,For locking phase
Ring model q axis equivalent voltage input vector.
The back-to-back converter net side impedance model are as follows:
Wherein,For net side equivalent voltage vector,For net side equivalent current vector.
The G1Are as follows:
Wherein,Influence for locking phase ring model to current on line side signal,It is locking phase ring model to duty ratio
It influences, I is T when not considering phaselocked loop dynamicΔθ, YcFor dc-link capacitance equivalent admittance.
The G2Are as follows:
The inner ring transmission function Φ (s) of the two close cycles back-to-back converter Controlling model are as follows:
Wherein, TcFor PWM switch periods, KpFor pi regulator parameter KpiProportionality coefficient, L be back-to-back converter net
Side outlet side inductance.
The outer ring transmission function U of the two close cycles back-to-back converter Controlling modeldc(s) are as follows:
Udc(s)=ΦR(s)Udcref-ΦN(s)idref
Wherein, idrefFor inner ring reference current, UdcrefFor outer ring reference voltage, T is PWM delay, and C is DC bus electricity
Hold.
Compared with prior art, the invention has the following advantages that
(1) it is based on FPGA, ensure that the accuracy, real-time and robustness of controller.
(2) FPGA carries two close cycles back-to-back converter Controlling model, overcomes traditional dsp controller and does not have mostly
Standby performance adjusting function, can solve and there is such as harmonic wave interference, SPA sudden phase anomalies, Voltage unbalance perturbed problem in power grid.
(3) controller of FPGA is easy to use, can adjust control parameter in real time on the front panel, has extraordinary
Practical value.
Detailed description of the invention
Fig. 1 is two close cycles back-to-back converter model structure schematic diagram of the invention;
Fig. 2 is back-to-back converter topological structure schematic diagram of the invention;
Fig. 3 is net side converter topologies schematic diagram under d-q coordinate system of the invention;
Fig. 4 is phaselocked loop model structure schematic diagram of the invention;
Fig. 5 is grid-side converter small signal mathematical model structural schematic diagram of the invention;
Fig. 6 is current inner loop controller schematic diagram of the invention;
Fig. 7 is current inner loop transmission function block diagram of the invention;
Fig. 8 is outer voltage transmission function block diagram of the invention;
Fig. 9 is back-to-back converter control parameter figure of the invention.
Specific embodiment
The present invention is described in detail with specific embodiment below in conjunction with the accompanying drawings.The present embodiment is with the technology of the present invention side
Implemented premised on case, the detailed implementation method and specific operation process are given, but protection scope of the present invention is unlimited
In following embodiments.
Embodiment
The present embodiment provides a kind of back-to-back converter controller, including the sampling of current sampling unit, voltage on line side are single
Member, DC voltage sampling unit, PWM control unit, current inner loop control unit, outer voltage control unit and phaselocked loop,
The current sampling unit is connect with current inner loop control unit, and the voltage on line side sampling unit passes through phaselocked loop and electric current
The connection of inner loop control unit, current inner loop control unit connect by outer voltage control unit with PWM control unit, direct current
Side voltage sampling unit is connect with outer voltage control unit, which carries back-to-back converter Controlling model, the control
Device is FPGA controller.
The process for obtaining back-to-back converter Controlling model is as follows:
I, the present embodiment first carries out Working state analysis to the three-phase voltage source type back-to-back converter topological diagram of Fig. 2, with
It is analyzed for grid-side converter.Control system is closed using DC bus-bar voltage outer ring and grid-side converter current inner loop
Ring control structure builds control framework under d-q coordinate system, and PLL (phaselocked loop) guarantees rotation phase angle.
II, to grid-side converter carry out small signal impedance modeling, according to resistance, capacitor, inductance frequency domain impedance-admittance square
Battle array, by under the grid-side converter outlet side circuit topology to d-q coordinate system in Fig. 2, as shown in Figure 3.R in figure1、R2For net side change
Flow device inductance L1、L2Equivalent resistance, E be current transformer exit potential vector, UcFor filter capacitor voltage vector, U is public coupling
Chalaza voltage vector, IiFor current transformer outlet side current vector, IcFor filter capacitor current vector, IoElectric current is exported for grid side
Vector.Voltage and current is expressed as vector form:
Current transformer power layer is modeled according to Fig. 3:
Wherein, ZL1、ZL2For the equivalent impedance of back-to-back converter net side, ZR1、ZR2For back-to-back converter net side inductance
Equivalent impedance.
Then phaselocked loop is modeled, phaselocked loop can realize required phase angle theta in current transformer control loop ' to public company
The dynamically track of junction voltage phase angle theta, dynamic model such as Fig. 4 of PLL under phaselocked loop d-q coordinate system.One is added in systems
Small interference signal enables θ and θ ' there are dynamic phase angle difference Δ θ=θ-θ ', enables u'd、u'qAnd u "d、u”qFor point of common coupling voltage
D, q axis component under the d-q coordinate system that rotation phase angle is respectively θ and θ ', the two spin matrix relationship are as follows:
Control ring output and power layer variable relation, U is voltage signal, and I is current signal, and d is duty ratio:
Wherein,For d, q axis component of the point of common coupling in the case where revolving steering angle θ,For public affairs
D, q axis component of the Coupling point in the case where revolving steering angle θ ' altogether.
By by the T in Fig. 4ΔθLinearisation obtains the transmission function of PLL are as follows:
Wherein, u'dFor d axis component of the point of common coupling voltage under the d-q coordinate system that rotation phase angle is θ, KpiFor PI tune
Save device parameter, u'qFor q axis component of the point of common coupling voltage under the d-q coordinate system that rotation phase angle is θ.
The impedance model of grid-side converter is finally built, grid-side converter is in the case where considering the dynamic situation of PLL, mathematical modulo
Type is as shown in Figure 5.In figureInfluence for PLL to current signal and duty cycle signals:
Electric current pi regulator matrix Gpi, PWM delay matrix Gd_PWM, duty ratio and modulation voltage transfer function matrix Gdc
Are as follows:
Wherein, KpAnd KiFor the proportionality coefficient and integral coefficient of pi regulator, TdelFor delay unit.
Finally obtained grid-side converter impedance model:
Wherein,For net side equivalent voltage vector,For net side equivalent current vector, I is when not considering phaselocked loop dynamic
TΔθ, YcFor dc-link capacitance equivalent admittance.
When III, back-to-back converter are interconnected for AC system, control target is to realize active power and idle function
Rate it is separately adjustable.By the mathematics model analysis to current transformer, the current inner loop outer voltage of Direct Current Control is designed
Double-closed-loop control device, controller architecture are as shown in Figure 1.First design current inner loop control device, d, q shaft current are in addition to receiving exchange
D, q axis component influence for surveying output voltage are outer, are also influenced by current cross decoupling and network voltage, disturb, adopt to eliminate
With feed forward decoupling control, current regulator uses pi regulator, obtains current inner loop controller such as Fig. 6.Electricity is added in controller
Sampling time delay and PWM time delay process are flowed, taking the delay time of PWM is half of switch periods, and current sample delay and PWM are prolonged
Slow link merges, and since switching frequency is generally higher, ignores s2, it is approximately first order inertial loop time delay process, obtains Fig. 7
Current inner loop controller transmission function block diagram, T in figurecFor PWM switch periods.Open-loop transfer function can be obtained are as follows:
In formula:L is net side outlet side inductance, and R is that net side exports side resistance, and T is PWM delay.
As can be seen that this is the three rank control systems for having zero point, can quickly be rung since current inner loop control needs
The follow-up capability answered needs to carry out depression of order processing to system.
T=L/R is enabled, closed loop transfer function, is obtained are as follows:
In formula:
Then design voltage outer ring controller, when considering the delay of outer voltage voltage signal sampling, control law is as follows:
Outer voltage controller transfer function block diagram is as shown in figure 8, obtain outer voltage controller closed loop transfer function,
Are as follows:
Udc(s)=ΦR(s)Udcref-ΦN(s)idref
Wherein, idrefFor inner ring given value of current value, UdcrefFor outer loop voltag given value, UdcFor DC bus-bar voltage, C is
Dc-link capacitance.
IV, the advantage using hardware concurrent, FPGA have broken the mode that sequence executes, have completed within each clock cycle
More processing tasks, have surmounted the operational capability of digital signal processor (DSP).FPGA completes packet in this controller
Include three-phase phase-locked loop, A/D controller and pwm pulse etc..The present embodiment selects the sbRIO-9607 Series FPGA of NI company, should
Series FPGA can be used with the LabVIEW of mating NI, can be patterned programming, and daily exploitation is suitble to use, and build net side change
Device impedance model LabVIEW program is flowed, current transformer control parameter is as shown in Figure 9.
Claims (9)
1. a kind of back-to-back converter controller, which is characterized in that including current sampling unit, voltage on line side sampling unit, straight
Flow side voltage sampling unit, PWM control unit, current inner loop control unit, outer voltage control unit and phaselocked loop, the electricity
Stream sampling unit is connect with current inner loop control unit, and the voltage on line side sampling unit passes through phaselocked loop and current inner loop control
Unit connection, current inner loop control unit is connect by outer voltage control unit with PWM control unit, DC voltage samples
Unit is connect with outer voltage control unit, which carries back-to-back converter Controlling model, which is FPGA control
Device processed.
2. a kind of back-to-back converter controller according to claim 1, which is characterized in that obtain the back-to-back change
Flow device Controlling model the following steps are included:
Step S1: power layer modeling is carried out to back-to-back converter net side, obtains net side power layer model;
Step S2: pi regulator parameter K is obtainedpi;
Step S3: it is based on pi regulator parameter KpiPhaselocked loop is modeled with net side power layer model, obtains locking phase ring model;
Step S4: it is based on locking phase ring model, in conjunction with pi regulator matrix Gpi, PWM delay matrix GdPWMWith duty ratio and modulation electricity
Press transfer function matrix GdcObtain net side impedance model;
Step S5: two close cycles back-to-back converter Controlling model is obtained based on net side impedance model.
3. a kind of back-to-back converter controller according to claim 2, which is characterized in that the back-to-back converter
Net side power layer model are as follows:
Wherein, ZR1、ZR2For back-to-back converter net side equivalent impedance, ZL1、ZL2For the equivalent resistance of back-to-back converter net side inductance
Anti-, E is current transformer exit potential vector, UcFor filter capacitor voltage vector, U is point of common coupling voltage vector, IiIt is back-to-back
Current transformer net side input current vector, IcFor filter capacitor current vector, IoCurrent vector is exported for back-to-back converter net side.
4. a kind of back-to-back converter controller according to claim 1, which is characterized in that the biography of the locking phase ring model
Delivery functionAre as follows:
Wherein, u'dFor point of common coupling voltage rotation phase angle be θ d-q coordinate system under d axis component,For locking phase ring moulds
Type q axis equivalent voltage input vector.
5. a kind of back-to-back converter controller according to claim 1, which is characterized in that the back-to-back converter
Net side impedance model are as follows:
Wherein,For back-to-back converter net side equivalent voltage vector,For net side equivalent current vector.
6. a kind of back-to-back converter controller according to claim 5, which is characterized in that the G1Are as follows:
Wherein,Influence for locking phase ring model to current on line side signal,Influence for locking phase ring model to duty ratio, I
Not consider T when phaselocked loop dynamicΔθ, YcFor dc-link capacitance equivalent admittance.
7. a kind of back-to-back converter controller according to claim 5, which is characterized in that the G2Are as follows:
8. a kind of back-to-back converter controller according to claim 5, which is characterized in that the two close cycles are back-to-back
The inner ring transmission function Φ (s) of current transformer Controlling model are as follows:
Wherein, TcFor PWM switch periods, KpFor pi regulator parameter KpiProportionality coefficient, L be back-to-back converter net side output
Side inductance.
9. a kind of back-to-back converter controller according to claim 5, which is characterized in that the two close cycles are back-to-back
The outer ring transmission function U of current transformer Controlling modeldc(s) are as follows:
Udc(s)=ΦR(s)Udcref-ΦN(s)idref
Wherein, idrefFor inner ring reference current, UdcrefFor outer ring reference voltage, T is PWM delay, and C is dc-link capacitance.
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011032265A1 (en) * | 2009-09-15 | 2011-03-24 | The University Of Western Ontario | Utilization of distributed generator inverters as statcom |
EP2369725A1 (en) * | 2010-03-25 | 2011-09-28 | ABB Schweiz AG | Short circuiting unit |
CN102223094A (en) * | 2010-04-16 | 2011-10-19 | 通用电气公司 | Power conversion system and LC circuit damping method |
CN109888776A (en) * | 2019-03-12 | 2019-06-14 | 深圳大学 | For the prediction technique and terminal device of direct-driving type wind power plant subsynchronous resonance frequency |
CN109980657A (en) * | 2018-12-20 | 2019-07-05 | 国网浙江省电力有限公司经济技术研究院 | Reactive power outer ring is determined to the analysis method of current transformer grid-connected system stability influence |
-
2019
- 2019-08-13 CN CN201910744513.6A patent/CN110492757B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011032265A1 (en) * | 2009-09-15 | 2011-03-24 | The University Of Western Ontario | Utilization of distributed generator inverters as statcom |
EP2369725A1 (en) * | 2010-03-25 | 2011-09-28 | ABB Schweiz AG | Short circuiting unit |
CN102223094A (en) * | 2010-04-16 | 2011-10-19 | 通用电气公司 | Power conversion system and LC circuit damping method |
CN109980657A (en) * | 2018-12-20 | 2019-07-05 | 国网浙江省电力有限公司经济技术研究院 | Reactive power outer ring is determined to the analysis method of current transformer grid-connected system stability influence |
CN109888776A (en) * | 2019-03-12 | 2019-06-14 | 深圳大学 | For the prediction technique and terminal device of direct-driving type wind power plant subsynchronous resonance frequency |
Non-Patent Citations (2)
Title |
---|
费可 等: "基于改进比例谐振控制器的电网模拟器参数设计", 《科技经济导刊》 * |
邹武俊等: "基于FPGA的双馈风力发电机变频器实时仿真", 《电力电子技术》 * |
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