CN1104789A

CN1104789A - Synchronous controller for data acquisition

Info

Publication number: CN1104789A
Application number: CN 94103882
Authority: CN
Inventors: 李国恩; 周福安; 丁天宝
Original assignee: Inst No202 Ministry Of Ordance Industry; Inst No202 Ministry Of Ordanace Industry
Current assignee: Inst No202 Ministry Of Ordance Industry; Inst No202 Ministry Of Ordanace Industry
Priority date: 1994-03-30
Filing date: 1994-03-30
Publication date: 1995-07-05

Abstract

The synchronous controller for data acquisition is composed of main control board of host and auessary card, both of which are connected with each other through communication cable. The main control board comprises single-chip processor, program memory, latch, clock generator, signal driver, external synchronous input port and printer controller. The auessary card consists of single-chip processor, program memory, latch, bus transceiver, synchronous clock receiver chip, output driver and address selection circuit and interupt selection circuit.

Description

Synchronous controller for data acquisition

The invention belongs to a kind of equipment that is controlled at synchronization admission several data, is a kind of synchronous controller for data acquisition specifically.

That synchronous acquisition is widely used in is civilian, industry and military field.At present, the collection of many occasion lot of data is all finished by computer control, at the data acquisition synchronization aspects, there is the similar data collection plate in other developed country such as the U.S., it can realize the synchronous acquisition of four tunnel simulating signals on same block of plate, as for the accurate synchronous acquisition that adopts alternate manner (comprising traffic pilot etc.) to realize, its synchronization accuracy all can not be suitable in the occasion of having relatively high expectations, the synchronous acquisition plate of above-mentioned import is also imposed embargo to China.

The object of the present invention is to provide a kind of synchronous controller for data acquisition that can use in various occasions, to solve the data acquisition stationary problem.

The present invention is achieved in that it is to be made of main frame main control board and accessory card circuit board, and main frame master control electroplax is linked to each other by telecommunication cable with the accessory card circuit board; The main frame governor circuit is by single-chip microcomputer 8031, memory under program 27512, and latch 74LS373, clock generator MM58167, signal driver 75174,75175, outer input interface circuit synchronously and printer control chip 8741 constitute; Outer input interface circuit synchronously is that 4 photoelectricity isolated tubes and 2 singlet trigger 74LS221 constitute, outer input synchronously and inter-sync are connected on the 74LS221B pin, markers output is connected on 8031 TXD pin and 75175 the 3rd pin, 27512,74LS373, MM58164 and 8031 data port connect onboard on the data bus, its address wire all connects onboard on the address bus, and other control line is connected on the corresponding pin.The accessory card circuit is by single-chip microcomputer 8031, memory under program 2764, and latch 74LS373, bus transceiver 8282, synchronous time mark receives 75175, and output drives 74LS365 and addressing circuit, interrupts selecting K3, K2 to constitute; Addressing circuit is by 74LS688, and K switch 1 is formed.The markers receiving end connects 8031 serial port RXD pin onboard; The sheet that P=Q of 74LS688 is connected on bus transceiver 8282 selects on the OE pin; 8031 INT1 pin is connected on 75175 3 pin and 74LS365 the 12nd pin; 8282,2764,74LS373 and 8031 data port connect on onboard the data bus, its address wire all connects onboard on the address bus; Other control line is connected on the respective pin.

The present invention is work like this, pre-designed program write 8031 memory under program, the accessory card circuit board inserts in the dead slot of controlled computer or controlled instrument, stir address selection switch K1 and interrupt selector switch K2, K3, come the address wire and the interrupt request line of adaptive controlled computer or controlled instrument.When main frame sends synchronizing pulse, also send the sequence number and the absolute time mark of corresponding this pulse, the pulse sequence number is produced by single-chip microcomputer 8031, and absolute time mark is produced by clock generator; Synchronizing pulse is transferred on each accessory card circuit board, after carrying out synchronizing pulse and absolute time mark separates by accessory card, synchronizing pulse is guided on each collecting circuit board, all have on every group of collecting computer like this (or each) data a sequence number and the time scale value so that carry out data correlation process.

The present invention has been owing to adopted " main frame+accessory card " form, and institute is so that synchronizing signal can centralized control, and transmission range is far away; In addition, all add absolute time scale value and sequence number on the data that each synchronizing pulse of the present invention is gathered, be convenient to carry out data correlation process like this.International standard (PC bus) has been adopted in the external bus design, is convenient to like this cooperate with PC bus type computing machine or instrument and equipment.

Accompanying drawing one is a functional-block diagram of the present invention.

Accompanying drawing two is main frame main control board figure of the present invention.

Accompanying drawing three is accessory card circuit board figure of the present invention.

Now in conjunction with the accompanying drawings embodiments of the invention are described further:

The main frame governor circuit is by single-chip microcomputer 8031, memory under program 27512, latch 74LS373, clock generator MM58167, signal driver 75174,75175, outer input interface circuit synchronously is that 4 photoelectricity isolated tubes and 2 monostalbe trigger 74LS221 constitute, and the printer control chip is 8741; Signal driver 75174,75175 is connected on 8031 10,11 pin, on outer input interface circuit 74LS221 synchronously is connected on 8031 1,13 mouthful; Printer control chip 8741 is connected on 8031; Clock generator MM58167, memory under program 27512, latch 74LS373 are all linked to each other with single-chip microcomputer 8031 by address bus; The accessory card circuit board is by single-chip microcomputer 8031, memory under program 2764, latch 74LS373, bus transceiver 8282, synchronous time mark receives 75175, output driver 74LS365, address selection 74LS688 and K switch 1, resistance row R1 constitute, and interrupting selecting is to be made of K2, K3; Output driver 74LS365 links to each other with data sampling plate trigger circuit in the controlled computer, and bus transceiver links to each other with the bus of controlled computer; The main frame governor circuit is linked to each other by communication cable with the accessory card circuit board.

Claims

1, a kind of synchronous controller for data acquisition, it is characterized in that it is to be made of main frame governor circuit and accessory card circuit board, the main frame governor circuit is to be made of single-chip microcomputer, memory under program, latch, clock generator, signal driver, outer input interface synchronously and printer control electrical chip; The accessory card circuit board is by single-chip microcomputer, memory under program, latch, bus transceiver, synchronous time mark receiver, and output driver and addressing circuit interrupt selecting circuit to constitute; The main frame governor circuit is linked to each other by communication cable with the accessory card circuit board.

2, synchronous controller for data acquisition as claimed in claim 1, the single-chip microcomputer that it is characterized in that described main frame governor circuit is 8031, memory under program is 27512, latch is 74LS373, clock generator is MM58167, signal driver is 75174,75175, and outer input interface synchronously is 4 photoelectricity isolated tubes and two 74LS221 monostalbe triggers, and the printer control chip is 8741; Outer input synchronously and inter-sync connect the 74LS221B pin; Markers output is connected on 8031 TXD pin; 27512,74LS373, MM58164 and 8031 data port are connected on the data bus, and its address wire all is connected on the address bus, and other control line is connected on the corresponding pin.

3, as claim 1,2 described synchronous controller for data acquisition, it is characterized in that the single-chip microcomputer on the described accessory card circuit board is 8031, memory under program is 2764, latch 74LS373, bus transceiver 8282, synchronous time mark receiver are 75175, and output driver is 74LS365, addressing circuit is to be made of 74LS688 and K switch 1, resistance row R1, and interrupting selecting is to be made of two K switch 2, K3; Synchronous time mark receives the serial port RXD pin of termination 8031; The sheet of 74LS688 P=Q termination bus transceiver 8282 selects the OE pin, and 8031 INT1 pin is connected on 3 pin of synchronous time mark receiving chip 75175 and 12 pin of 74LS365 respectively; 8282,2764,74LS373 and 8031 data port connect onboard on the data bus, its address wire connects onboard on the address bus; Other control line is connected on the respective pin.