CN110474522B - I-shaped multi-level analog driving circuit and soft turn-off circuit thereof - Google Patents
I-shaped multi-level analog driving circuit and soft turn-off circuit thereof Download PDFInfo
- Publication number
- CN110474522B CN110474522B CN201910763399.1A CN201910763399A CN110474522B CN 110474522 B CN110474522 B CN 110474522B CN 201910763399 A CN201910763399 A CN 201910763399A CN 110474522 B CN110474522 B CN 110474522B
- Authority
- CN
- China
- Prior art keywords
- circuit
- turn
- voltage
- branch
- shaped multi
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
- H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
Abstract
After a core driving module of the I-shaped multi-level analog driving circuit outputs a turn-off driving signal and controls the initial turn-off branch to be switched in, the control circuit controls each progressive turn-off branch to be switched in sequence by outputting a corresponding driving signal; because each progressive turn-off branch and the initial turn-off branch are connected in parallel between the turn-off power supply and the input end of the gate drive module of the I-shaped multi-level analog drive circuit, the more turn-on turn-off branches, the smaller the equivalent resistance obtained by parallel connection; and each progressive turn-off branch is switched in sequence, so that equivalent resistance obtained by parallel connection is gradually reduced, and further analog multiple turn-off of the I-shaped multi-level topology controlled semiconductor is realized.
Description
Technical Field
The invention relates to the technical field of automatic control, in particular to an I-shaped multi-level analog driving circuit and a soft turn-off circuit thereof.
Background
Because of the limitation of the voltage stress of the semiconductor device, an I-shaped multi-level topology is generally adopted on occasions with higher direct-current bus voltage; in such a circuit topology, the semiconductor device is often subjected to high voltage stress, and if the control is not proper, the damage to the module in which the semiconductor device is located is very likely to be caused.
In order to avoid the above problem, for such a topology, a multiple turn-off technique may be adopted, that is, the semiconductor device is controlled to reduce the voltage stress by soft turn-off; however, in the prior art, the multiple turn-off technology can only be realized by digital chip control, and the above digital multiple turn-off technology cannot be transplanted by the conventional analog driving method.
Disclosure of Invention
The invention provides an I-shaped multi-level analog driving circuit and a soft turn-off circuit thereof, and provides an analog multi-turn-off technology for I-shaped multi-level topology.
In order to achieve the purpose, the technical scheme provided by the application is as follows:
one aspect of the present invention provides a soft shutdown circuit of an I-shaped multilevel analog driving circuit, comprising: the device comprises a control circuit, an initial turn-off branch and a plurality of progressive turn-off branches; wherein:
the initial turn-off branch circuit and each progressive turn-off branch circuit are connected in parallel, one connecting point in parallel connection is connected with the input end of a gate pole driving module of the I-shaped multi-level analog driving circuit, and the other connecting point in parallel connection is connected with a turn-off power supply;
the control end of the initial turn-off branch circuit is connected with the output end of a core driving module of the I-shaped multi-level analog driving circuit;
the control ends of the progressive turn-off branches are correspondingly connected with the output ends of the control circuit one by one;
and the control circuit is used for controlling each progressive turn-off branch to be sequentially switched in by outputting a corresponding driving signal after the core driving module outputs a turn-off driving signal and controls the initial turn-off branch to be switched in.
Optionally, the initial turn-off branch includes: an initial turn-off resistor and an initial turn-off switch connected in series;
each of the progressive turn-off branches includes: a progressive turn-off resistor and a progressive turn-off switch connected in series.
Optionally, the control circuit includes: the voltage conversion circuit, the voltage division circuit and the plurality of reverse comparison circuits; wherein:
the input end of the voltage conversion circuit is connected with the input end and the output end of the controlled semiconductor; the output end of the voltage conversion circuit is connected with the input end of the voltage division circuit; the voltage conversion circuit is used for detecting the voltage difference between the input end and the output end of the controlled semiconductor and converting the detected direct current high voltage into direct current low voltage;
each output end of the voltage division circuit is respectively connected with the reverse input end of each reverse comparison circuit in a one-to-one correspondence manner; the voltage division circuit divides the direct current low voltage to obtain a plurality of different voltages which are respectively input to the reverse input ends of the reverse comparison circuits;
and the output end of each inverse comparison circuit is respectively used as each output end of the control circuit.
Optionally, the voltage divider circuit includes: the resistors are sequentially connected in series, two ends of the resistors in series are respectively used as the anode and the cathode of the input end of the voltage division circuit, and the connecting point between the adjacent resistors and the anode of the input end of the voltage division circuit are respectively used as the output ends of the voltage division circuit.
Optionally, the number of the resistors in the voltage dividing circuit is the same as the number of the output ends of the voltage dividing circuit.
Optionally, the resistances of the resistors in the voltage divider circuit are the same.
Optionally, the control circuit includes: a plurality of delay circuits connected in series in sequence;
the input end of the delay circuit at the head end is connected with the output end of the core driving module;
and the output end of each time delay circuit is respectively used as each output end of the control circuit.
Optionally, the delay time lengths of the delay circuits are equal.
Optionally, the control circuit includes: a plurality of delay circuits;
the input end of each delay circuit is connected with the output end of the core driving module;
the output end of each time delay circuit is respectively used as each output end of the control circuit;
the delay time lengths of the delay circuits are different.
Another embodiment of the present invention further provides an I-shaped multilevel analog driving circuit, including: the soft turn-off circuit comprises a core driving module, a gate driving module and an I-shaped multi-level analog driving circuit;
the input end of the core driving module is connected with an I-shaped multi-level topological analog controller;
and the output end of the gate driving module is connected with the control end of the controlled semiconductor in the I-shaped multi-level topology.
After a core driving module of the I-shaped multi-level analog driving circuit outputs a turn-off driving signal and controls the initial turn-off branch to be switched in, the control circuit controls each progressive turn-off branch to be switched in sequence by outputting a corresponding driving signal; because each progressive turn-off branch and the initial turn-off branch are connected in parallel between the turn-off power supply and the input end of the gate drive module of the I-shaped multi-level analog drive circuit, the more turn-on turn-off branches, the smaller the equivalent resistance obtained by parallel connection; and each progressive turn-off branch is switched in sequence, so that equivalent resistance obtained by parallel connection is gradually reduced, and further analog multiple turn-off of the I-shaped multi-level topology controlled semiconductor is realized.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of an I-shaped multi-level topology provided by the prior art;
FIG. 2 is a schematic diagram of a soft shutdown circuit of an I-shaped multi-level analog driving circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of another structure of a soft shutdown circuit of an I-shaped multi-level analog driver circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of another structure of a soft shutdown circuit of an I-shaped multi-level analog driver circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of another structure of a soft shutdown circuit of an I-shaped multi-level analog driver circuit according to an embodiment of the present invention;
fig. 6 is a schematic diagram of another structure of a soft shutdown circuit of an I-shaped multi-level analog driving circuit according to another embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In this application, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The invention provides a soft turn-off circuit of an I-shaped multi-level analog driving circuit, and provides an analog multi-turn-off technology for I-shaped multi-level topology.
As shown in fig. 1, each phase I-shaped multi-level topology includes 4 semiconductor switching transistors (Q1, Q2, Q3 and Q4) connected in series in turn; each semiconductor switch tube needs a driving circuit, so that each phase I-shaped multi-level topology needs 4I-shaped multi-level analog driving circuits; each I-shaped multilevel analog driving circuit is controlled by an analog controller of a device where the topology is located, such as an analog controller inside a three-phase inverter.
Referring to fig. 2, the soft shutdown circuit 20 of the I-shaped multi-level analog driving circuit specifically includes: a control circuit 300, an initial turn-off branch 100, and a plurality of progressive turn-off branches 200.
As shown in fig. 2, the initial turn-off branch 100 and each of the progressive turn-off branches 200 are connected in parallel, one of the parallel connection points is connected to an input terminal of the gate driving module 30 of the I-shaped multi-level analog driving circuit, and the other parallel connection point is connected to a turn-off power source-Vss.
The output terminal of the gate driving module 30 is connected to the control terminal of a controlled semiconductor switching tube (hereinafter referred to as a controlled semiconductor) in the I-shaped multi-level topology.
The control end of the initial turn-off branch 100 is connected with the output end of the core driving module 10 of the I-shaped multilevel analog driving circuit; the input end of the core driving module 10 is connected with an analog controller of an I-shaped multi-level topology.
The control terminals of the progressive turn-off branches 200 are respectively connected to the output terminals of the control circuit 300 in a one-to-one correspondence.
The specific working principle is as follows:
when the corresponding controlled semiconductor in the I-shaped multi-level topology needs to be controlled to be turned off, the analog controller of the device where the topology is located outputs a corresponding turn-off instruction to the input end of the core driving module 10; then, the core driving module 10 outputs a turn-off driving signal to the soft turn-off circuit 20 corresponding to the controlled semiconductor, specifically, to the control end of the initial turn-off branch 100 in the soft turn-off circuit 20, so as to control the turn-on of the initial turn-off branch 100, that is, to control the turn-on of the initial turn-off branch 100, so that a current exists between the input end of the gate driving module 30 corresponding to the controlled semiconductor and the turn-off power-Vss.
After the initial turn-off branch 100 is turned on, on one hand, a pull-down current path from the turn-off power source Vss to the input terminal of the gate driving module 30 corresponding to the controlled semiconductor is provided, and on the other hand, the control circuit 300 in the soft turn-off circuit 20 corresponding to the controlled semiconductor can output a corresponding driving signal, thereby controlling each progressive turn-off branch 200 to be turned on sequentially.
The progressive switching-in of each of the successive switching-off branches 200 means that each of the progressive switching-off branches 200 is turned on one by one; specifically, after the first progressive turn-off branch 200 is turned on, it will be connected in parallel with the initial turn-off branch 100, and since each turn-off branch must have a certain on-resistance, the parallel connection can reduce the equivalent resistance from the turn-off power-Vss to the input terminal of the gate driving module 30; when the second progressive turn-off branch 200 is turned on, it will be connected in parallel with the two previous turned-on turn-off branches, further reducing the equivalent resistance from the turn-off power-Vss to the input terminal of the gate driving module 30; the equivalent resistance obtained by parallel connection is smaller as more switching-in and switching-off branches are provided; therefore, after the initial turn-on of the turn-off branch 100, each progressive turn-on branch 200 turns on in sequence, which will gradually decrease the resistance of the pull-down current path from the turn-off power source-Vss to the input terminal of the gate driving module 30, and further gradually decrease the voltage at the input terminal of the gate driving module 30, thereby implementing soft turn-off of the controlled semiconductor; since the core driver module 10 is controlled by a corresponding analog controller, an analog multiple turn-off of the controlled semiconductor is also achieved.
Because each semiconductor in the I-shaped multi-level topology is provided with a corresponding soft turn-off circuit 20, the analog multi-turn-off of each semiconductor in the I-shaped multi-level topology can be realized respectively by adopting the same principle, so that the analog drive of the traditional I-shaped multi-level topology can also be implanted with the multi-turn-off technology.
Another embodiment of the present invention provides a specific implementation form of the soft shutdown circuit 20 of the I-shaped multi-level analog driving circuit based on the above embodiments and fig. 1 and fig. 2:
as shown in fig. 3 to 6, the initial turn-off branch 100 includes: an initial turn-off resistor R0 and an initial turn-off switch S0 connected in series. Each progressive turn-off branch 200 comprises: a progressive turn-off resistor and a progressive turn-off switch connected in series; r21 and R22 … R2n in fig. 3 to 6 are progressive turn-off resistors in the corresponding progressive turn-off branch 200, respectively, and S1 and S2 … Sn in fig. 3 to 6 are progressive turn-off switches in the corresponding progressive turn-off branch 200, respectively.
In practical applications, the series connection of the resistor and the switch in each turn-off branch is not limited to that shown in fig. 3 to 6, and the reverse series connection, that is, the resistor and the switch are interchanged, is also within the scope of the present application. In addition, the number of the resistors in each turn-off branch is not limited to 1, a series-parallel connection mode of a plurality of resistors can be adopted, and even other devices with resistance values can be used for replacing the resistors, which depends on the specific application environment. In addition, the resistance values of the resistors of the respective turn-off branches are not specifically limited, and may be the same resistance value, or different resistance values may be adopted, for example, a resistance value that enables the gate voltage to smoothly change when the controlled semiconductor is turned off for multiple times, and here, the resistance values are not specifically limited, and are determined according to the application environment, and are all within the protection scope of the present application.
In order to implement the above functions of the control circuit 300, the control circuit 300 may adopt various implementation forms, such as the form shown in fig. 4, which specifically includes: a plurality of delay circuits connected in series in sequence; the input end of the delay circuit at the head end is connected with the output end of the core driving module 10; the output end of each delay circuit is respectively used as each output end of the control circuit 300, and is connected to the control end of the corresponding progressive turn-off branch circuit 200.
At this time, if the delay time of each delay circuit is equal, the resistance of the pull-down current path from the power-Vss to the input terminal of the gate driving module 30 will decrease gradually at the same time interval. Of course, in practical applications, the delay time lengths of the delay circuits may also be unequal, for example, gradually increasing or gradually decreasing, depending on the specific application environment, and all of them are within the protection scope of the present application.
In practical applications, the control circuit 300 may also adopt the form shown in fig. 5, which specifically includes: a plurality of delay circuits. The output end of each delay circuit is respectively used as each output end of the control circuit 300 and connected with the control end of the corresponding progressive turn-off branch circuit 200; unlike fig. 4, the input terminal of each delay circuit is connected to the output terminal of the core driving module 10; in addition, the delay time lengths of the delay circuits are different, in practical application, the progressive turn-off branch circuit 200 controlled by the delay circuit with the shortest delay time length is switched on first, and the progressive turn-off branch circuit 200 controlled by the delay circuit with the longest delay time length is switched on last; the delay time of each delay circuit depends on the specific application environment, and is within the protection scope of the present application.
It should be noted that, although the digital multiple shutdown technique in the prior art and the control circuit 300 provided in the above embodiment can reduce the voltage stress of the semiconductor through multiple shutdown, both techniques can only achieve fixed multiple shutdown, and cannot adjust the shutdown manner according to the change of the dc bus voltage of the device where the topology is located, so that both techniques cannot effectively reduce the voltage stress during the grid fault and the rise of the dc bus voltage.
For the above reasons, another embodiment of the present invention provides another specific implementation form of the control circuit 300 in the soft shutdown circuit 20 of the I-shaped multi-level analog driving circuit based on the above embodiments and fig. 1 and fig. 2, as shown in fig. 6:
the control circuit 300 specifically includes: a voltage conversion circuit 301, a voltage division circuit 302, and a plurality of inverse comparison circuits (an inverse comparison circuit 1, an inverse comparison circuit 2 …, an inverse comparison circuit n shown in fig. 6).
The input end of the voltage conversion circuit 301 is connected to the input end and the output end of the controlled semiconductor, and the output end of the voltage conversion circuit 301 is connected to the input end of the voltage division circuit 302. Each output end of the voltage division circuit 302 is correspondingly connected with the reverse input end of each reverse comparison circuit one by one; the output terminal of each inverse comparator is respectively used as the output terminal of the control circuit 300, and is connected to the control terminal of the corresponding progressive turn-off branch 200.
The voltage conversion circuit 301 is configured to detect a voltage difference between an input terminal and an output terminal of the controlled semiconductor, convert a detected dc high voltage into a dc low voltage, and output the dc low voltage to an input terminal of the voltage division circuit 302. Then, the dc low voltage is subdivided by the voltage divider circuit 302 to obtain n different voltages, which are input to the inverting input terminals of the inverting comparator circuit 1 to the inverting comparator circuit n, respectively. Each reverse comparison circuit compares the corresponding voltage received by the reverse input end thereof with preset reference voltages (V1ref, V2ref … Vnref) of the self same-direction input end; when the corresponding voltage received by the inverting input terminal is greater than the preset reference voltage, the output terminal outputs a driving signal to the control terminal of the corresponding progressive turn-off branch 200, thereby controlling the progressive turn-off branch 200 to be turned on.
As shown in fig. 6, the voltage divider circuit 302 includes: a plurality of resistors (R11, R12 … R1n) connected in series in sequence, wherein two ends of the series are respectively used as the positive electrode and the negative electrode of the input end of the voltage division circuit 302, the connection points between the adjacent resistors are respectively used as the 1 st output end to the n-1 st output end of the voltage division circuit 302, and the output voltages V1 and V2 … V (n-1) are output; the positive electrode of the input terminal of the voltage divider 302 is also used as the nth output terminal thereof, and outputs the voltage Vn.
In fig. 6, the number of resistors in the voltage divider circuit 302 is the same as the number of output terminals of the voltage divider circuit 302, and is n; certainly, in practical applications, the resistors R11 and R12 … R1n may be a single resistor, or may be a series-parallel connection form of multiple resistors, and are not specifically limited herein; moreover, the resistances of the resistors in the voltage divider circuit 302 may be the same or different, and may be set in combination with a corresponding preset reference voltage, so that the gate voltage of the controlled semiconductor is smoothly changed and/or changed at equal time intervals when the controlled semiconductor is turned off for multiple times; depending on the specific application environment, are all within the scope of the present application.
In the soft shutdown circuit 20 of the I-shaped multilevel analog driving circuit provided in this embodiment, the control circuit 300 can adjust the shutdown mode according to the change of the dc bus voltage by detecting the voltage of the controlled semiconductor, so as to effectively reduce the peak voltage, thereby not only ensuring low shutdown loss under normal conditions, but also effectively reducing the voltage stress under grid faults.
Another embodiment of the present invention further provides an I-shaped multilevel analog driving circuit, as shown in fig. 2, including: a core driving module 10, a gate driving module 30 and a soft shutdown circuit 20.
Wherein, the input end of the core driving module 10 is connected with an analog controller of I-shaped multi-level topology; the output terminal of the gate driver module 30 is connected to the control terminal of the controlled semiconductor in the I-shaped multi-level topology.
The specific structure and operation principle of the core driving module 10 and the gate driving module 30 are the same as those of the prior art, and are not described herein again.
The structure and the operation principle of the soft shutdown circuit 20 and the connection manner between the soft shutdown circuit and the core driving module 10 and the gate driving module 30 can be referred to the above embodiments, and are not described in detail herein.
By the same principle as that described in the above embodiments, the I-shaped multi-level analog driving circuit provided in this embodiment not only fills up the blank of multiple turn-off techniques in the analog technique, but also can adjust the turn-off mode according to the change of the dc bus voltage, thereby ensuring low turn-off loss under normal conditions and effective reduction of voltage stress under grid fault conditions.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, the system or system embodiments are substantially similar to the method embodiments and therefore are described in a relatively simple manner, and reference may be made to some of the descriptions of the method embodiments for related points. The above-described system and system embodiments are merely illustrative, wherein units described as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A soft turn-off circuit for an I-shaped multi-level analog driver circuit, comprising: the device comprises a control circuit, an initial turn-off branch and a plurality of progressive turn-off branches; wherein:
the initial turn-off branch circuit and each progressive turn-off branch circuit are connected in parallel, one connecting point in parallel connection is connected with the input end of a gate pole driving module of the I-shaped multi-level analog driving circuit, and the other connecting point in parallel connection is connected with a turn-off power supply;
the control end of the initial turn-off branch circuit is connected with the output end of a core driving module of the I-shaped multi-level analog driving circuit;
the control ends of the progressive turn-off branches are correspondingly connected with the output ends of the control circuit one by one;
and the control circuit is used for controlling each progressive turn-off branch to be sequentially switched in by outputting a corresponding driving signal after the core driving module outputs a turn-off driving signal and controls the initial turn-off branch to be switched in.
2. The soft shutdown circuit of an I-word multi-level analog driver circuit according to claim 1, wherein the initial shutdown branch comprises: an initial turn-off resistor and an initial turn-off switch connected in series;
each of the progressive turn-off branches includes: a progressive turn-off resistor and a progressive turn-off switch connected in series.
3. The soft shutdown circuit of an I-word multi-level analog driver circuit according to claim 1 or 2, wherein the control circuit comprises: the voltage conversion circuit, the voltage division circuit and the plurality of reverse comparison circuits; wherein:
the input end of the voltage conversion circuit is connected with the input end and the output end of a controlled semiconductor in the I-shaped multi-level topology; the output end of the voltage conversion circuit is connected with the input end of the voltage division circuit; the voltage conversion circuit is used for detecting the voltage difference between the input end and the output end of the controlled semiconductor and converting the detected direct current high voltage into direct current low voltage;
each output end of the voltage division circuit is respectively connected with the reverse input end of each reverse comparison circuit in a one-to-one correspondence manner; the voltage division circuit divides the direct current low voltage to obtain a plurality of different voltages which are respectively input to the reverse input ends of the reverse comparison circuits;
the same-direction input end of each reverse comparison circuit receives respective preset reference voltage;
and the output end of each inverse comparison circuit is respectively used as each output end of the control circuit.
4. The soft shutdown circuit of an I-word multi-level analog driver circuit according to claim 3, wherein the voltage divider circuit includes: the resistors are sequentially connected in series, two ends of the resistors in series are respectively used as the anode and the cathode of the input end of the voltage division circuit, and the connecting point between the adjacent resistors and the anode of the input end of the voltage division circuit are respectively used as the output ends of the voltage division circuit.
5. The soft turn-off circuit of an I-shaped multi-level analog driving circuit according to claim 4, wherein the number of resistors in the voltage dividing circuit is the same as the number of output terminals of the voltage dividing circuit.
6. The soft turn-off circuit of an I-shaped multi-level analog driving circuit according to claim 5, wherein the resistances of the resistors in the voltage dividing circuit are the same.
7. The soft shutdown circuit of an I-word multi-level analog driver circuit according to claim 1 or 2, wherein the control circuit comprises: a plurality of delay circuits connected in series in sequence;
the input end of the delay circuit at the head end is connected with the output end of the core driving module;
and the output end of each time delay circuit is respectively used as each output end of the control circuit.
8. The soft-off circuit of an I-shaped multi-level analog driving circuit according to claim 7, wherein the delay time lengths of the respective delay circuits are equal.
9. The soft shutdown circuit of an I-word multi-level analog driver circuit according to claim 1 or 2, wherein the control circuit comprises: a plurality of delay circuits;
the input end of each delay circuit is connected with the output end of the core driving module;
the output end of each time delay circuit is respectively used as each output end of the control circuit;
the delay time lengths of the delay circuits are different.
10. An I-shaped multi-level analog driver circuit, comprising: a soft shutdown circuit of the core driver module, the gate driver module, and the I-shaped multi-level analog driver circuit according to any one of claims 1-9;
the input end of the core driving module is connected with an I-shaped multi-level topological analog controller;
and the output end of the gate driving module is connected with the control end of the controlled semiconductor in the I-shaped multi-level topology.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910763399.1A CN110474522B (en) | 2019-08-19 | 2019-08-19 | I-shaped multi-level analog driving circuit and soft turn-off circuit thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910763399.1A CN110474522B (en) | 2019-08-19 | 2019-08-19 | I-shaped multi-level analog driving circuit and soft turn-off circuit thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110474522A CN110474522A (en) | 2019-11-19 |
| CN110474522B true CN110474522B (en) | 2020-11-10 |
Family
ID=68511849
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910763399.1A Active CN110474522B (en) | 2019-08-19 | 2019-08-19 | I-shaped multi-level analog driving circuit and soft turn-off circuit thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110474522B (en) |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1476136A (en) * | 2002-07-30 | 2004-02-18 | ������������ʽ���� | Driving circuit for power semiconductor element |
| JP2004321032A (en) * | 2003-04-22 | 2004-11-18 | Mayekawa Mfg Co Ltd | Method for cutting hard material- and soft material-attached article and apparatus therefor |
| US6958591B1 (en) * | 2002-05-22 | 2005-10-25 | National Semiconductor Corporation | Battery charging safety circuit for simultaneous startup and rapid surge current clamping |
| CN101174788A (en) * | 2007-10-22 | 2008-05-07 | 株洲南车时代电气股份有限公司 | Cut-out overvoltage protection circuit of electric voltage driving type power semiconductor device |
| CN101483424A (en) * | 2008-12-31 | 2009-07-15 | 中国电力科学研究院 | Soft breaking circuit suitable for large power IGBT commercial driver chip |
| CN101686044A (en) * | 2009-03-25 | 2010-03-31 | 深圳市科陆变频器有限公司 | IGBT drive protection circuit |
| CN202550515U (en) * | 2012-04-01 | 2012-11-21 | 上海市电力公司 | High-power IGBT (insulated gate bipolar transistor) comprehensive overcurrent protection circuit |
| CN103036415A (en) * | 2011-09-29 | 2013-04-10 | 台达电子企业管理（上海）有限公司 | Power semiconductor switch series circuit and control method thereof |
| CN202929163U (en) * | 2012-11-09 | 2013-05-08 | 浙江大学 | IGBT failure detection circuit |
| JP2014023312A (en) * | 2012-07-19 | 2014-02-03 | Toyota Industries Corp | Motor inverter |
| CN205545181U (en) * | 2016-04-15 | 2016-08-31 | 浪潮电子信息产业股份有限公司 | Parasitic effect cancelling circuit that switches on |
| CN105932864A (en) * | 2016-07-18 | 2016-09-07 | 南京埃斯顿自动控制技术有限公司 | Intelligent IGBT (insulated gate bipolar transistor) constant-current driving device |
| CN107947251A (en) * | 2017-07-26 | 2018-04-20 | 北京空间飞行器总体设计部 | The anti-rush of current of the whole star of composite bus system satellite adds power-off system |
| CN207490887U (en) * | 2017-09-22 | 2018-06-12 | 郑州科创电子有限公司 | IGBT high-frequency soft switch drives thick film |
| CN109861505A (en) * | 2019-04-01 | 2019-06-07 | 天地科技股份有限公司上海分公司 | IGBT drive circuit topological structure suitable for high speed frequency converter |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6961944B2 (en) * | 2017-01-18 | 2021-11-05 | 富士電機株式会社 | Power semiconductor module |
-
2019
- 2019-08-19 CN CN201910763399.1A patent/CN110474522B/en active Active
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6958591B1 (en) * | 2002-05-22 | 2005-10-25 | National Semiconductor Corporation | Battery charging safety circuit for simultaneous startup and rapid surge current clamping |
| CN1476136A (en) * | 2002-07-30 | 2004-02-18 | ������������ʽ���� | Driving circuit for power semiconductor element |
| JP2004321032A (en) * | 2003-04-22 | 2004-11-18 | Mayekawa Mfg Co Ltd | Method for cutting hard material- and soft material-attached article and apparatus therefor |
| CN101174788A (en) * | 2007-10-22 | 2008-05-07 | 株洲南车时代电气股份有限公司 | Cut-out overvoltage protection circuit of electric voltage driving type power semiconductor device |
| CN101483424A (en) * | 2008-12-31 | 2009-07-15 | 中国电力科学研究院 | Soft breaking circuit suitable for large power IGBT commercial driver chip |
| CN101686044A (en) * | 2009-03-25 | 2010-03-31 | 深圳市科陆变频器有限公司 | IGBT drive protection circuit |
| CN103036415A (en) * | 2011-09-29 | 2013-04-10 | 台达电子企业管理（上海）有限公司 | Power semiconductor switch series circuit and control method thereof |
| CN202550515U (en) * | 2012-04-01 | 2012-11-21 | 上海市电力公司 | High-power IGBT (insulated gate bipolar transistor) comprehensive overcurrent protection circuit |
| JP2014023312A (en) * | 2012-07-19 | 2014-02-03 | Toyota Industries Corp | Motor inverter |
| CN202929163U (en) * | 2012-11-09 | 2013-05-08 | 浙江大学 | IGBT failure detection circuit |
| CN205545181U (en) * | 2016-04-15 | 2016-08-31 | 浪潮电子信息产业股份有限公司 | Parasitic effect cancelling circuit that switches on |
| CN105932864A (en) * | 2016-07-18 | 2016-09-07 | 南京埃斯顿自动控制技术有限公司 | Intelligent IGBT (insulated gate bipolar transistor) constant-current driving device |
| CN107947251A (en) * | 2017-07-26 | 2018-04-20 | 北京空间飞行器总体设计部 | The anti-rush of current of the whole star of composite bus system satellite adds power-off system |
| CN207490887U (en) * | 2017-09-22 | 2018-06-12 | 郑州科创电子有限公司 | IGBT high-frequency soft switch drives thick film |
| CN109861505A (en) * | 2019-04-01 | 2019-06-07 | 天地科技股份有限公司上海分公司 | IGBT drive circuit topological structure suitable for high speed frequency converter |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110474522A (en) | 2019-11-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR101723094B1 (en) | Power device for sub-module controller of mmc converter | |
| JP6203289B2 (en) | Power converter | |
| EP3633843B1 (en) | Current converter and driving method therefor | |
| CN107196546B (en) | Active discharge system of motor controller | |
| EP3468026A1 (en) | Power converter | |
| US20030048650A1 (en) | Three level inverter controller reducing commutation loop inductance | |
| US9496788B2 (en) | Multi-phase boost converter with phase self-detection and detecting circuit thereof | |
| JP6685477B1 (en) | Power conversion device and power conversion system | |
| KR20180075340A (en) | Power device for sub-module controller of mmc converter | |
| CN103166467B (en) | A kind of converter circuit and method with input voltage balancing circuitry | |
| JP2020048398A (en) | Power supply conversion system with abnormal energy protection and operation method therefor | |
| CN105183059A (en) | Digit low voltage difference voltage-stablizer and ringing elimination method thereof | |
| KR20160040378A (en) | Dab convertor with multi-phase structure | |
| US9628073B2 (en) | Current control circuit | |
| CN110474522B (en) | I-shaped multi-level analog driving circuit and soft turn-off circuit thereof | |
| US20210067042A1 (en) | Multi-phase switched capacitor power converter and control method thereof | |
| JP6790853B2 (en) | Power converter control method | |
| EP3391543B1 (en) | Voltage balancing of voltage source converters | |
| JP7306249B2 (en) | Controller for multi-level power converter | |
| JP5814759B2 (en) | Power converter | |
| KR101491658B1 (en) | Switching Amplifier Apparatus and Control Method Thereof | |
| Ting et al. | Digital control of IGBTs for module shutdown in input-series and output-parallel connected modular DC-DC converter | |
| US9755498B2 (en) | Semiconductor device, and inverter, converter and power conversion device employing the same | |
| US11394200B2 (en) | Device and method for coupling two DC grids | |
| JP6171664B2 (en) | Two-stage change prevention device for high-voltage inverter |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |