CN110460330B - Frequency source packaging method and frequency source - Google Patents
Frequency source packaging method and frequency source Download PDFInfo
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- CN110460330B CN110460330B CN201910770103.9A CN201910770103A CN110460330B CN 110460330 B CN110460330 B CN 110460330B CN 201910770103 A CN201910770103 A CN 201910770103A CN 110460330 B CN110460330 B CN 110460330B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
Abstract
The embodiment of the application provides a frequency source packaging method and a frequency source, and the frequency source is packaged in a three-dimensional stacking mode, so that the volume and the weight of the frequency source are greatly reduced, and the volume of the frequency source can be reduced by 80% on the basis of the volume of an original assembly.
Description
Technical Field
The present disclosure relates to the field of frequency source manufacturing technologies, and in particular, to a frequency source packaging method and a frequency source.
Background
The identification of friend or foe is one of the important means of modern informatization battlefield military countermeasures, the secondary radar is used as the core hardware equipment of the identification system of friend or foe, and the quality of the secondary radar directly influences the performance of the identification system. As a core component of the radar, the frequency source is mainly used for providing radio frequency excitation signals for a radar transmitter, providing a plurality of local oscillation signals for down-conversion of echo signals for a radar receiver and providing reference signals for a signal processing system. The frequency source is used as the heart of the radar system, and indexes such as phase noise, frequency hopping time, spurious suppression and the like of the frequency source have important influence on the radar system.
In the process of implementing the present application, the inventor finds that most of the existing miniaturized frequency source components are used in a single function and a narrow frequency band, and in the multifunctional and wide frequency band technology, the volume of the frequency source component is large, and especially in high frequency products such as millimeter waves and the like, the frequency source component is still at a module level basically, which is not beneficial to miniaturization development.
Disclosure of Invention
The embodiment of the application provides a frequency source packaging method and a frequency source, which are used for solving at least one problem.
According to a first aspect of embodiments of the present application, there is provided a method for packaging a frequency source, including: eutectic welding and three-dimensional gold wire bonding are carried out on the amplifier chip, the power divider chip and the frequency divider chip to the lower substrate; sintering the bottom of the lower substrate with the cavity, and sintering the loop filter on the lower substrate; at least two solder balls are welded on the lower substrate in a mutually dispersed mode and have the same height; sintering an input power supply, an input insulator and the gold-plated holes on the side surface of the cavity, and welding the input power supply, the input insulator and the gold-plated holes on the side surface of the cavity to the lower substrate; reflow soldering the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device to the upper substrate, and then bonding the filter chip and the gold wire to the upper substrate; aligning the upper substrate to the solder balls of the lower substrate, and connecting the solder balls with the upper substrate in a welding manner; sintering the three-wire control input and RF output with the gold-plated hole and welding to the upper substrate; and aligning and stacking the lower substrate and the upper substrate to electrically interconnect the upper substrate and the lower substrate.
According to a second aspect of embodiments of the present application, there is provided a frequency source, including: a cavity; the lower substrate is sintered at the bottom of the cavity, and the amplifier chip, the power divider chip and the frequency divider chip are eutectic and are bonded to the lower substrate through gold wires; a loop filter soldered to the lower substrate; at least two solder balls which have the same height and are welded on the lower substrate in a mutually dispersed way; the upper substrate is aligned with the edge of the lower substrate, placed in the cavity and electrically connected with the lower substrate through being welded to the at least two welding balls; the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device are welded to the upper substrate; the filter chip is adhered to the upper layer substrate and is in gold wire bonding with the upper layer substrate; the side surface of the cavity is provided with a gold-plated hole; the input power supply and the input insulator are respectively sintered with the corresponding gold-plated holes and are welded to the lower substrate; three-wire control inputs and RF outputs are sintered with corresponding gold-plated holes, respectively, and soldered to the upper substrate.
By adopting the frequency source packaging method and the frequency source provided by the embodiment of the application, the volume and the weight of a product can be greatly reduced, the requirements of miniaturization and light weight of components and modules are met, and sip packaging is easy to realize.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
FIG. 1 illustrates a schematic circuit diagram of a frequency source according to an embodiment of the present application;
fig. 2 shows a schematic cross-sectional view of a frequency source packaged by the packaging method in the embodiment of the present application.
Detailed Description
In the process of implementing the present application, the inventor finds that most of the existing miniaturized frequency source components are used in a single function and a narrow frequency band, while the size of the components in the multifunctional and wide frequency band technology is not small, especially in high frequency products such as millimeter waves and the like, the components are basically in a module level, which is not beneficial to miniaturization development, and although miniaturization is achieved, the functions and the frequency band use are limited. For example, in the patent "a miniaturized high-airtightness frequency source and its packaging method", it is mainly stated that a conventional digital frequency source generally consists of a phase-locked loop (PLL) chip, a loop low-pass filter circuit, and a voltage-controlled oscillator (VCO), and it adopts a planar assembly method, although the two are similar in volume size, the implementation function is not clearly described, and the functional requirement is low. The scheme adopts a three-dimensional laminated assembly mode, greatly reduces the volume, has complete functions and is suitable for multiple frequency bands and multiple fields.
In order to solve the above problems, the embodiment of the present application provides a frequency source packaging method and a frequency source, wherein a three-dimensional stacking technology of a frequency source internal circuit is used to implement a miniaturized design, in an early assembly method, multiple eutectic and bonding interconnection methods of a cavity, a ceramic film substrate and a GaN chip are implemented, and a contraposition stacking technology is combined to integrate multiple types of devices such as an internal phase discriminator chip, a VCO chip, an amplifier chip and a switch filter chip with high density, so as to implement high signal quality and broadband output of the frequency source; the size of the whole assembly can be reduced by 80% on the basis of the original volume, and the size of the whole assembly can reach 8mm by 3 mm.
The three-dimensional stacking refers to the vertical interconnection of chips in the Z direction, and mainly comprises three-dimensional stacking packaging among stacked ICs, chip stacking 3D packaging and wafer stacking 3D packaging. In the embodiment of the application, three-dimensional stacking and chip stacking packaging among stacked ICs are adopted, wherein peripheral interconnection (a stacked tape carrier method, a welded edge conduction tape method, a cubic surface interconnection line substrate method), stacked MCM region interconnection (including a flip chip welded stacked chip method, a flip chip welded stacked method) and a stacked chip bonding method (including fusion bonding, adhesive bonding, metal-metal thermocompression bonding, gold/copper bonding, solder bumps or gold bumps, etc.) of the stacked ICs are included.
The volume and weight of the frequency source realized by adopting the three-dimensional stacking mode are greatly reduced, and the volume can be reduced by 80% on the basis of the original assembly.
The scheme in the embodiment of the application can be applied to the fields of digital phased array platforms, comprehensive integrated platforms, unmanned aerial vehicle platforms, satellite communication and the like.
In order to make the technical solutions and advantages of the embodiments of the present application more apparent, the following further detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings makes it clear that the described embodiments are only a part of the embodiments of the present application, and are not exhaustive of all embodiments. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
Fig. 1 shows a schematic circuit diagram of a frequency source according to an embodiment of the present application.
As shown in fig. 1, the frequency source is composed of a temperature compensation crystal oscillator, a phase-locked loop chip, a linear voltage stabilizing circuit, a loop filter, a voltage controlled oscillator chip, a power divider chip, a frequency divider chip, an amplifier chip, a filter chip, and the like. The temperature compensation crystal oscillator is used for providing a reference clock with high stability and phase noise; the linear voltage stabilizing circuit converts a +5V input power supply into +3.3V required by a phase-locked loop; the phase-locked loop chip carries out frequency division and phase discrimination on the reference clock and the output signal of the voltage-controlled oscillator, and the generated direct-current voltage controls the output frequency of the VCO through a loop filter; meanwhile, the VCO output signal is output after frequency division, amplification and filtering.
It should be understood that the frequency source shown in fig. 1 is shown for exemplary purposes only, and the encapsulation method of the frequency source in the embodiment of the present application may also be applied to frequency sources connected in other ways, which is not limited in the present application.
Fig. 2 shows a schematic cross-sectional view of a frequency source packaged by the packaging method in the embodiment of the present application. As shown in fig. 2, the frequency source packaged by the packaging method in the embodiment of the present application includes:
a cavity; the lower substrate is sintered at the bottom of the cavity, and the amplifier chip, the power divider chip and the frequency divider chip are eutectic and are bonded to the lower substrate through gold wires; a loop filter soldered to the lower substrate; at least two solder balls which have the same height and are welded on the lower substrate in a mutually dispersed way; the upper substrate is aligned with the edge of the lower substrate, placed in the cavity and electrically connected with the lower substrate through being welded to the at least two welding balls; the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device are welded to the upper substrate; the filter chip is adhered to the upper layer substrate and is in gold wire bonding with the upper layer substrate; the side surface of the cavity is provided with a gold-plated hole; the input power supply and the input insulator are respectively sintered with the corresponding gold-plated holes and are welded to the lower substrate; three-wire control input and RF (Radio Frequency) output are sintered with the corresponding gold-plated holes and welded to the upper substrate.
In particular implementations, the underlying substrate may be an underlying single-layer ceramic substrate. The upper substrate may be an upper multilayer ceramic substrate.
The packaging method of the frequency source comprises the following steps:
step 1, eutectic welding and three-dimensional gold wire bonding are carried out on the amplifier chip, the power divider chip and the frequency divider chip to the lower substrate.
In practical implementation, the substrate of the frequency source in the embodiment of the present application may be a ceramic substrate.
In the specific implementation, in the assembly process of the frequency source, three types of commonly used solders for eutectic of the amplifier chip, the power divider chip and the frequency divider chip are gold tin (AuSn), gold germanium (AuGe) and gold silicon (AuSi), and the eutectic temperature and the mechanical property of the three types of solders are shown in table 1.
TABLE 1 eutectic solder characteristics of commonly used chips
| Solder | Eutectic temperature/. degree.C | Thermal conductivity/W (m.k) -1 | Resistivity/. times.10-6 omega | Shear strength/MPa |
| AuSn | 280 | 251 | 35.9 | 185 |
| AuGe | 356 | 232 | 28.7 | 220 |
| AuSi | 370 | 293 | 77.5 | 142 |
The temperature resistance limit of the chip and the melting point temperature of the eutectic solder are the first problems to be considered when the chip is eutectic. When in welding, the welding temperature is generally about 20 ℃ higher than the melting point temperature of the solder, so that the solder can be ensured to be fully melted or to be in a liquid phase.
In the embodiment of the application, a gallium nitride GnN bare chip can be adopted, and the AuSn alloy solder is selected to perform eutectic crystallization on the GaN chip by comparing the liquidus point, the thermal conductivity, the resistivity and the shear strength of three solders of AuGe, AuSi and AuSn, as shown in figure 2, in the miniaturized frequency source, the amplifier chip, the power divider chip and the frequency divider chip are directly completed by adopting AuSn solder sheet eutectic crystallization on the lower layer ceramic substrate, and after the completion, the chip is subjected to three-dimensional gold wire bonding, wherein the specification of a gold wire is 25 mu m.
And 2, sintering the bottom of the lower substrate and the cavity, and sintering the loop filter on the lower substrate.
In specific implementation, a SnAgCu alloy solder sheet with low first-order gradient (melting point temperature 217 ℃) can be adopted between the lower ceramic substrate and the cavity, and the substrate and the cavity are sintered at proper temperature through parameter analysis of a ceramic substrate and cavity eutectic temperature curve method; and sintering the loop filter onto the lower ceramic substrate by using a SnPb solder sheet.
And 3, welding at least two solder balls which have the same height and are mutually dispersed on the lower layer substrate.
In specific implementation, 0.5mm BGA solder balls can be soldered to the lower ceramic substrate by SnPb solder paste.
And 4, sintering the input power supply, the input insulator and the gold-plated hole on the side surface of the cavity, and welding the input power supply, the input insulator and the gold-plated hole on the side surface of the cavity to the lower substrate.
In specific implementation, the +5V and LD input insulators and the gold-plated holes on the side surface of the cavity may be sintered by SnPb solder paste and soldered on the lower ceramic substrate, so that the insulators and the ceramic substrate are electrically connected.
And 5, reflowing the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device to an upper substrate, and then bonding the filter chip and the gold wire to the upper substrate.
During specific implementation, the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and other resistance-capacitance devices of the packaging device can be firstly reflow-welded on the substrate by adopting SnPb soldering paste; and curing the filter chip on the substrate at 120 ℃ by adopting H20E conductive adhesive to form a good temperature gradient, and carrying out gold wire bonding with a nearby circuit after the chip is bonded, wherein the gold wire is in a specification of 25 mu m.
And 6, aligning the upper substrate to the solder balls of the lower substrate, and connecting the solder balls with the upper substrate in a welding manner.
In specific implementation, the upper ceramic substrate can be placed in a prepared lower circuit structure, and the BGA solder balls are connected with the upper ceramic substrate by soldering with 138 ℃ low-temperature SnBi solder to form circuit connection of the middle layer.
And 7, sintering the three-line control input and the RF output with the gold-plated hole, and welding the three-line control input and the RF output to the upper substrate.
In specific implementation, three-wire control input, RF output and the like of the upper ceramic substrate can be sintered in gold-plated holes on the upper side surface of the cavity by SnPb solder paste by using insulators of different types, and are welded with an input/output circuit of the upper ceramic substrate by using SnPb solder to form electrical connection.
And 8, aligning and stacking the lower substrate and the upper substrate to electrically interconnect the upper substrate and the lower substrate.
In specific implementation, the completed bottom layer and upper layer ceramic substrate circuits can be aligned and stacked by adopting a BGA ball mounting method, the two layers of substrates are electrically interconnected by utilizing ball mounting equipment, BGA solder balls can adopt solder balls, the functions of the BGA solder balls comprise electrical connection, grounding connection and supporting connection, a BGA effect diagram is shown in figure 2, and the number of the BGA solder balls can be actually increased along with circuit layout.
In specific implementation, the right side of the external I/O connection of the frequency source component adopts a side insulator vacuum welding mode to ensure air tightness, and the insulator is connected with the upper and lower ceramic substrate circuit boards to realize the direct current power supply and signal transmission function and facilitate the realization of welding the whole frequency source component on other circuits.
In specific implementation, the packaging method according to the embodiment of the application may further include testing/debugging the assembled multilayer circuit, and capping the three-dimensional stacked frequency source by using a laser seal welding method, so as to achieve good sealing performance.
By adopting the frequency source packaging method and the frequency source provided by the embodiment of the application, the packaging method has the advantages that the frequency source component is wider in application range and smaller in size; the frequency source can be used as a universal component and a module in a comprehensive radio frequency product with a plurality of frequency bands; the method can greatly reduce the volume and the weight of the product, meet the requirements of miniaturization and lightweight of components and modules, and is easy to realize sip packaging; compared with the traditional multifunctional broadband frequency source, the frequency source has the advantages of simpler principle structure, lower stray, lower power consumption, lower cost and easy repair and maintenance; a green welding mode is adopted in the three-dimensional stacking and packaging process, no fluxing agent pollutants exist, and the overall reliability of the assembly is ensured; the stacking method can be miniaturized in size, and repeated development of the stacking method can be easily achieved according to product requirements.
While the preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A method of packaging a frequency source, comprising:
eutectic welding and three-dimensional gold wire bonding are carried out on the amplifier chip, the power divider chip and the frequency divider chip to the lower substrate;
sintering the bottom of the lower substrate and the cavity, and sintering the loop filter on the lower substrate;
at least two solder balls are welded on the lower substrate in a mutually dispersed mode and have the same height;
sintering an input power supply, an input insulator and the gold-plated holes on the side surface of the cavity, and welding the input power supply, the input insulator and the gold-plated holes on the side surface of the cavity to the lower substrate;
reflow soldering a phase-locked loop chip, a voltage-controlled oscillator, a temperature compensation crystal oscillator and a resistance-capacitance device to an upper substrate, and then bonding a filter chip and gold wires to the upper substrate;
the upper-layer substrate is placed on the welding balls of the lower-layer substrate in an aligned mode, and the welding balls are connected with the upper-layer substrate in a welding mode;
sintering the three-wire control input and the RF output with the gold-plated hole and welding the three-wire control input and the RF output to the upper substrate;
and aligning and stacking the lower substrate and the upper substrate to electrically interconnect the upper substrate and the lower substrate.
2. The method for packaging a frequency source according to claim 1, wherein the amplifier chip, the power divider chip and the frequency divider chip are eutectic with gold-tin-AuSn alloy solder.
3. The method for packaging the frequency source according to claim 1, wherein the bottom of the lower substrate and the cavity are sintered by using a SnAgCu alloy solder sheet.
4. The method for packaging a frequency source according to claim 1, wherein the solder balls are BGA solder balls, and the solder balls have a diameter of 0.5 mm; the specification of the gold wire adopted by the three-dimensional gold wire bonding is 25 mu m.
5. The method for packaging a frequency source according to claim 1, wherein the filter chip is bonded to the upper substrate by a conductive adhesive.
6. The method for packaging a frequency source according to claim 1, wherein the solder balls are soldered to the lower substrate by SnPb solder paste, and the loop filter is sintered to the lower substrate by SnPb solder paste; the input power supply, the input insulator and the gold-plated hole on the side surface of the cavity are sintered by SnPb soldering paste; the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device are reflow-welded on the upper substrate through SnPb soldering paste; and the three-wire control input, the RF output and the gold-plated hole are sintered by SnPb soldering paste.
7. The method for packaging the frequency source according to claim 1, wherein the solder balls are connected with the upper substrate by using 138 ℃ low-temperature SnBi solder welding.
8. The method for packaging a frequency source according to claim 1, wherein the lower substrate and the upper substrate are stacked by BGA ball bonding.
9. The method for packaging a frequency source according to claim 1, further comprising:
and sealing the cavity by adopting a laser seal welding method.
10. A frequency source, comprising:
a cavity;
the lower substrate is sintered at the bottom of the cavity, and the amplifier chip, the power divider chip and the frequency divider chip are eutectic and are bonded to the lower substrate through gold wires; a loop filter soldered to the lower substrate;
at least two solder balls which are same in height and are welded to the lower substrate in a mutually dispersed mode;
the upper substrate is arranged in the cavity in alignment with the edge of the lower substrate and is electrically connected with the lower substrate through being welded to the at least two welding balls; the phase-locked loop chip, the voltage-controlled oscillator, the temperature compensation crystal oscillator and the resistance-capacitance device are welded to the upper substrate; the filter chip is adhered to the upper-layer substrate and is in gold wire bonding with the upper-layer substrate;
a gold-plated hole is formed in the side face of the cavity; the input power supply and the input insulator are respectively sintered with the corresponding gold-plated holes and are welded to the lower substrate; three-wire control inputs and RF outputs are sintered with corresponding gold-plated holes, respectively, and soldered to the upper substrate.
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| CN201910770103.9A CN110460330B (en) | 2019-08-20 | 2019-08-20 | Frequency source packaging method and frequency source |
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| CN201910770103.9A CN110460330B (en) | 2019-08-20 | 2019-08-20 | Frequency source packaging method and frequency source |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US6005443A (en) * | 1998-03-19 | 1999-12-21 | Conexant Systems, Inc. | Phase locked loop frequency synthesizer for multi-band application |
| CN103795410B (en) * | 2014-01-24 | 2017-03-01 | 南京熊猫电子股份有限公司 | A kind of broadband frequency agility frequency source based on two phase-locked loop |
| US9991864B2 (en) * | 2015-10-14 | 2018-06-05 | Microsoft Technology Licensing, Llc | Superconducting logic compatible phase shifter |
| CN206302392U (en) * | 2017-01-05 | 2017-07-04 | 中星联华科技（北京）有限公司 | Frequency divider and frequency generator |
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