CN110459591A - Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform - Google Patents
Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform Download PDFInfo
- Publication number
- CN110459591A CN110459591A CN201910482541.5A CN201910482541A CN110459591A CN 110459591 A CN110459591 A CN 110459591A CN 201910482541 A CN201910482541 A CN 201910482541A CN 110459591 A CN110459591 A CN 110459591A
- Authority
- CN
- China
- Prior art keywords
- black phosphorous
- homojunction
- silica
- sub
- stratiform
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 title claims abstract description 49
- 230000005641 tunneling Effects 0.000 title claims abstract description 22
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 70
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 32
- 239000010410 layer Substances 0.000 claims description 16
- 239000002356 single layer Substances 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 6
- 229910052582 BN Inorganic materials 0.000 claims description 3
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 claims description 3
- 229920002313 fluoropolymer Polymers 0.000 claims description 3
- 239000004811 fluoropolymer Substances 0.000 claims description 3
- 230000002209 hydrophobic effect Effects 0.000 claims description 3
- 238000007789 sealing Methods 0.000 claims description 3
- 230000005669 field effect Effects 0.000 abstract description 16
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000011161 development Methods 0.000 abstract description 5
- 238000005516 engineering process Methods 0.000 abstract description 5
- 238000000034 method Methods 0.000 description 5
- 238000003775 Density Functional Theory Methods 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 4
- 230000005540 biological transmission Effects 0.000 description 4
- 230000003993 interaction Effects 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 3
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 229910052593 corundum Inorganic materials 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 229910001845 yogo sapphire Inorganic materials 0.000 description 2
- 229910003090 WSe2 Inorganic materials 0.000 description 1
- 238000005314 correlation function Methods 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 description 1
- 229910052982 molybdenum disulfide Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/24—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7827—Vertical transistors
Abstract
The invention discloses a kind of sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform, are made of top-gated, bottom gate, upper layer silica, black phosphorous, source electrode, drain electrode, underlying silica；The top-gated is located at upper layer silica upper end, bottom gate is located at underlying silica lower end, for black phosphorous homojunction between upper layer silica and underlying silica, source electrode and drain electrode are located at the left and right side of upper layer silica Yu underlying silica section；Vertical black phosphorous tunneling field-effect pipe is not only able to satisfy requirement of the International Semiconductor Technology Development Roadmap lower than the high power consumption of 10nm scale, also it is able to satisfy the requirement of low-power consumption application, and is accelerated based on the practical application for being layered black phosphorous homojunction two dimension tunneling field-effect pipe.
Description
Technical field
The present invention relates to semiconductor homostyructures, more particularly to the vertical tunnelling of sub- 10nm based on the black phosphorous homojunction of stratiform
Transistor.
Background technique
Tunneling field-effect pipe is one of the candidate that low-power Post-CMOS is calculated, because it can break through subthreshold value pendulum
The thermion of width (60mV/dec) limits.It is especially attractive using two-dimensional material design tunneling field-effect pipe, because of thin body
Mean fabulous grid control, and smooth surface means during transportation without carrier traps.In vertical two-dimentional tunnel
Field-effect tube is worn, carrier tunnelling occurs in the different layers with Van der Waals interaction.Due to there is no pinning band in interface,
And the band of two components can move, therefore the interaction of weak interlayer is very important for carrier tunnelling.Drain electrode/
Under grid voltage freely.Compared with planar device configuration, the abundant selection of two-dimensional hetero-junction means the spirit of tunneling barrier height
Tuning living.In addition, vertical equipment framework is technically more mature, and successfully realize in the lab.It is 2015, breakthrough
The minimum subthreshold amplitude of oscillation is 3.9mV/dec, and the average subthreshold amplitude of oscillation is 31.1mV/dec, is measured by 40 years big flow temperature,
And corresponding diode is combined by volume ge source and two-dimentional molybdenum disulfide channel.Later, there is SnSe2/WSe2Hetero-junctions
The subthreshold amplitude of oscillation of vertical two dimension field-effect tube is minimum, is 37mV/dec, and ON/OFF ratio is 106, with high current > 10-5A.Homogeneity
Knot is other devices configuration of vertical two-dimentional field-effect tube, and should have lower leakage current compared with plane counterpart, because
Additional vertical transfer barrier is applied with for vertical stacking configuration.Therefore, the vertical two-dimentional field-effect tube with homojunction may
It is applied to plane counterpart more suitable for low-power consumption.Due to its medium band gap, anisotropic characteristic electron and high carrier
Mobility, the black phosphorous of single layer are a kind of up-and-coming channel materials, because it has moderate band gap, anisotropic electronics
Characteristic and high carrier mobility, this may cause the high conducting electric current in tunneling field-effect pipe support structure.Black phosphorous and other materials
Material with other two-dimensional material Van der Waals compatible with especially stacking, because there is the surface being vacantly bonded, this is conducive to device
Framework.Even if the estimated black phosphorous of single layer based on plane tunneling field-effect pipe is also a kind of outstanding Gao Gong within the scope of sub- 10nm
Device is consumed, but the leakage current of low-power consumption application is too high.
Summary of the invention
Goal of the invention: the present invention provides one kind can meet International Semiconductor Technology Development Roadmap lower than 10nm scale
The sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform that high power consumption and low-power consumption require.
Technical solution: the present invention is by top-gated, bottom gate, upper layer silica, black phosphorous, source electrode, drain electrode, underlying silica
Composition；The top-gated is located at upper layer silica upper end, and bottom gate is located at underlying silica lower end, and black phosphorous homojunction is located at
Between upper layer silica and underlying silica, source electrode and drain electrode are located at upper layer silica and underlying silica area
Between left and right side.
Further, described black phosphorous (4) homogeneity becomes the black phosphorous of single layer of two part vertical stackings.
Further, the black phosphorous is covered using hexagonal boron nitride, and PxOy oxide layer (passes through oxygen plasma dry corrosion
Carve and formed) and Al2O3 and hydrophobic fluoropolymer encapsulation the double-deck sealing end.
Further, vertical to simulate sub- 10nm using the black phosphorous homojunction of the layering calculated based on HF Ab initio Quantum Teleportation
Tunneling field-effect pipe.It is carried out in its frame using in density functional theory (DFT) and unbalance distribution (NEGF) method
Transmission calculates, and this method is integrated in NANOTCAD software.
The utility model has the advantages that compared with prior art, the present invention has following remarkable result: stacking the black phosphorous of single layer using two
Two-door device model, compared with plane counterpart: 1, applied field is expanded to low-power consumption device by vertical black phosphorous tunneling field-effect pipe
Part, on-state current (low-power consumption) can complete the international semiconductor technology development course of low energy-consumption electronic device when Lg narrows down to 5nm
Figure target.2, for high power consumption application, the on-state current (high power consumption) of vertical black phosphorous tunneling field-effect pipe narrows down to 3nm in Lg
When can satisfy high power consumption International Semiconductor Technology Development Roadmap target.3, at the identical Lg lower than 5nm, it is better than plane
Counterpart.4, other than on-state current, when these devices can obtain very small delay when Lg narrows down to 4 and 2nm respectively
Between and low-power consumption, more than requirement an order of magnitude of International Semiconductor Technology Development Roadmap low-power consumption and high power consumption device.5,
Lg narrows down to the~available subthreshold value swing lower than 60mV/dec of 7nm, this is more precipitous than their plane counterpart.
Detailed description of the invention
Fig. 1 is principle of the invention figure；
Fig. 2 is the black phosphorous homojunction composition of stratiform.
Specific embodiment
As shown in Figure 1 and Figure 2, the present invention by top-gated 1, bottom gate 2, upper layer silica 3, black phosphorous 4, source electrode 5, drain electrode 6,
Underlying silica 7 forms；The top-gated 1 is located at 3 upper end of upper layer silica, and bottom gate is located at 7 lower end of underlying silica,
For black 4 homojunction of phosphorous between upper layer silica 3 and underlying silica 7, source electrode 5 and drain electrode 6 are located at upper layer two
The left and right side of silica 3 and 7 section of underlying silica；4 homogeneity of black phosphorous becomes two part vertical stackings
The black phosphorous of single layer；Although intrinsic black phosphorous be in air it is unstable, can pass through protective layer obtain air-stable it is black
Phosphorous and black phosphorous device, if hexagonal boron nitride covers, PxOy oxide layer (is formed) by oxygen plasma dry ecthing, and
Al2O3With the double-deck sealing end of hydrophobic fluoropolymer encapsulation.
The black phosphorous of bottom/top single layer of p-/n- type doping forms source/drain region, and intermediate intrinsic part is channel, i.e.,
Grid and source electrode overlapping region.Source electrode band and drain electrode conduction band will overlap each other, and work as and apply bias voltage between two leads
When, the electron gap of intrinsic channel will form barrier.Therefore, carrier will be transported to top from bottom source under tunneling mechanism
Discharge outlet.Grid voltage is for adjusting barrier height so that device opens and closes.Device markings are vertical black phosphorous by we
Tunneling field-effect pipe.It is carried out in its frame using in density functional theory (DFT) and unbalance distribution (NEGF) method
Transmission calculates, and this method is integrated in NANOTCAD software.Use the broad sense ladder of Perdew-Burke-Ernzerh form (PBE)
It spends approximate (GGA) and is used as exchange correlation function.Monkhorst-Pack k-points is 29 × 1 × 100, for that can not constrain
Brillouin zone (IBZ), density is enough to restrain.Calculating is self iteration, until energy converges to 10-5Ha.Match in TFET
In setting, GGA-PBE is the ideal chose of transmission simulation, because of the screen again for the Electron-electron Interaction that dosed carrier generates
It covers and greatly reduces many-body effect.Therefore, under higher doping concentration, the gap GGA-PBE (1.1eV) will become very close
Quasi particle band gap.By simulating and testing, ab- in the universal consistency checking of transfer characteristic and on-off ratio GGA-PBE grade
The reliability that initio transmission calculates.Especially for the MoS2FET of Lg=1nm, the SS value 66mV/dec of calculating almost etc.
In experiment value 65mV/dec.
The best length of the Interface overlapping zone Lo of two stacking ML BP of the vertical BP TFET of Lg=10nm is tested first
Degree.Then optimal Interface overlapping zone Lo when selection leakage current is minimum.Then it is gently mixed at the source non-overlap of 5nm device
Miscellaneous/heavy doping Ns/Nd carries out LP application with pass hull closure.Finally by sub- 10nm vertically black phosphorous field effect transistor ON state electricity
Stream (high power consumption) and the ITRS of high power consumption device requirement, the black phosphorous field effect transistor of planar monolayer compare.
Claims (5)
1. a kind of sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform, it is characterised in that: by top-gated (1), bottom
Grid (2), upper layer silica (3), black phosphorous (4), source electrode (5), drain electrode (6), underlying silica (7) composition；The top
Grid (1) are located at upper layer silica (3) upper end, and bottom gate is located at underlying silica (7) lower end, and black phosphorous (4) homojunction is located at
Between upper layer silica (3) and underlying silica (7), source electrode (5) and drain electrode (6) are located at upper layer silica (3)
With the left and right side in underlying silica (7) section.
2. the sub- 10nm vertical tunneling transistors according to claim 1 based on the black phosphorous homojunction of stratiform, feature exist
In: described black phosphorous (4) homogeneity becomes the black phosphorous of single layer of two part vertical stackings.
3. the sub- 10nm vertical tunneling transistors according to claim 1 based on the black phosphorous homojunction of stratiform, feature exist
In: hexagonal boron nitride covering, PxOy oxide layer or Al can be used in the black phosphorous (4)2O3It is encapsulated with hydrophobic fluoropolymer
The double-deck sealing end.
4. the sub- 10nm vertical tunneling transistors according to claim 1 based on the black phosphorous homojunction of stratiform, feature exist
In: the black phosphorous (4) can be stacked with other two-dimensional material Van der Waals.
5. the sub- 10nm vertical tunneling transistors according to claim 1 based on the black phosphorous homojunction of stratiform, feature exist
In: the sub- 10nm vertical tunneling transistors are the device along armchair direction.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910482541.5A CN110459591A (en) | 2019-06-04 | 2019-06-04 | Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910482541.5A CN110459591A (en) | 2019-06-04 | 2019-06-04 | Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110459591A true CN110459591A (en) | 2019-11-15 |
Family
ID=68480644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910482541.5A Withdrawn CN110459591A (en) | 2019-06-04 | 2019-06-04 | Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110459591A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022000395A1 (en) * | 2020-06-28 | 2022-01-06 | 南京大学 | Unit circuit based on adjustable homojunction field effect device, and multifunctional logic circuit |
-
2019
- 2019-06-04 CN CN201910482541.5A patent/CN110459591A/en not_active Withdrawn
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022000395A1 (en) * | 2020-06-28 | 2022-01-06 | 南京大学 | Unit circuit based on adjustable homojunction field effect device, and multifunctional logic circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Datta et al. | Tunnel FET technology: A reliability perspective | |
| Lind | High frequency III–V nanowire MOSFETs | |
| Chander et al. | Comprehensive review on electrical noise analysis of TFET structures | |
| Singh et al. | Vertical tunnel-fet analysis for excessive low power digital applications | |
| Liu et al. | Investigation on the effects of gate-source overlap/underlap and source doping gradient of n-type Si cylindrical gate-all-around tunnel field-effect transistors | |
| Neophytou et al. | Performance analysis of 60-nm gate-length III–V InGaAs HEMTs: Simulations versus experiments | |
| Huang et al. | P-type tunnel FETs with triple heterojunctions | |
| Ramezani et al. | Dual metal gate tunneling field effect transistors based on MOSFETs: a 2-D analytical approach | |
| Cherik et al. | Enhanced on-state current and suppressed ambipolarity in germanium-source dual vertical-channel TFET | |
| Reddy et al. | A comprehensive review on FinFET in terms of its device structure and performance matrices | |
| Chen et al. | Monolayer–trilayer lateral heterostructure based antimonene field effect transistor: Better contact and high on/off ratios | |
| CN110459591A (en) | Sub- 10nm vertical tunneling transistors based on the black phosphorous homojunction of stratiform | |
| Vandenberghe et al. | Two-dimensional quantum mechanical modeling of band-to-band tunneling in indirect semiconductors | |
| Sharma et al. | Numerical simulations of a novel CH3NH3PbI3 based double-gate dopingless tunnel FET | |
| Singh et al. | Performance projections for two-dimensional materials in radio-frequency applications | |
| CN103247688B (en) | A kind of graphene field effect pipe of bi-material layers grid linear doping | |
| Singh et al. | Design and simulation-based analysis of triple metal gate with ferroelectric-SiGe heterojunction based vertical TFET for performance enhancement | |
| Keighobadi et al. | Physical and analytical modeling of drain current of double-gate heterostructure tunnel FETs | |
| Norouzzadeh et al. | Tunneling FET based on defect-free, vacancy-defected, and passivated monolayer PtSe2 channel: A first principles study | |
| CN209626224U (en) | A kind of tunnelling type graphene nanobelt field-effect tube | |
| Tripathy et al. | Performance Investigation of a p-Channel Hetero-Junction GaN Tunnel FET | |
| Bollaert et al. | Ballistic nano-devices for high frequency applications | |
| Singh et al. | TCAD simulations of double gate tunnel field effect transistor with spacer drain overlap base on vertical Tunneling | |
| Jain et al. | Performance Analysis of Vertically Stacked Nanosheet Tunnel Field Effect Transistor with Ideal Subthreshold Swing | |
| Narwal et al. | Performance investigation of electrode work‐function engineered hetero‐dielectric buried oxide vertical TFET |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20191115 |
|
| WW01 | Invention patent application withdrawn after publication |