CN110456611A - Nano-imprint stamp and production method - Google Patents
Nano-imprint stamp and production method Download PDFInfo
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- CN110456611A CN110456611A CN201910821655.8A CN201910821655A CN110456611A CN 110456611 A CN110456611 A CN 110456611A CN 201910821655 A CN201910821655 A CN 201910821655A CN 110456611 A CN110456611 A CN 110456611A
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- nano
- film layer
- coining
- substrate
- film
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
Abstract
The invention discloses a kind of nano-imprint stamp, including substrate, substrate surface has coining film layer, and coining film layer is processed to form nano impression figure.The present invention on substrate material by depositing one or more layers thin film dielectric layer, and nano impression structure needed for being formed in dielectric layer by photoetching and etching technics, impression block different location, different graphic constructional depth be equal to dielectric layer thickness, and the thickness uniformity of film deposition is better than the depth uniformity of direct etching silicon wafer, to obtain the better high-precision impression block of depth uniformity.The present invention is during making impression block; etching silicon wafer is not needed; silicon wafer will not be caused to damage; once it was found that the data supergage for the nano graph that process abnormality or measurement obtain; precision is not up to standard, and the film layer that can easily remove substrate surface is done over again, so that expensive silicon wafer be avoided to scrap; production cost is reduced, and improves yields.
Description
Technical field
The present invention relates to nanometer embossing field, especially a kind of high-precision nano-imprint stamp and production method.
Background technique
Nanometer embossing is a kind of novel micro-nano technology technology, is directly squeezed using Mechanical Contact, by impression block
On micro-nano structure pattern transfer to material to be processed on, complete pattern transfer.From mid-term the 1990s U.S. Pu Linsi
Pause since university Stephen.Y.Chou. teaching inventive nanometer embossing, this technology obtains significant progress, and highest adds
Work precision has reached 2nm, and impression block can Reusability, there is high-resolution, high efficiency, low cost, consistency height etc.
Advantage is expected to replace traditional photoetching technique, becomes the important manufacturing process of microelectronics, Material Field.
To realize nano impression, first have to make high-precision impression block.The most common impression block is using silicon wafer
Production, conventional production method be directly silicon wafer upper surface coat photoresist, carry out photoetching process, then to silicon chip surface into
Row etching, finally removes photoresist, required Fabrication of nanostructures is come out, to obtain the impression block of targeted graphical.
In etching technics, if the graphic width of impression block is different, pattern density is different, there can be load effect (Loading
Effect), the depth uniformity for the nanostructure that etching obtains, different location, nanostructure of different shapes on silicon wafer are influenced
Depth uniformity generally 3 ~ 5%, therefore it is bad using the depth uniformity of the impression block of conventional method production, also will be straight
Connecing influences the subsequent precision that imprint process is carried out using template.Moreover, traditional handicraft is direct etching silicon wafer, once process
After middle generation process abnormality or nanostructure are formed, pattern, precision be not up to standard, since silicon chip surface has been etched, nothing
Method is done over again, and expensive silicon wafer is directly scrapped, and greatly increases production cost.
Summary of the invention
The applicant is poor for depth uniformity existing for existing nano-imprint stamp and silicon wafer can not do over again leads to silicon
The problems such as piece is scrapped, and production cost is increased, provides a kind of nano-imprint stamp and production method, template difference position can be improved
It sets, the depth uniformity of nanostructure of different shapes, improves the quality of impression block, and can do over again in process,
Production cost is effectively reduced without scrapping in silicon wafer.
The technical solution adopted in the present invention is as follows:
A kind of nano-imprint stamp, including substrate, substrate surface have coining film layer, and coining film layer is processed to form nano impression
Figure.
As a further improvement of the above technical scheme:
The coining film layer is single thin film, or the composite film being made of multilayer different medium material.
The substrate is silicon wafer, and the coining film material is SiO2, SiN.
Also have between the substrate and coining film layer and stops film layer.
A kind of production method of nano-imprint stamp, comprising the following steps:
Selection cleaning: S1 step selects qualified silicon wafer as substrate；The techniques such as cleaned, dried to substrate；
S2 step deposits film: preparing coining film layer in silicon chip surface；
S3 step, lithographic nano figure: coating photoresist in coining film surface, carry out photoetching process, formed on photoresist with
The identical pattern of impression block figure；
Etching: S4 step performs etching coining film layer, is etched to substrate surface always；
S5 step, removes photoresist: removal photoresist, and coining film layer has nano impression figure.
As a further improvement of the above technical scheme:
The S2 step passes through chemical vapor deposition, physical vapour deposition (PVD) or oxidation reaction, preparation coining film layer；The S4
The etching technics of step is dry etching.
The S2 step first prepares in substrate surface before deposit imprints film layer and stops film layer；The S4 step etching
Technique, which stops at, to be stopped in film layer.
The S2 step includes measurement imprint membrane layer film thickness；The S5 step includes detection film thickness, nanometer figure
Shape structure.
Beneficial effects of the present invention are as follows:
The present invention is being situated between by depositing one or more layers thin film dielectric layer on substrate material, and by photoetching and etching technics
Nano impression structure needed for being formed in matter layer, impression block different location, different graphic constructional depth be equal to the thickness of dielectric layer
Degree, and the thickness uniformity of film deposition is better than the depth uniformity of direct etching silicon wafer, so that it is more preferable to obtain depth uniformity
High-precision impression block.
The present invention does not need etching silicon wafer during making impression block, will not cause to damage to silicon wafer, once hair
The data supergage for the nano graph that existing process abnormality or measurement obtain, precision is not up to standard, can easily remove substrate surface
Film layer do over again, so that expensive silicon wafer be avoided to scrap, reduce production cost, and improve yields.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of nano-imprint stamp of the present invention.
Fig. 2 is the processing step schematic diagram of present invention production impression block.
In figure: 1, substrate；2, film layer is imprinted；3, photoresist；4, narrower bore；5, wide aperture.
Specific embodiment
Specific embodiments of the present invention will be described below with reference to the accompanying drawings.
As shown in Figure 1, nano-imprint stamp of the invention includes the coining film layer 2 on 1 surface of substrate 1 and substrate, imprint membrane
Layer 2 is processed to form coining pattern of different shapes, such as narrower bore 4 and wide aperture 5 shown in Fig. 1.Substrate 1 is preferably silicon wafer,
Coining film layer 2 is single thin film or the composite film that is made of multilayer different medium material, dielectric material be preferably SiO2,
SiN etc..Stopping film layer, when performing etching processing step, etching technics can also be deposited between substrate 1 and coining film layer 2
It eventually stops at and stops not etching still further below in film layer.
As shown in Fig. 2, the method that the present invention makes nano-imprint stamp, comprises the following steps that:
S1 step, selection cleaning: selecting qualified silicon wafer as substrate 1, and selected silicon wafer will have high-precision surface smoothness,
It avoids silicon chip surface uneven and influences the quality of impression block.Then, the techniques such as cleaned, dried to substrate 1, so that substrate
The pure free from admixture of 1 silicon chip surface.
S2 step deposits film: by modes such as chemical vapor deposition, physical vapour deposition (PVD) or oxidation reactions, in silicon
Piece surface deposition or the coining film layer 2 that different medium material is formed by chemically reacting.Then, measurement coining 2 film of film layer
Thickness, confirms whether thickness and the thickness uniformity meet the requirements, it is ensured that the film thickness of coining film layer 2 meets final making ide
The depth requirements of plate., can be by etching process if the required accuracy is not achieved in thickness or the thickness uniformity, it will be unqualified
Coining film layer 2 remove, repeat above S1 ~ S2 step.
Certainly, before deposit imprints film layer 2, stopper film first can be formed in 1 surface deposition of substrate or chemical reaction
Layer.
Lithographic nano figure: S3 step coats photoresist 3 on coining 2 surface of film layer, photoetching process is carried out, on photoresist 3
Form pattern identical with final impression block figure.
S4 step, etching: to coining film layer 2 perform etching, S3 step formed photoresist 3 figure on, not by
The film that photoresist 3 covers is etched, and is etched to silicon chip surface always.The etching technics of this step is preferably dry etching.
When 1 surface of substrate, which has, stops film layer, etching technics, which stops at, to be stopped not etching still further below in film layer.
S5 step, removes photoresist: removal photoresist, the coining film layer 2 on 1 surface of substrate are provided with required target nano graph.
Nanostructure is detected by modes such as optics or electron microscopes, whether confirmation film thickness, pattern of nanostructure etc. accord with
It closes and requires.If met the requirements, become qualified impression block；If it does not meet the requirements, it is removed and is served as a contrast by wet corrosion technique
Remaining coining film layer 2 on 1 surface of bottom, and repeat above S1 ~ S5 step.
Using structure shown in Fig. 1 as schematic diagram, coining film layer 2 is etched out the narrower bore 4 and wide aperture 5 of different in width, in S4
In the etching technics of step, after the thin-film material in the figure of different shapes and sizes is completed by etching, etched substrate will not continue to
1 silicon wafer, or it is minimum to the damage of silicon wafer.When the thin film dielectrics material of etching in need be etched clean when, etch work
Skill stops.The depth of final any position nanostructure is equal to the film thickness of coining film layer 2.Due to film deposition it is uniform
Property be higher than etching homogeneity, therefore the present invention can to avoid due to etching homogeneity difference bring depth uniformity problem, thus
Obtain that precision is higher, repeated better nano-imprint stamp.
For the present invention in S2 ~ S5 step, the thin-film deposition that any one step occurs in process abnormality, such as S2 step is different
Etching technics often or in S4 step is abnormal, can directly remove the embossed film 2 on 1 surface of substrate, again in substrate
Impression block is processed on 1.Meanwhile the present invention passes through the thickness that film is measured in online nondestructive measurement, such as S2 step, or
The data such as depth and width or the film thickness of nanostructure are measured in S5 step, once discovery relevant parameter over range, precision
It is not up to standard, the film on 1 surface of substrate can be removed, S1 ~ S5 step is repeated, without scrapping expensive silicon wafer, is dropped significantly
Low production cost.
Above description is explanation of the invention, is not intended to limit the invention, without departing from the spirit of the invention,
The present invention can make any type of modification.
Claims (8)
1. a kind of nano-imprint stamp, it is characterised in that: including substrate (1), substrate (1) surface has coining film layer (2), coining
Film layer (2) is processed to form nano impression figure.
2. nano-imprint stamp according to claim 1, it is characterised in that: the coining film layer (2) is single thin film, or
The composite film that person is made of multilayer different medium material.
3. nano-imprint stamp according to claim 1, it is characterised in that: the substrate (1) is silicon wafer, the imprint membrane
Layer (2) material is SiO2, SiN.
4. nano-imprint stamp according to claim 1, it is characterised in that: between the substrate (1) and coining film layer (2)
Also have and stops film layer.
5. a kind of method for the nano-imprint stamp for making claim 1, it is characterised in that: the following steps are included:
Selection cleaning: S1 step selects qualified silicon wafer as substrate (1)；The techniques such as cleaned, dried to substrate (1)；
S2 step deposits film: preparing coining film layer (2) in silicon chip surface；
Lithographic nano figure: S3 step in coining film layer (2) surface coating photoresist (3), carries out photoetching process, photoresist (3)
It is upper to form pattern identical with impression block figure；
Etching: S4 step performs etching coining film layer (2), is etched to substrate (1) surface always；
S5 step, removes photoresist: removal photoresist, coining film layer (2) have nano impression figure.
6. nano-imprint stamp production method according to claim 5, it is characterised in that: the S2 step passes through chemical gas
Mutually deposition, physical vapour deposition (PVD) or oxidation reaction, preparation coining film layer (2)；The etching technics of the S4 step is dry method quarter
Erosion.
7. nano-imprint stamp production method according to claim 5, it is characterised in that: the S2 step is imprinted in deposit
Before film layer (2), is first prepared on substrate (1) surface and stop film layer；The S4 step etching technics, which stops at, to be stopped in film layer.
8. nano-imprint stamp production method according to claim 5, it is characterised in that: the S2 step includes measurement pressure
Die layer (2) film thickness；The S5 step includes detection film thickness, nano graph structure.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910821655.8A CN110456611A (en) | 2019-09-02 | 2019-09-02 | Nano-imprint stamp and production method |
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| CN201910821655.8A CN110456611A (en) | 2019-09-02 | 2019-09-02 | Nano-imprint stamp and production method |
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| CN110456611A true CN110456611A (en) | 2019-11-15 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112394449A (en) * | 2020-11-17 | 2021-02-23 | 深圳珑璟光电科技有限公司 | Method for manufacturing super-structure surface coupling element |
| CN113204169A (en) * | 2021-04-12 | 2021-08-03 | 新沂崚峻光电科技有限公司 | Preparation method of novel embossing film |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE20122196U1 (en) * | 2000-10-12 | 2004-09-16 | Board of Regents, The University of Texas System, Austin | Imprint lithography template for producing microelectronic devices, has multiple recesses of specified size and alignment marks and is transparent to activating light |
| US20070158872A1 (en) * | 2005-10-18 | 2007-07-12 | Korea Institute Of Machinery & Materials | Stamp for micro/nano imprint lithography using diamond-like carbon and method of fabricating the same |
| US20080182070A1 (en) * | 2007-01-31 | 2008-07-31 | Pei-Yu Chou | Method of manufacturing an imprinting template using a semiconductor manufacturing process and the imprinting template obtained |
-
2019
- 2019-09-02 CN CN201910821655.8A patent/CN110456611A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE20122196U1 (en) * | 2000-10-12 | 2004-09-16 | Board of Regents, The University of Texas System, Austin | Imprint lithography template for producing microelectronic devices, has multiple recesses of specified size and alignment marks and is transparent to activating light |
| US20070158872A1 (en) * | 2005-10-18 | 2007-07-12 | Korea Institute Of Machinery & Materials | Stamp for micro/nano imprint lithography using diamond-like carbon and method of fabricating the same |
| US20080182070A1 (en) * | 2007-01-31 | 2008-07-31 | Pei-Yu Chou | Method of manufacturing an imprinting template using a semiconductor manufacturing process and the imprinting template obtained |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112394449A (en) * | 2020-11-17 | 2021-02-23 | 深圳珑璟光电科技有限公司 | Method for manufacturing super-structure surface coupling element |
| CN113204169A (en) * | 2021-04-12 | 2021-08-03 | 新沂崚峻光电科技有限公司 | Preparation method of novel embossing film |
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