CN110428860A - A kind of memory array organization in RFID chip - Google Patents
A kind of memory array organization in RFID chip Download PDFInfo
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- CN110428860A CN110428860A CN201910863162.0A CN201910863162A CN110428860A CN 110428860 A CN110428860 A CN 110428860A CN 201910863162 A CN201910863162 A CN 201910863162A CN 110428860 A CN110428860 A CN 110428860A
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- 230000008520 organization Effects 0.000 title description 2
- 238000010276 construction Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 6
- OUXCBPLFCPMLQZ-WOPPDYDQSA-N 4-amino-1-[(2r,3s,4s,5r)-4-hydroxy-5-(hydroxymethyl)-3-methyloxolan-2-yl]-5-iodopyrimidin-2-one Chemical compound C[C@H]1[C@H](O)[C@@H](CO)O[C@H]1N1C(=O)N=C(N)C(I)=C1 OUXCBPLFCPMLQZ-WOPPDYDQSA-N 0.000 claims description 2
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- 230000005611 electricity Effects 0.000 description 2
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- 230000003321 amplification Effects 0.000 description 1
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Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
Abstract
In eeprom memory design, speed, power consumption and area are three most basic and most critical design objectives.In the application of RFID, due to the working characteristics of certain RFID, in order to promote service speed, the operation of the memory cell array is taken and is read by page and in the way of page write-in, using a page as basic operation unit, so that can be omitted BSG pipe in EE memory array, thus under conditions of not influencing any working performance, the area of EE memory array module is reduced.
Description
Technical field
The invention belongs to technical field of integrated circuits, specifically, belong to the design of eeprom memory and RFID chip
Field.
Background technique
Now, EEPROM has become RFID tag and very widely used non-volatile of card class chip field is deposited
Reservoir, it is used to store identification code or other data, and the capacity of EEPROM can be from 256bit to 2Mbit.It is stored in EEPROM
In device design, speed, power consumption and area are three most basic and most critical design objectives.
One typical eeprom circuit includes: digital synchronous logic, row/column decoding circuit, reading circuit, high voltage electricity
Pump, read/write switching circuit and clock generator and electric power management circuit, as shown in Figure 1.
In circuit framework shown in Fig. 1:
1) digital synchronous control logic circuit is the control module of EEPROM work, and its main function is reception system hair
Instruction out issues more specific operational order to each functional module after resolution system instruction, coordinates to complete read/write behaviour
Make；
2) reading circuit is read operation nucleus module, is mainly made of sense amplifier (sense amplifier-SA),
According to EE_cell Array framework, if necessary to 8 data of parallel output simultaneously, need using by 8 sensitive amplifications arranged side by side
The array (SA_Array) of device composition；
3) row/column decoder is used for address decoding, the selected storage unit for needing to operate.In order to reduce area and delay,
The mode that decoder generallys use substep decoding builds circuit；
4) read/write switching circuit is mainly made of level shift circuit and voltage selection module.EE_cell is in read operation
Lower operating voltage is needed, and then needs the operating voltage of 15.5V in erasing and programming operation, voltage selection module and electricity
The function that translational shifting circuit is realized is exactly to complete power supply switching, according to the difference that reading and writing operate, is provided correctly for EE_cell
Operating voltage；
5) basic principle of EE_cell data rewriting is FN tunnelling, needs work in the high voltage electric field for being greater than 15.5V
Under.
One of the key problem of EEPROM design is the layout of EE memory array, and directly affect EEPROM is
Architecture design of uniting and physical circuit design.Common EE memory array, the operation of memory cell array is taken read by page and
In such a way that page is written and byte is read with byte write-in.By taking amount of capacity is the EEPROM of 1K bits as an example, by 1K
Bits EE memory is divided into 32 pages, and each page of size is 4 bytes, and each byte is 8 bit, and the read-write of EEPROM is grasped
Make to take a byte as operation basic unit.Using this kind of EE_cell layout type storage array (EE_cell Array) such as
Shown in 2, by CG, several circuit compositions of SG, BSG, and these types of circuit is formed with the device of high-pressure process, area is very
Greatly.Mass storage can be very easily extended to using this kind of framework memory cell array.
Summary of the invention
In the application of RFID, due to the working characteristics of certain RFID, in order to promote service speed, to the storage unit battle array
The operation of column is taken by page reading and in the way of page write-in, using a page as basic operation unit, so that EE memory array
In can be omitted BSG pipe, thus under conditions of not influencing any working performance, reduce the face of EE memory array module
Product.As shown in Figure 3, wherein the wordline WL with storage units all in one page is shorted, not the storage unit of same page identical address
Bit line BL is shorted.Wordline WL total 32, number respectively are as follows: WL0, WL1 ..., WL31；Bit line is 32 total, and number is respectively
BL0、BL1、…、BL31。
Detailed description of the invention
Fig. 1 is eeprom circuit structural schematic diagram.
Fig. 2 is common EE_cell array junctions composition.
Fig. 3 is the special EE_cell array junctions composition of RFID.
Specific embodiment
Below according to Fig. 2 and Fig. 3, preferred embodiment is illustrated.
As shown in Fig. 2, ordinary construction EE_cell array is made of CG, SG, BSG.
As shown in figure 3, special construction EE_cell array is made of CG, SG in RFID.
We take the operation of the memory cell array and read by page and write by page by taking 1K bits storage array as an example
The mode entered, it may be assumed that dividing 1K bits EE_cell is 32 pages, is operation basic unit with a page, and each page of size is
4 bytes, i.e., every 32 storage units form a page.Compared with the EE_cell array of ordinary construction, eliminate 128 by
The BSG circuit of high-pressure process device composition, saves compared with many areas.EEPROM with the 1Kbit under SMIC 0.13um technique is
Example, ordinary construction EE_cell array area are 1109.6496 square microns, and special construction EE_cell array area is
861.588 square microns, area reduce 248 square microns or so.EE_cell of the special construction EE_cell than ordinary construction
Array array saves the area more than 20%, and service speed is improved while greatling save area.
It is discussed in detail although the contents of the present invention have passed through above preferred embodiment, is read in those skilled in the art
After having read above content, a variety of modifications and substitutions of the invention all will be apparent.Above description and attached drawing is only
It is only to implement example of the invention, but it should be appreciated that the description above is not considered as limitation of the present invention.
Claims (9)
1. a kind of EE storage array in RFID chip characterized by comprising service speed is fast, and area is small.
2. EE storage array as described in claim 1, which is characterized in that it is described in the application of RFID, due to certain
The working characteristics of RFID takes the operation of the memory cell array and reads by page and be written by page to promote service speed
Mode, using a page as basic operation unit so that can be omitted in EE memory array BSG pipe, do not influencing thus
Under conditions of any working performance, the area of EE memory array module is reduced.
3. EE storage array as described in claim 1, which is characterized in that it is described wherein, with storage units all in one page
Wordline WL be shorted, not the storage unit of same page identical address bit line BL be shorted.Wordline WL is 32 total, numbers respectively are as follows:
WL0,WL1,…,WL31；Bit line total 32, respectively number be BL0, BL1 ..., BL31.
4. EE storage array as described in claim 1, which is characterized in that described as shown in Fig. 2, ordinary construction EE_cell
Array is made of CG, SG, BSG.
5. EE storage array as described in claim 1, which is characterized in that described as shown in figure 3, special construction in RFID
EE_cell array is made of CG, SG.
6. EE storage array as described in claim 1, which is characterized in that described we by taking 1K bits storage array as an example,
The operation of the memory cell array is taken and is read by page and in the way of page write-in, it may be assumed that dividing 1K bits EE_cell is 32
A page is operation basic unit with a page, and each page of size is 4 bytes, i.e., every 32 storage units form a page.
7. EE storage array as described in claim 1, which is characterized in that the EE_cell array phase with ordinary construction
Than eliminating 128 BSG circuits being made of high-pressure process device, saving compared with many areas.
8. EE storage array as described in claim 1, which is characterized in that the 1Kbit under the 0.13um technique with SMIC
EEPROM for, ordinary construction EE_cell array area be 1109.6496 square microns, special construction EE_cell array surface
Product is 861.588 square microns, and area reduces 248 square microns or so.
9. EE storage array as described in claim 1, which is characterized in that the special construction EE_cell compares ordinary construction
EE_cellArray array save the area more than 20%, service speed is improved while greatling save area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910863162.0A CN110428860A (en) | 2019-09-12 | 2019-09-12 | A kind of memory array organization in RFID chip |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910863162.0A CN110428860A (en) | 2019-09-12 | 2019-09-12 | A kind of memory array organization in RFID chip |
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| CN201910863162.0A Pending CN110428860A (en) | 2019-09-12 | 2019-09-12 | A kind of memory array organization in RFID chip |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6977408B1 (en) * | 2003-06-30 | 2005-12-20 | Lattice Semiconductor Corp. | High-performance non-volatile memory device and fabrication process |
| CN101454842A (en) * | 2006-06-01 | 2009-06-10 | 密克罗奇普技术公司 | A method for programming and erasing an array of nmos eeprom cells that minimize bit disturbances and voltage withstand requirements for the memory array and supporting circuits |
| CN102339644A (en) * | 2011-07-27 | 2012-02-01 | 聚辰半导体(上海)有限公司 | Memorizer and operating method thereof |
| CN102354530A (en) * | 2011-08-25 | 2012-02-15 | 西安电子科技大学 | EEPROM reading device used for passive UHF RFID chip |
-
2019
- 2019-09-12 CN CN201910863162.0A patent/CN110428860A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6977408B1 (en) * | 2003-06-30 | 2005-12-20 | Lattice Semiconductor Corp. | High-performance non-volatile memory device and fabrication process |
| CN101454842A (en) * | 2006-06-01 | 2009-06-10 | 密克罗奇普技术公司 | A method for programming and erasing an array of nmos eeprom cells that minimize bit disturbances and voltage withstand requirements for the memory array and supporting circuits |
| CN102339644A (en) * | 2011-07-27 | 2012-02-01 | 聚辰半导体(上海)有限公司 | Memorizer and operating method thereof |
| CN102354530A (en) * | 2011-08-25 | 2012-02-15 | 西安电子科技大学 | EEPROM reading device used for passive UHF RFID chip |
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Application publication date: 20191108 |