CN110416052B

CN110416052B - Wafer support with resonant circuit

Info

Publication number: CN110416052B
Application number: CN201910671250.0A
Authority: CN
Inventors: 荒见淳一; 格雷格.苏王
Original assignee: Piotech Inc
Current assignee: Piotech Inc
Priority date: 2019-07-24
Filing date: 2019-07-24
Publication date: 2022-06-17
Anticipated expiration: 2039-07-24
Also published as: CN110416052A

Abstract

The invention provides a wafer support pedestal, comprising: a plurality of electrodes and a plurality of resonant circuits are electrically coupled to respective electrodes, each resonant circuit configured to adjust an impedance based at least on a signal coupled to an electrode, thereby changing a plasma distribution associated with the electrode during a process.

Description

Wafer support with resonant circuit

Technical Field

The present invention relates to the fabrication of wafer supports for semiconductor structures, and more particularly to wafer supports suitable for plasma processing, which typically incorporate some of the components of the rf circuitry.

Background

Plasma processing is used in the manufacture of, for example, integrated circuits, photomasks, plasma displays, and solar technologies. In the fabrication of integrated circuits, wafers are processed by plasma chambers, such as etching, chemical vapor deposition PECVD, or physical vapor deposition PEPVD. For integrated circuits of smaller dimensions, more precise control of process parameters is required, such as plasma energy spectrum, plasma energy radial distribution, plasma density and plasma density radial distribution. And in particular, the plasma density, which determines the deposition rate and etch rate of the wafer surface. While the radial distribution of plasma density and plasma energy more affect the deposition and etch uniformity. Known semiconductor processing apparatuses are provided with an upper electrode and a lower electrode, which can generate plasma therebetween. However, known configurations still do not easily achieve these precise controls, and even limit the freedom of plasma tuning.

Therefore, there is a need for a semiconductor processing apparatus or rf module that can provide different rf control strategies to meet the process design freedom.

Disclosure of Invention

The present invention provides a wafer support pedestal, comprising: a tray body; a first electrode and a second electrode embedded in the tray body, wherein the first electrode is located in an inner diameter range of the tray body, and the second electrode is located in an outer diameter range corresponding to the inner diameter range of the tray body; and a first resonant circuit and a second resonant circuit electrically coupled to the first electrode and the second electrode, respectively, wherein the first resonant circuit is configured to adjust a first impedance according to at least a signal of the first electrode, and the second resonant circuit is configured to adjust a second impedance according to at least a signal of the second electrode.

In one embodiment, the disk has a wafer carrying surface, and a distance between the first electrode and the wafer carrying surface is less than a distance between the second electrode and the wafer carrying surface.

In one embodiment, the platter has ten electrodes, including the first electrode and the second electrode.

In one embodiment, the wafer support pedestal further comprises a power supply electrically coupled to the first electrode and configured to supply a signal for electrostatic chucking to the first electrode.

In one embodiment, the wafer support pedestal further comprises an RF blocking circuit electrically connected between the first electrode and the power supply and configured to inhibit RF signals associated with the first electrode from passing to the power supply.

In one embodiment, the first resonant circuit includes a variable capacitor, a first inductor, and a second inductor, wherein an upstream end of the variable capacitor is electrically coupled to the first electrode, a downstream end of the variable capacitor is electrically connected to an upstream end of the first inductor, and the second inductor is connected in parallel with the variable capacitor and the first inductor in series.

In one embodiment, the second resonant circuit includes a variable capacitor, a first inductor, and a second inductor, wherein an upstream end of the variable capacitor is electrically coupled to the first electrode, a downstream end of the variable capacitor is electrically connected to an upstream end of the first inductor, and the second inductor is connected in parallel with the variable capacitor and the first inductor in series.

In one embodiment, the variable capacitor is configured to change the first impedance or the second impedance according to a signal input to the first electrode or the second electrode.

In one embodiment, the rf blocking circuit includes a first capacitor, a second capacitor and an inductor, an upstream end of the first capacitor is electrically coupled to the first electrode, a downstream end of the first capacitor is electrically connected to an upstream end of the second capacitor, and a downstream end of the first capacitor is electrically connected to an upstream end of the inductor.

Another object of the present invention is to provide a semiconductor processing apparatus for rf processing in semiconductor manufacturing, the apparatus comprising: a cavity; a spray assembly located at a top of the chamber and having an electrode; a radio frequency generator and a matcher, which are electrically coupled to the spraying assembly; and the wafer support seat is positioned below the spray assembly.

These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying drawings, which are illustrative of the principles of the invention.

Drawings

The invention can be further understood with reference to the following drawings and description. Non-limiting and non-exhaustive examples are described with reference to the following figures. The components in the drawings are not necessarily to scale; emphasis instead being placed upon illustrating the structures and principles.

FIG. 1 shows a wafer support pedestal and a circuit connection diagram thereof according to the present invention.

FIG. 2 illustrates an electrode arrangement of the wafer support pedestal of the present invention.

[ description of symbols ]

10 first resonant circuit of semiconductor processing apparatus 200

100 wafer pedestal 200a variable capacitor

101 first inductor of cavity 200b

102 spray assembly 200c second inductor

103 rf generator 201 power supply

104 matching unit 202 second resonant circuit

105 first electrode 202a variable capacitance

106 second electrode 202b first inductance

107 external heater 202c second inductance

108 internal heater 203 capacitance

W wafer 204 RF blocking circuit

S1 Signal 205 controller

S2 signal 206 low pass filter

S3 on-off signal 207 RF grounding circuit

401 first electrode 208 AC signal generator

402 second electrode 209 solid state relay

403 third electrode

Detailed Description

The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which specific exemplary embodiments are shown by way of illustration. The claimed subject matter may, however, be embodied in many different forms and should not be construed as limited to any example embodiments set forth herein; the exemplary embodiments are merely illustrative. As such, this invention is intended to provide a reasonably broad scope of coverage to the claimed subject matter as claimed or as covered thereby. In addition, for example, claimed subject matter may be embodied as a method, apparatus, or system. Thus, embodiments may take the form of, for example, hardware, software, firmware, or any combination thereof (known not to be software).

The use of the phrase "in one embodiment" in this specification does not necessarily refer to the same embodiment, and the use of "in other embodiment(s)" in this specification does not necessarily refer to different embodiments. It is intended that, for example, claimed subject matter include all or a portion of the exemplary embodiments in combination.

Figure 1 shows a schematic view of a semiconductor processing apparatus 10 and a wafer support pedestal 100 of the present invention included therein. In particular, the semiconductor processing apparatus 10 is a radio frequency processing apparatus for manufacturing semiconductors, which has radio frequency components. The rf assembly includes a combination of an upper electrode (not shown) of a showerhead assembly 102 and a plurality of lower electrodes of a wafer support pedestal 100 located at the top of a chamber 101 of a semiconductor processing apparatus 10, and an rf generator 103 and adapter 104. The rf generator 103 and the matcher 104 are electrically coupled to the upper electrode of the shower assembly 102 to provide an rf signal. The bottom electrode is grounded via respective downstream circuitry, as described in more detail below. In other possible embodiments, the downstream end of the electrode may be additionally electrically connected to a respective feedback circuit configured to feed back the rf signal of the lower electrode to the rf generator 103 or the matcher 104 to satisfy various rf signal adjustments.

Although not described in detail, generally, the chamber 101 typically has a chamber defined by a top, a bottom, and a wall. The top portion typically has complex inlet manifolds, gas distribution gas, gas passages, and showerheads. In a typical configuration, the upper electrode is included in the structure of the showerhead. The top or showerhead of the chamber 101 is electrically coupled to the rf generator 103 and the adapter 104 so that the upper electrode receives a signal from the rf source.

The wafer support pedestal 100 of the present invention is typically coupled to the bottom of the chamber 101 so that a wafer W may be supported at a height within the chamber. A plasma region may be formed between the showerhead assembly 102, which includes an upper electrode, and the wafer support pedestal 100, which includes a lower electrode.

Although not shown, in one embodiment, the RF generator 103 may include a low-frequency RF source, a high-frequency RF source, or a combination thereof, and the matcher 104 may include a matching network dedicated to low-frequency, a matching network dedicated to high-frequency, or a combination thereof. The matching network includes one or more capacitors, inductors, and some electronic components, the detailed composition of which is not described herein. Depending on the different processes, it is known to select low frequency or high frequency rf operation, which is not described herein. In a known approach, the rf generator 103 and/or the matcher 104 are configured to adjust the output frequency of the low or high frequency rf source and/or variable components in the matching network, such as variable capacitors, based on some rf-related feedback signal.

As with the conventional arrangement, the wafer support pedestal 100 of the present invention also has a tray, not numbered, having a wafer support surface facing the shower assembly 102 for supporting and exposing a wafer W to be processed in the processing region of the chamber. The inventive disc has a plurality of lower electrodes for receiving RF signals from upstream. In one embodiment, the bottom electrode includes a first electrode 105 and a second electrode 106. As shown in fig. 1, the position of the first electrode 105 is slightly higher than the position of the second electrode 106. That is, the distance between the first electrode 105 and the wafer carrying surface is smaller than the distance between the second electrode 106 and the wafer carrying surface.

In addition, the first electrode 105 is located within an inner diameter of the disk, and the second electrode 106 is located opposite to an outer diameter of the disk. In one embodiment, the first electrode 105 may be configured as an electrode having a circular area and the second electrode 106 may be configured as an electrode having a circular area. Accordingly, the first electrode 105 covers at least the central portion of the wafer (W), and the second electrode 106 covers the peripheral portion of the wafer (W). The first electrode 105, in addition to receiving the RF signal, may be configured as an electrostatic chuck to position the wafer (W) on the carrier surface. In one embodiment, the inner diameter of the ring-shaped second electrode 106 is larger than the outer diameter of the wafer (W).

The disk may also include one or more heaters, including an inner heater 107 for the central portion of the wafer and an outer heater 108 for the periphery of the wafer. The inner heater 107 and the outer heater 108 are cooperated with each other according to a controller to achieve flexible disk surface temperature control.

The first electrode 105 and the second electrode 106 are each electrically coupled to a circuit at ground via a metal rod or cable contained in the support base. As shown in fig. 1, the first electrode 105 is electrically coupled to at least a first resonant circuit 200 and a power supply 201 for the electrostatic absorption, and the second electrode 106 is electrically coupled to a second resonant circuit 202. In other embodiments, the second resonant circuit 202 may be omitted and the second electrode 106 may be directly grounded to become a ground electrode.

The first resonant circuit 200 and the second resonant circuit 202 are configured to vary a first impedance and a second impedance, respectively, based on signals received from the first electrode 105 and the second electrode 106, thereby adjusting a plasma profile proximate the wafer carrying surface. In one embodiment, the first resonant circuit 200 is electrically coupled to the first electrode 105 through a capacitor 203. The first resonant circuit 200 may include at least one variable electronic component. For example, in one embodiment, the first resonant circuit 200 has a variable capacitor 200a, a first inductor 200b and a second inductor 200 c. An upstream end of the variable capacitor 200a is electrically connected to the capacitor 203, and a downstream end of the variable capacitor 200a is electrically connected to an upstream end of the first inductor 200 b. Therefore, the variable capacitor 200a and the first inductor 200b are connected in series. The second inductor 200c is connected in parallel with the variable capacitor 200a and the first inductor 200b connected in series, and a downstream end of the first inductor 200b and the second inductor 200c is grounded. The variable capacitor 200a is configured to change the impedance of the first resonant circuit 200 according to a signal S1 received by the first resonant circuit 200, thereby adjusting the plasma distribution of the first electrode 105, i.e., the area near the center of the wafer. The signal S1 is related to the rf power received by the first electrode 105.

Claims

1. A wafer support pedestal, comprising:

a tray body;

a first electrode and a second electrode embedded in the tray body, wherein the first electrode is located in an inner diameter range of the tray body, and the second electrode is located in an outer diameter range corresponding to the inner diameter range of the tray body; and

a first resonant circuit and a second resonant circuit electrically coupled to the first electrode and the second electrode, respectively, wherein the first resonant circuit is configured to adjust a first impedance according to at least a signal of the first electrode, and the second resonant circuit is configured to adjust a second impedance according to at least a signal of the second electrode;

a power supply electrically coupled to the first electrode and configured to supply a signal for electrostatic attraction to the first electrode such that the disk provides electrostatic attraction through the first electrode; and

a radio frequency blocking circuit electrically connected between the first electrode and the power supply and configured to suppress radio frequency signals entering the power supply from the first electrode, the radio frequency blocking circuit comprising a first inductor, a second inductor and a capacitor, wherein one end of the first inductor is electrically coupled to the first electrode, the other end of the first inductor is electrically connected to one end of the second inductor, the other end of the second inductor is electrically connected to the power supply, one end of the capacitor is electrically connected between the first inductor and the second inductor, and the other end of the capacitor is grounded.

2. The wafer support pedestal of claim 1 wherein the disk has a wafer bearing surface, a distance between the first electrode and the wafer bearing surface being less than a distance between the second electrode and the wafer bearing surface.

3. The wafer support pedestal of claim 1 wherein the plate has ten electrodes including the first electrode and the second electrode.

4. The wafer support pedestal of claim 1, wherein the first resonant circuit comprises a variable capacitor, a first inductor, and a second inductor, wherein an upstream end of the variable capacitor is electrically coupled to the first electrode, a downstream end of the variable capacitor is electrically connected to an upstream end of the first inductor, and the second inductor is connected in parallel with the variable capacitor and the first inductor in series.

5. The wafer support pedestal of claim 1, wherein the second resonant circuit comprises a variable capacitor, a first inductor, and a second inductor, wherein an upstream end of the variable capacitor is electrically coupled to the second electrode, a downstream end of the variable capacitor is electrically connected to an upstream end of the first inductor, and the second inductor is connected in parallel with the variable capacitor and the first inductor in series.

6. The wafer support pedestal of claim 4 or 5, wherein the variable capacitor is configured to change the first impedance or the second impedance based on a signal input to the first electrode or the second electrode.

7. The wafer support pedestal of claim 1 wherein the second electrode is a ring electrode having an inner diameter greater than an outer diameter of the wafer.

8. A semiconductor processing apparatus for radio frequency processing in semiconductor manufacturing, comprising:

a cavity;

a spray assembly located at a top of the chamber and having an electrode;

a radio frequency generator and a matcher, which are electrically coupled to the spraying assembly; the wafer support pedestal of claim 1 positioned below the showerhead assembly.